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Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 18018
Page 122 of 181
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1
Patent #:
7924630
Issue Dt:
04/12/2011
Application #:
12251944
Filing Dt:
10/15/2008
Publication #:
US20100091586
Pub Dt:
04/15/2010
Title:
TECHNIQUES FOR SIMULTANEOUSLY DRIVING A PLURALITY OF SOURCE LINES
2
Patent #:
7925949
Issue Dt:
04/12/2011
Application #:
12252223
Filing Dt:
10/15/2008
Publication #:
US20100095168
Pub Dt:
04/15/2010
Title:
EMBEDDED PROCESSOR
3
Patent #:
8067803
Issue Dt:
11/29/2011
Application #:
12252495
Filing Dt:
10/16/2008
Publication #:
US20100096680
Pub Dt:
04/22/2010
Title:
MEMORY DEVICES, TRANSISTOR DEVICES AND RELATED METHODS
4
Patent #:
7892937
Issue Dt:
02/22/2011
Application #:
12252499
Filing Dt:
10/16/2008
Publication #:
US20100099232
Pub Dt:
04/22/2010
Title:
METHODS OF FORMING CAPACITORS
5
Patent #:
7835205
Issue Dt:
11/16/2010
Application #:
12252618
Filing Dt:
10/16/2008
Publication #:
US20090066379
Pub Dt:
03/12/2009
Title:
DELAY STAGE-INTERWEAVED ANALOG DLL/PLL
6
Patent #:
8891517
Issue Dt:
11/18/2014
Application #:
12252835
Filing Dt:
10/16/2008
Publication #:
US20100098104
Pub Dt:
04/22/2010
Title:
SWITCHING DEVICE
7
Patent #:
8059671
Issue Dt:
11/15/2011
Application #:
12252882
Filing Dt:
10/16/2008
Publication #:
US20100014428
Pub Dt:
01/21/2010
Title:
SWITCHING DEVICE
8
Patent #:
8040907
Issue Dt:
10/18/2011
Application #:
12252934
Filing Dt:
10/16/2008
Publication #:
US20100002716
Pub Dt:
01/07/2010
Title:
SWITCHING METHOD
9
Patent #:
8030780
Issue Dt:
10/04/2011
Application #:
12253121
Filing Dt:
10/16/2008
Publication #:
US20100096759
Pub Dt:
04/22/2010
Title:
SEMICONDUCTOR SUBSTRATES WITH UNITARY VIAS AND VIA TERMINALS, AND ASSOCIATED SYSTEMS AND METHODS
10
Patent #:
8209521
Issue Dt:
06/26/2012
Application #:
12253966
Filing Dt:
10/18/2008
Publication #:
US20100100714
Pub Dt:
04/22/2010
Title:
METHODS OF INDIRECT REGISTER ACCESS INCLUDING AUTOMATIC MODIFICATION OF A DIRECTLY ACCESSIBLE ADDRESS REGISTER
11
Patent #:
8938590
Issue Dt:
01/20/2015
Application #:
12253967
Filing Dt:
10/18/2008
Publication #:
US20100100691
Pub Dt:
04/22/2010
Title:
INDIRECT REGISTER ACCESS METHOD AND SYSTEM
12
Patent #:
7863722
Issue Dt:
01/04/2011
Application #:
12254111
Filing Dt:
10/20/2008
Publication #:
US20100096737
Pub Dt:
04/22/2010
Title:
STACKABLE SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES
13
Patent #:
7772066
Issue Dt:
08/10/2010
Application #:
12255186
Filing Dt:
10/21/2008
Publication #:
US20090046504
Pub Dt:
02/19/2009
Title:
DRAM TUNNELING ACCESS TRANSISTOR
14
Patent #:
7885128
Issue Dt:
02/08/2011
Application #:
12255523
Filing Dt:
10/21/2008
Publication #:
US20100097871
Pub Dt:
04/22/2010
Title:
REDUNDANT MEMORY ARRAY FOR REPLACING MEMORY SECTIONS OF MAIN MEMORY
15
Patent #:
7795664
Issue Dt:
09/14/2010
Application #:
12257100
Filing Dt:
10/23/2008
Publication #:
US20090045449
Pub Dt:
02/19/2009
Title:
FINNED MEMORY CELLS
16
Patent #:
7898861
Issue Dt:
03/01/2011
Application #:
12257732
Filing Dt:
10/24/2008
Publication #:
US20090046507
Pub Dt:
02/19/2009
Title:
REDUCING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE
17
Patent #:
7876639
Issue Dt:
01/25/2011
Application #:
12259218
Filing Dt:
10/27/2008
Publication #:
US20100103761
Pub Dt:
04/29/2010
Title:
MEMORY DEVICES HAVING REDUNDANT ARRAYS FOR REPAIR
18
Patent #:
8291181
Issue Dt:
10/16/2012
Application #:
12259363
Filing Dt:
10/28/2008
Publication #:
US20100106889
Pub Dt:
04/29/2010
Title:
TEMPORARY MIRRORING, LOGICAL SEGREGATION, AND REDUNDANT PROGRAMMING OR ADDRESSING FOR SOLID STATE DRIVE OPERATION
19
Patent #:
8762621
Issue Dt:
06/24/2014
Application #:
12259380
Filing Dt:
10/28/2008
Publication #:
US20100106919
Pub Dt:
04/29/2010
Title:
LOGICAL UNIT OPERATION
20
Patent #:
8159270
Issue Dt:
04/17/2012
Application #:
12259625
Filing Dt:
10/28/2008
Publication #:
US20100102853
Pub Dt:
04/29/2010
Title:
CIRCUITRY AND METHODS MINIMIZING OUTPUT SWITCHING NOISE THROUGH SPLIT-LEVEL SIGNALING AND BUS DIVISION ENABLED BY A THIRD POWER SUPPLY
21
Patent #:
8097175
Issue Dt:
01/17/2012
Application #:
12259921
Filing Dt:
10/28/2008
Publication #:
US20100102415
Pub Dt:
04/29/2010
Title:
METHOD FOR SELECTIVELY PERMEATING A SELF-ASSEMBLED BLOCK COPOLYMER, METHOD FOR FORMING METAL OXIDE STRUCTURES, METHOD FOR FORMING A METAL OXIDE PATTERN, AND METHOD FOR PATTERNING A SEMICONDUCTOR STRUCTURE
22
Patent #:
7872924
Issue Dt:
01/18/2011
Application #:
12259938
Filing Dt:
10/28/2008
Publication #:
US20100103746
Pub Dt:
04/29/2010
Title:
MULTI-PHASE DUTY-CYCLE CORRECTED CLOCK SIGNAL GENERATOR AND MEMORY HAVING SAME
23
Patent #:
8799743
Issue Dt:
08/05/2014
Application #:
12259949
Filing Dt:
10/28/2008
Publication #:
US20100107036
Pub Dt:
04/29/2010
Title:
ERROR CORRECTION IN MULTIPLE SEMICONDUCTOR MEMORY UNITS
24
Patent #:
7804322
Issue Dt:
09/28/2010
Application #:
12261101
Filing Dt:
10/30/2008
Publication #:
US20090167370
Pub Dt:
07/02/2009
Title:
OUTPUT BUFFER
25
Patent #:
8127091
Issue Dt:
02/28/2012
Application #:
12261124
Filing Dt:
10/30/2008
Publication #:
US20100115176
Pub Dt:
05/06/2010
Title:
PROGRAMMING MEMORY CELLS WITH ADDITIONAL DATA FOR INCREASED THRESHOLD VOLTAGE RESOLUTION
26
Patent #:
8095834
Issue Dt:
01/10/2012
Application #:
12261857
Filing Dt:
10/30/2008
Publication #:
US20100115344
Pub Dt:
05/06/2010
Title:
MACRO AND COMMAND EXECUTION FROM MEMORY ARRAY
27
Patent #:
7852671
Issue Dt:
12/14/2010
Application #:
12261928
Filing Dt:
10/30/2008
Publication #:
US20100110788
Pub Dt:
05/06/2010
Title:
DATA PATH FOR MULTI-LEVEL CELL MEMORY, METHODS FOR STORING AND METHODS FOR UTILIZING A MEMORY ARRAY
28
Patent #:
7978721
Issue Dt:
07/12/2011
Application #:
12261942
Filing Dt:
10/30/2008
Publication #:
US20100005238
Pub Dt:
01/07/2010
Title:
MULTI-SERIAL INTERFACE STACKED-DIE MEMORY ARCHITECTURE
29
Patent #:
8254191
Issue Dt:
08/28/2012
Application #:
12261963
Filing Dt:
10/30/2008
Publication #:
US20100110745
Pub Dt:
05/06/2010
Title:
SWITCHED INTERFACE STACKED-DIE MEMORY ARCHITECTURE
30
Patent #:
NONE
Issue Dt:
Application #:
12262036
Filing Dt:
10/30/2008
Publication #:
US20100112191
Pub Dt:
05/06/2010
Title:
SYSTEMS AND ASSOCIATED METHODS FOR DEPOSITING MATERIALS
31
Patent #:
7835173
Issue Dt:
11/16/2010
Application #:
12262223
Filing Dt:
10/31/2008
Publication #:
US20100110757
Pub Dt:
05/06/2010
Title:
RESISTIVE MEMORY
32
Patent #:
8023334
Issue Dt:
09/20/2011
Application #:
12262405
Filing Dt:
10/31/2008
Publication #:
US20100110798
Pub Dt:
05/06/2010
Title:
PROGRAM WINDOW ADJUST FOR MEMORY CELL SIGNAL LINE DELAY
33
Patent #:
8205066
Issue Dt:
06/19/2012
Application #:
12263203
Filing Dt:
10/31/2008
Publication #:
US20100115237
Pub Dt:
05/06/2010
Title:
DYNAMICALLY CONFIGURED COPROCESSOR FOR DIFFERENT EXTENDED INSTRUCTION SET PERSONALITY SPECIFIC TO APPLICATION PROGRAM WITH SHARED MEMORY STORING INSTRUCTIONS INVISIBLY DISPATCHED FROM HOST PROCESSOR
34
Patent #:
8203695
Issue Dt:
06/19/2012
Application #:
12264109
Filing Dt:
11/03/2008
Publication #:
US20100110401
Pub Dt:
05/06/2010
Title:
PHOTOLITHOGRAPHY SYSTEMS AND ASSOCIATED METHODS OF FOCUS CORRECTION
35
Patent #:
8001410
Issue Dt:
08/16/2011
Application #:
12264354
Filing Dt:
11/04/2008
Publication #:
US20090058478
Pub Dt:
03/05/2009
Title:
EFFICIENT CLOCKING SCHEME FOR ULTRA HIGH-SPEED SYSTEMS
36
Patent #:
8258006
Issue Dt:
09/04/2012
Application #:
12265032
Filing Dt:
11/05/2008
Publication #:
US20090068791
Pub Dt:
03/12/2009
Title:
METHOD FOR FABRICATING STACKED SEMICONDUCTOR COMPONENTS
37
Patent #:
7824986
Issue Dt:
11/02/2010
Application #:
12265070
Filing Dt:
11/05/2008
Publication #:
US20100112808
Pub Dt:
05/06/2010
Title:
METHODS OF FORMING A PLURALITY OF TRANSISTOR GATES, AND METHODS OF FORMING A PLURALITY OF TRANSISTOR GATES HAVING AT LEAST TWO DIFFERENT WORK FUNCTIONS
38
Patent #:
7821291
Issue Dt:
10/26/2010
Application #:
12265204
Filing Dt:
11/05/2008
Publication #:
US20090066368
Pub Dt:
03/12/2009
Title:
DIGITAL CALIBRATION CIRCUITS, DEVICES AND SYSTEMS INCLUDING SAME, AND METHODS OF OPERATION
39
Patent #:
8065551
Issue Dt:
11/22/2011
Application #:
12265265
Filing Dt:
11/05/2008
Publication #:
US20090055675
Pub Dt:
02/26/2009
Title:
ADJUSTABLE BYTE LANE OFFSET FOR MEMORY MODULE TO REDUCE SKEW
40
Patent #:
7970964
Issue Dt:
06/28/2011
Application #:
12265421
Filing Dt:
11/05/2008
Publication #:
US20100115158
Pub Dt:
05/06/2010
Title:
METHODS AND SYSTEMS TO ACCOMPLISH VARIABLE WIDTH DATA INPUT
41
Patent #:
7917684
Issue Dt:
03/29/2011
Application #:
12265436
Filing Dt:
11/05/2008
Publication #:
US20100115173
Pub Dt:
05/06/2010
Title:
BUS TRANSLATOR
42
Patent #:
9639493
Issue Dt:
05/02/2017
Application #:
12265465
Filing Dt:
11/05/2008
Publication #:
US20100115347
Pub Dt:
05/06/2010
Title:
Pattern-Recognition Processor with Results Buffer
43
Patent #:
8071262
Issue Dt:
12/06/2011
Application #:
12265518
Filing Dt:
11/05/2008
Publication #:
US20100112462
Pub Dt:
05/06/2010
Title:
RETICLES WITH SUBDIVIDED BLOCKING REGIONS
44
Patent #:
8134868
Issue Dt:
03/13/2012
Application #:
12265989
Filing Dt:
11/06/2008
Publication #:
US20100110789
Pub Dt:
05/06/2010
Title:
MEMORY DEVICE BIASING METHOD AND APPARATUS
45
Patent #:
9052604
Issue Dt:
06/09/2015
Application #:
12266202
Filing Dt:
11/06/2008
Publication #:
US20100114522
Pub Dt:
05/06/2010
Title:
PHOTOLITHOGRAPHY SYSTEMS AND ASSOCIATED ALIGNMENT CORRECTION METHODS
46
Patent #:
8260449
Issue Dt:
09/04/2012
Application #:
12266276
Filing Dt:
11/06/2008
Publication #:
US20100112467
Pub Dt:
05/06/2010
Title:
PHOTOLITHOGRAPHY SYSTEMS AND ASSOCIATED METHODS OF OVERLAY ERROR CORRECTION
47
Patent #:
7826292
Issue Dt:
11/02/2010
Application #:
12266376
Filing Dt:
11/06/2008
Publication #:
US20100110813
Pub Dt:
05/06/2010
Title:
PRECHARGE CONTROL CIRCUITS AND METHODS FOR MEMORY HAVING BUFFERED WRITE COMMANDS
48
Patent #:
7990763
Issue Dt:
08/02/2011
Application #:
12267308
Filing Dt:
11/07/2008
Publication #:
US20090067249
Pub Dt:
03/12/2009
Title:
MEMORY WITH WEIGHTED MULTI-PAGE READ
49
Patent #:
7729167
Issue Dt:
06/01/2010
Application #:
12267694
Filing Dt:
11/10/2008
Publication #:
US20090067240
Pub Dt:
03/12/2009
Title:
PROGRAMMING A MEMORY WITH VARYING BITS PER CELL
50
Patent #:
8402188
Issue Dt:
03/19/2013
Application #:
12268270
Filing Dt:
11/10/2008
Publication #:
US20100122024
Pub Dt:
05/13/2010
Title:
METHODS AND SYSTEMS FOR DEVICES WITH A SELF-SELECTING BUS DECODER
51
Patent #:
8732388
Issue Dt:
05/20/2014
Application #:
12268879
Filing Dt:
11/11/2008
Publication #:
US20100070735
Pub Dt:
03/18/2010
Title:
EMBEDDED MAPPING INFORMATION FOR MEMORY DEVICES
52
Patent #:
7927964
Issue Dt:
04/19/2011
Application #:
12270530
Filing Dt:
11/13/2008
Publication #:
US20100120246
Pub Dt:
05/13/2010
Title:
METHODS OF FORMING ELECTRICALLY INSULATIVE MATERIALS, METHODS OF FORMING LOW K DIELECTRIC REGIONS, AND METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
53
Patent #:
7894285
Issue Dt:
02/22/2011
Application #:
12270533
Filing Dt:
11/13/2008
Publication #:
US20100118632
Pub Dt:
05/13/2010
Title:
CIRCUITS, SYSTEMS, AND METHODS FOR REDUCING SIMULTANEOUS SWITCHING OUTPUT NOISE, POWER NOISE, OR COMBINATIONS THEREOF
54
Patent #:
7824994
Issue Dt:
11/02/2010
Application #:
12271132
Filing Dt:
11/14/2008
Publication #:
US20090068812
Pub Dt:
03/12/2009
Title:
METHOD OF FORMING MEMORY DEVICES BY PERFORMING HALOGEN ION IMPLANTATION AND DIFFUSION PROCESSES
55
Patent #:
9159452
Issue Dt:
10/13/2015
Application #:
12271140
Filing Dt:
11/14/2008
Publication #:
US20100125429
Pub Dt:
05/20/2010
Title:
AUTOMATIC WORD LINE LEAKAGE MEASUREMENT CIRCUITRY
56
Patent #:
8098530
Issue Dt:
01/17/2012
Application #:
12271185
Filing Dt:
11/14/2008
Publication #:
US20100124127
Pub Dt:
05/20/2010
Title:
SYSTEMS AND METHODS FOR ERASING A MEMORY
57
Patent #:
8064267
Issue Dt:
11/22/2011
Application #:
12271223
Filing Dt:
11/14/2008
Publication #:
US20100124126
Pub Dt:
05/20/2010
Title:
ERASE VOLTAGE REDUCTION IN A NON-VOLATILE MEMORY DEVICE
58
Patent #:
7881134
Issue Dt:
02/01/2011
Application #:
12272138
Filing Dt:
11/17/2008
Publication #:
US20100124132
Pub Dt:
05/20/2010
Title:
REPLACING DEFECTIVE COLUMNS OF MEMORY CELLS IN RESPONSE TO EXTERNAL ADDRESSES
59
Patent #:
7663934
Issue Dt:
02/16/2010
Application #:
12272281
Filing Dt:
11/17/2008
Publication #:
US20090073772
Pub Dt:
03/19/2009
Title:
PROGRAM METHOD WITH OPTIMIZED VOLTAGE LEVEL FOR FLASH MEMORY
60
Patent #:
8112573
Issue Dt:
02/07/2012
Application #:
12272358
Filing Dt:
11/17/2008
Publication #:
US20090125670
Pub Dt:
05/14/2009
Title:
NON-VOLATILE MEMORY WITH ERASE BLOCK STATE INDICATION IN A SUBSET OF SECTORS OF ERASE BLOCK
61
Patent #:
7737055
Issue Dt:
06/15/2010
Application #:
12272500
Filing Dt:
11/17/2008
Publication #:
US20090068848
Pub Dt:
03/12/2009
Title:
SYSTEMS AND METHODS FOR MANIPULATING LIQUID FILMS ON SEMICONDUCTOR SUBSTRATES
62
Patent #:
8173034
Issue Dt:
05/08/2012
Application #:
12272517
Filing Dt:
11/17/2008
Publication #:
US20100124826
Pub Dt:
05/20/2010
Title:
METHODS OF UTILIZING BLOCK COPOLYMER TO FORM PATTERNS
63
Patent #:
7697324
Issue Dt:
04/13/2010
Application #:
12272590
Filing Dt:
11/17/2008
Publication #:
US20090073765
Pub Dt:
03/19/2009
Title:
NON-VOLATILE MEMORY DEVICE AND METHOD HAVING BIT-STATE ASSIGNMENTS SELECTED TO MINIMIZE SIGNAL COUPLING
64
Patent #:
8753933
Issue Dt:
06/17/2014
Application #:
12274169
Filing Dt:
11/19/2008
Publication #:
US20100124821
Pub Dt:
05/20/2010
Title:
METHODS FOR FORMING A CONDUCTIVE MATERIAL, METHODS FOR SELECTIVELY FORMING A CONDUCTIVE MATERIAL, METHODS FOR FORMING PLATINUM, AND METHODS FOR FORMING CONDUCTIVE STRUCTURES
65
Patent #:
8008162
Issue Dt:
08/30/2011
Application #:
12274181
Filing Dt:
11/19/2008
Publication #:
US20100123122
Pub Dt:
05/20/2010
Title:
SELECT DEVICES INCLUDING AN OPEN VOLUME, MEMORY DEVICES AND SYSTEMS INCLUDING SAME, AND METHODS FOR FORMING SAME
66
Patent #:
8446787
Issue Dt:
05/21/2013
Application #:
12274426
Filing Dt:
11/20/2008
Publication #:
US20100124133
Pub Dt:
05/20/2010
Title:
REPLACING DEFECTIVE MEMORY BLOCKS IN RESPONSE TO EXTERNAL ADDRESSES
67
Patent #:
8018770
Issue Dt:
09/13/2011
Application #:
12274508
Filing Dt:
11/20/2008
Publication #:
US20100124115
Pub Dt:
05/20/2010
Title:
PROGRAM AND SENSE OPERATIONS IN A NON-VOLATILE MEMORY DEVICE
68
Patent #:
7590019
Issue Dt:
09/15/2009
Application #:
12274570
Filing Dt:
11/20/2008
Publication #:
US20090073791
Pub Dt:
03/19/2009
Title:
LOW VOLTAGE DATA PATH AND CURRENT SENSE AMPLIFIER
69
Patent #:
8089805
Issue Dt:
01/03/2012
Application #:
12274727
Filing Dt:
11/20/2008
Publication #:
US20100124108
Pub Dt:
05/20/2010
Title:
TWO-PART PROGRAMMING METHODS AND MEMORIES
70
Patent #:
7595521
Issue Dt:
09/29/2009
Application #:
12274824
Filing Dt:
11/20/2008
Publication #:
US20090072288
Pub Dt:
03/19/2009
Title:
TERRACED FILM STACK
71
Patent #:
8064252
Issue Dt:
11/22/2011
Application #:
12276085
Filing Dt:
11/21/2008
Publication #:
US20100128523
Pub Dt:
05/27/2010
Title:
MULTI-PASS PROGRAMMING IN A MEMORY DEVICE
72
Patent #:
7868369
Issue Dt:
01/11/2011
Application #:
12276152
Filing Dt:
11/21/2008
Publication #:
US20090102018
Pub Dt:
04/23/2009
Title:
LOCALIZED MASKING FOR SEMICONDUCTOR STRUCTURE DEVELOPMENT
73
Patent #:
7781860
Issue Dt:
08/24/2010
Application #:
12276235
Filing Dt:
11/21/2008
Publication #:
US20090072347
Pub Dt:
03/19/2009
Title:
SEMICONDUCTOR CONSTRUCTIONS, AND ELECTRONIC SYSTEMS
74
Patent #:
7743290
Issue Dt:
06/22/2010
Application #:
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Assignor
1
MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Exec Dt:
07/31/2019
Assignee
1
MICRON TECHNOLOGY, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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