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Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
09/10/2013
Application #:
12567321
Filing Dt:
09/25/2009
Publication #:
Pub Dt:
02/18/2010
Title:
SECURE COMPACT FLASH
2
Patent #:
Issue Dt:
08/02/2011
Application #:
12568240
Filing Dt:
09/28/2009
Publication #:
Pub Dt:
03/04/2010
Title:
DRAM LAYOUT WITH VERTICAL FETS AND METHOD OF FORMATION
3
Patent #:
Issue Dt:
10/25/2011
Application #:
12568912
Filing Dt:
09/29/2009
Publication #:
Pub Dt:
01/21/2010
Title:
DEFECTIVE MEMORY BLOCK IDENTIFICATION IN A MEMORY DEVICE
4
Patent #:
Issue Dt:
09/11/2012
Application #:
12569412
Filing Dt:
09/29/2009
Publication #:
Pub Dt:
03/31/2011
Title:
STRIPE BASED MEMORY OPERATION
5
Patent #:
Issue Dt:
01/10/2012
Application #:
12569561
Filing Dt:
09/29/2009
Publication #:
Pub Dt:
02/18/2010
Title:
HIGH ASPECT RATIO CONTACTS
6
Patent #:
Issue Dt:
06/21/2011
Application #:
12569591
Filing Dt:
09/29/2009
Publication #:
Pub Dt:
01/21/2010
Title:
METHOD AND APPARATUS FOR REDUCING OSCILLATION IN SYNCHRONOUS CIRCUITS
7
Patent #:
Issue Dt:
09/18/2012
Application #:
12569661
Filing Dt:
09/29/2009
Publication #:
Pub Dt:
03/31/2011
Title:
STATE CHANGE IN SYSTEMS HAVING DEVICES COUPLED IN A CHAINED CONFIGURATION
8
Patent #:
Issue Dt:
12/21/2010
Application #:
12569754
Filing Dt:
09/29/2009
Publication #:
Pub Dt:
01/28/2010
Title:
MEMORY DEVICE BIT LINE SENSING SYSTEM AND METHOD THAT COMPENSATES FOR BIT LINE RESISTANCE VARIATIONS
9
Patent #:
Issue Dt:
08/02/2011
Application #:
12570138
Filing Dt:
09/30/2009
Publication #:
Pub Dt:
01/21/2010
Title:
SYSTEMS AND METHODS FOR DEFECT TESTING OF EXTERNALLY ACCESSIBLE INTEGRATED CIRCUIT INTERCONNECTS
10
Patent #:
Issue Dt:
01/04/2011
Application #:
12571518
Filing Dt:
10/01/2009
Publication #:
Pub Dt:
01/28/2010
Title:
NON-VOLATILE MULTILEVEL MEMORY CELL PROGRAMMING
11
Patent #:
Issue Dt:
02/08/2011
Application #:
12572027
Filing Dt:
10/01/2009
Publication #:
Pub Dt:
02/11/2010
Title:
METHODS OF FORMING TRENCH ISOLATION AND METHODS OF FORMING ARRAYS OF FLASH MEMORY CELLS
12
Patent #:
Issue Dt:
03/24/2015
Application #:
12572083
Filing Dt:
10/01/2009
Publication #:
Pub Dt:
04/07/2011
Title:
POWER INTERRUPT MANAGEMENT
13
Patent #:
Issue Dt:
05/01/2012
Application #:
12572182
Filing Dt:
10/01/2009
Publication #:
Pub Dt:
04/07/2011
Title:
PARTITIONING PROCESS TO IMPROVE MEMORY CELL RETENTION
14
Patent #:
Issue Dt:
12/10/2013
Application #:
12572428
Filing Dt:
10/02/2009
Publication #:
Pub Dt:
01/28/2010
Title:
FLASH DEVICE SECURITY METHOD UTILIZING A CHECK REGISTER
15
Patent #:
Issue Dt:
01/18/2011
Application #:
12572957
Filing Dt:
10/02/2009
Publication #:
Pub Dt:
01/28/2010
Title:
WORD LINE DRIVERS IN NON-VOLATILE MEMORY DEVICE AND METHOD HAVING A SHARED POWER BANK AND PROCESSOR-BASED SYSTEMS USING SAME
16
Patent #:
Issue Dt:
04/02/2013
Application #:
12573579
Filing Dt:
10/05/2009
Publication #:
Pub Dt:
04/07/2011
Title:
AUTOMATIC SELECTIVE SLOW PROGRAM CONVERGENCE
17
Patent #:
Issue Dt:
08/30/2011
Application #:
12573606
Filing Dt:
10/05/2009
Publication #:
Pub Dt:
04/07/2011
Title:
NON-VOLATILE MEMORY APPARATUS AND METHODS
18
Patent #:
Issue Dt:
10/25/2011
Application #:
12573615
Filing Dt:
10/05/2009
Publication #:
Pub Dt:
01/28/2010
Title:
CORRECTION OF NON-UNIFORM SENSITIVITY IN AN IMAGE ARRAY
19
Patent #:
Issue Dt:
02/22/2011
Application #:
12573750
Filing Dt:
10/05/2009
Publication #:
Pub Dt:
01/28/2010
Title:
ARRAY SENSE AMPLIFIERS, MEMORY DEVICES AND SYSTEMS INCLUDING SAME, AND METHODS OF OPERATION
20
Patent #:
Issue Dt:
12/14/2010
Application #:
12573985
Filing Dt:
10/06/2009
Publication #:
Pub Dt:
01/28/2010
Title:
IMAGER ROW-WISE NOISE CORRECTION
21
Patent #:
Issue Dt:
11/27/2012
Application #:
12575263
Filing Dt:
10/07/2009
Publication #:
Pub Dt:
02/04/2010
Title:
METHOD OF FORMING CAPACITORS
22
Patent #:
Issue Dt:
01/10/2012
Application #:
12577276
Filing Dt:
10/12/2009
Publication #:
Pub Dt:
02/04/2010
Title:
DATA BUS INVERSION APPARATUS, SYSTEMS, AND METHODS
23
Patent #:
Issue Dt:
10/15/2013
Application #:
12577342
Filing Dt:
10/12/2009
Publication #:
Pub Dt:
02/04/2010
Title:
SINGLE SPACER PROCESS FOR MULTIPLYING PITCH BY A FACTOR GREATER THAN TWO AND RELATED INTERMEDIATE IC STRUCTURES
24
Patent #:
Issue Dt:
03/13/2012
Application #:
12577364
Filing Dt:
10/12/2009
Publication #:
Pub Dt:
04/15/2010
Title:
METHOD OF FABRICATING A SEMICONDUCTOR DEVICE
25
Patent #:
Issue Dt:
08/23/2011
Application #:
12577506
Filing Dt:
10/12/2009
Publication #:
Pub Dt:
02/04/2010
Title:
METHODS, DEVICES, AND SYSTEMS FOR A HIGH VOLTAGE TOLERANT BUFFER
26
Patent #:
Issue Dt:
10/23/2012
Application #:
12577567
Filing Dt:
10/12/2009
Publication #:
Pub Dt:
02/04/2010
Title:
ERASABLE NON-VOLATILE MEMORY DEVICE USING HOLE TRAPPING IN HIGH-K DIELECTRICS
27
Patent #:
Issue Dt:
01/10/2012
Application #:
12577602
Filing Dt:
10/12/2009
Title:
INTEGRATED CIRCUIT EDGE AND METHOD TO FABRICATE THE SAME
28
Patent #:
Issue Dt:
10/02/2012
Application #:
12577624
Filing Dt:
10/12/2009
Publication #:
Pub Dt:
02/04/2010
Title:
HAFNIUM TANTALUM OXIDE DIELECTRICS
29
Patent #:
Issue Dt:
12/10/2013
Application #:
12577631
Filing Dt:
10/12/2009
Publication #:
Pub Dt:
04/14/2011
Title:
NON-VOLATILE SRAM CELL THAT INCORPORATES PHASE-CHANGE MEMORY INTO A CMOS PROCESS
30
Patent #:
Issue Dt:
02/14/2012
Application #:
12579187
Filing Dt:
10/14/2009
Publication #:
Pub Dt:
10/21/2010
Title:
ELECTRONIC DEVICE PACKAGE
31
Patent #:
Issue Dt:
02/14/2012
Application #:
12579927
Filing Dt:
10/15/2009
Publication #:
Pub Dt:
02/11/2010
Title:
METHODS OF FORMING MEMORY CELLS ON PILLARS AND MEMORIES WITH MEMORY CELLS ON PILLARS
32
Patent #:
Issue Dt:
02/21/2012
Application #:
12580013
Filing Dt:
10/15/2009
Publication #:
Pub Dt:
04/21/2011
Title:
HIGH-PERFORMANCE DIODE DEVICE STRUCTURE AND MATERIALS USED FOR THE SAME
33
Patent #:
Issue Dt:
07/17/2012
Application #:
12580171
Filing Dt:
10/15/2009
Publication #:
Pub Dt:
05/06/2010
Title:
TECHNIQUES FOR BLOCK REFRESHING A SEMICONDUCTOR MEMORY DEVICE
34
Patent #:
Issue Dt:
02/08/2011
Application #:
12581255
Filing Dt:
10/19/2009
Publication #:
Pub Dt:
02/25/2010
Title:
METHOD FOR FABRICATING SEMICONDUCTOR COMPONENT HAVING ENCAPSULATED THROUGH WIRE INTERCONNECT (TWI)
35
Patent #:
Issue Dt:
03/13/2012
Application #:
12581435
Filing Dt:
10/19/2009
Publication #:
Pub Dt:
02/18/2010
Title:
SEMICONDUCTOR DEVICES WITH SIGNAL SYNCHRONIZATION CIRCUITS
36
Patent #:
Issue Dt:
08/20/2013
Application #:
12581586
Filing Dt:
10/19/2009
Publication #:
Pub Dt:
02/18/2010
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS AND ASSEMBLIES
37
Patent #:
Issue Dt:
12/27/2011
Application #:
12581628
Filing Dt:
10/19/2009
Publication #:
Pub Dt:
02/18/2010
Title:
HAFNIUM TANTALUM OXYNITRIDE DIELECTRIC
38
Patent #:
Issue Dt:
03/22/2011
Application #:
12581674
Filing Dt:
10/19/2009
Publication #:
Pub Dt:
02/18/2010
Title:
MULTI-STATE MEMORY CELL WITH ASYMMETRIC CHARGE TRAPPING
39
Patent #:
Issue Dt:
06/14/2011
Application #:
12581747
Filing Dt:
10/19/2009
Publication #:
Pub Dt:
02/11/2010
Title:
METHODS, CIRCUITS, AND SYSTEMS TO SELECT MEMORY REGIONS
40
Patent #:
Issue Dt:
08/14/2012
Application #:
12582024
Filing Dt:
10/20/2009
Publication #:
Pub Dt:
02/18/2010
Title:
INTEGRATED TWO DEVICE NON-VOLATILE MEMORY
41
Patent #:
Issue Dt:
01/31/2012
Application #:
12582181
Filing Dt:
10/20/2009
Publication #:
Pub Dt:
04/21/2011
Title:
METHODS OF FORMING SILICON OXIDES AND METHODS OF FORMING INTERLEVEL DIELECTRICS
42
Patent #:
Issue Dt:
02/15/2011
Application #:
12582289
Filing Dt:
10/20/2009
Publication #:
Pub Dt:
02/18/2010
Title:
READ OPERATION FOR NAND MEMORY
43
Patent #:
Issue Dt:
05/08/2012
Application #:
12582458
Filing Dt:
10/20/2009
Publication #:
Pub Dt:
04/21/2011
Title:
INDEPENDENT WELL BIAS MANAGEMENT IN A MEMORY DEVICE
44
Patent #:
Issue Dt:
11/25/2014
Application #:
12582643
Filing Dt:
10/20/2009
Title:
Block-Based Storage Device with a Memory-Mapped Interface
45
Patent #:
Issue Dt:
11/20/2012
Application #:
12603151
Filing Dt:
10/21/2009
Publication #:
Pub Dt:
05/06/2010
Title:
POWER SAVINGS WITH MULTIPLE READOUT CIRCUITS
46
Patent #:
Issue Dt:
10/25/2016
Application #:
12603376
Filing Dt:
10/21/2009
Publication #:
Pub Dt:
04/21/2011
Title:
MEMORY HAVING INTERNAL PROCESSORS AND DATA COMMUNICATION METHODS IN MEMORY
47
Patent #:
Issue Dt:
05/06/2014
Application #:
12603393
Filing Dt:
10/21/2009
Publication #:
Pub Dt:
04/21/2011
Title:
MEMORY HAVING INTERNAL PROCESSORS AND METHODS OF CONTROLLING MEMORY ACCESS
48
Patent #:
Issue Dt:
09/27/2011
Application #:
12603759
Filing Dt:
10/22/2009
Publication #:
Pub Dt:
02/18/2010
Title:
ROLLING SHUTTER FOR PREVENTION OF BLOOMING
49
Patent #:
Issue Dt:
01/28/2014
Application #:
12604579
Filing Dt:
10/23/2009
Publication #:
Pub Dt:
04/22/2010
Title:
METHODS FOR SEQUENCING MEMORY ACCESS REQUESTS
50
Patent #:
Issue Dt:
03/20/2012
Application #:
12604653
Filing Dt:
10/23/2009
Publication #:
Pub Dt:
02/18/2010
Title:
METHODS AND APPARATUS FOR VOLTAGE SENSING AND REPORTING
51
Patent #:
Issue Dt:
06/14/2011
Application #:
12605203
Filing Dt:
10/23/2009
Publication #:
Pub Dt:
02/25/2010
Title:
DELAY-LOCK LOOP AND METHOD ADAPTING ITSELF TO OPERATE OVER A WIDE FREQUENCY RANGE
52
Patent #:
Issue Dt:
02/22/2011
Application #:
12605717
Filing Dt:
10/26/2009
Publication #:
Pub Dt:
02/18/2010
Title:
SENSING OF MEMORY CELLS IN A SOLID STATE MEMORY DEVICE BY FIXED DISCHARGE OF A BIT LINE
53
Patent #:
Issue Dt:
08/02/2011
Application #:
12605806
Filing Dt:
10/26/2009
Publication #:
Pub Dt:
02/25/2010
Title:
SELECTIVE EDGE PHASE MIXING
54
Patent #:
Issue Dt:
10/18/2011
Application #:
12606048
Filing Dt:
10/26/2009
Publication #:
Pub Dt:
03/25/2010
Title:
TRANSISTOR FORMING METHODS
55
Patent #:
Issue Dt:
11/13/2012
Application #:
12606486
Filing Dt:
10/27/2009
Publication #:
Pub Dt:
04/28/2011
Title:
ERROR DETECTION/CORRECTION BASED MEMORY MANAGEMENT
56
Patent #:
Issue Dt:
10/26/2010
Application #:
12606618
Filing Dt:
10/27/2009
Publication #:
Pub Dt:
02/18/2010
Title:
EXTERNAL CLOCK TRACKING PIPELINED LATCH SCHEME
57
Patent #:
Issue Dt:
01/15/2013
Application #:
12606756
Filing Dt:
10/27/2009
Publication #:
Pub Dt:
02/18/2010
Title:
CURRENT LIMIT CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE
58
Patent #:
Issue Dt:
05/31/2011
Application #:
12606828
Filing Dt:
10/27/2009
Publication #:
Pub Dt:
02/25/2010
Title:
PROGRAM-VERIFY METHOD
59
Patent #:
Issue Dt:
06/21/2011
Application #:
12608072
Filing Dt:
10/29/2009
Publication #:
Pub Dt:
02/25/2010
Title:
METHOD AND APPARATUS PROVIDING PIXEL STORAGE GATE CHARGE SENSING FOR ELECTRONIC STABILIZATION IN IMAGERS
60
Patent #:
Issue Dt:
10/09/2012
Application #:
12608551
Filing Dt:
10/29/2009
Publication #:
Pub Dt:
05/06/2010
Title:
SIMULATION METHOD FOR TRANSISTOR UNSUITABLE FOR EXISTING MODEL
61
Patent #:
Issue Dt:
01/04/2011
Application #:
12608596
Filing Dt:
10/29/2009
Publication #:
Pub Dt:
02/25/2010
Title:
METHODS OF FORMING PARTICLE-CONTAINING MATERIALS
62
Patent #:
Issue Dt:
05/21/2013
Application #:
12609897
Filing Dt:
10/30/2009
Publication #:
Pub Dt:
02/25/2010
Title:
ZR-SN-TI-O FILMS
63
Patent #:
Issue Dt:
07/08/2014
Application #:
12609930
Filing Dt:
10/30/2009
Publication #:
Pub Dt:
03/24/2011
Title:
Switching Method
64
Patent #:
Issue Dt:
06/11/2013
Application #:
12610922
Filing Dt:
11/02/2009
Publication #:
Pub Dt:
05/05/2011
Title:
METHODS, STRUCTURES AND DEVICES FOR INCREASING MEMORY DENSITY
65
Patent #:
Issue Dt:
02/28/2012
Application #:
12611264
Filing Dt:
11/03/2009
Publication #:
Pub Dt:
03/04/2010
Title:
HIGH PERFORMANCE INPUT RECEIVER CIRCUIT FOR REDUCED-SWING INPUTS
66
Patent #:
Issue Dt:
05/15/2012
Application #:
12611329
Filing Dt:
11/03/2009
Publication #:
Pub Dt:
04/15/2010
Title:
INTEGRATED CMOS IMAGER AND MICROCONTROLLER
67
Patent #:
Issue Dt:
04/03/2012
Application #:
12611349
Filing Dt:
11/03/2009
Publication #:
Pub Dt:
02/25/2010
Title:
METHODS OF FABRICATING INTEGRATED IMAGER AND MICROCONTROLLER
68
Patent #:
Issue Dt:
11/27/2012
Application #:
12611458
Filing Dt:
11/03/2009
Publication #:
Pub Dt:
02/25/2010
Title:
FAST DATA ACCESS MODE IN A MEMORY DEVICE
69
Patent #:
Issue Dt:
06/14/2011
Application #:
12612139
Filing Dt:
11/04/2009
Publication #:
Pub Dt:
02/25/2010
Title:
PROGRAMMING RATE IDENTIFICATION AND CONTROL IN A SOLID STATE MEMORY
70
Patent #:
Issue Dt:
08/14/2012
Application #:
12612248
Filing Dt:
11/04/2009
Publication #:
Pub Dt:
05/05/2011
Title:
MEMORY DEVICE PAGE BUFFER CONFIGURATION AND METHODS
71
Patent #:
Issue Dt:
10/28/2014
Application #:
12612546
Filing Dt:
11/04/2009
Publication #:
Pub Dt:
05/05/2011
Title:
MEMORY CELLS HAVING A FOLDED DIGIT LINE ARCHITECTURE
72
Patent #:
Issue Dt:
12/11/2012
Application #:
12612935
Filing Dt:
11/05/2009
Title:
ERROR-CORRECTING CODE AND PROCESS FOR FAST READ-ERROR CORRECTION
73
Patent #:
Issue Dt:
07/05/2011
Application #:
12612981
Filing Dt:
11/05/2009
Publication #:
Pub Dt:
03/04/2010
Title:
ALIGNMENT OF INSTRUCTIONS AND REPLIES ACROSS MULTIPLE DEVICES IN A CASCADED SYSTEM, USING BUFFERS OF PROGRAMMABLE DEPTHS
74
Patent #:
Issue Dt:
03/22/2011
Application #:
12613114
Filing Dt:
11/05/2009
Publication #:
Pub Dt:
03/04/2010
Title:
TEMPERATURE COMPENSATION OF MEMORY SIGNALS USING DIGITAL SIGNALS
75
Patent #:
Issue Dt:
07/12/2011
Application #:
12613139
Filing Dt:
11/05/2009
Publication #:
Pub Dt:
02/25/2010
Title:
ON-CHIP TEMPERATURE SENSOR
76
Patent #:
Issue Dt:
11/16/2010
Application #:
12613254
Filing Dt:
11/05/2009
Publication #:
Pub Dt:
02/25/2010
Title:
ERASE OPERATION IN A FLASH MEMORY DEVICE
77
Patent #:
Issue Dt:
11/06/2012
Application #:
12613269
Filing Dt:
11/05/2009
Publication #:
Pub Dt:
05/05/2011
Title:
SELECT GATES FOR MEMORY
78
Patent #:
Issue Dt:
07/17/2012
Application #:
12613413
Filing Dt:
11/05/2009
Publication #:
Pub Dt:
02/25/2010
Title:
CONDUCTIVE STRUCTURES FOR MICROFEATURE DEVICES AND METHODS FOR FABRICATING MICROFEATURE DEVICES
79
Patent #:
Issue Dt:
03/01/2011
Application #:
12613632
Filing Dt:
11/06/2009
Publication #:
Pub Dt:
02/25/2010
Title:
METHOD AND APPARATUS FOR HIGH RESOLUTION ZQ CALIBRATION
80
Patent #:
Issue Dt:
02/15/2011
Application #:
12614626
Filing Dt:
11/09/2009
Publication #:
Pub Dt:
03/04/2010
Title:
ADJUSTING PROGRAMMING OR ERASE VOLTAGE PULSES IN RESPONSE TO A RATE OF PROGRAMMING OR ERASING
81
Patent #:
Issue Dt:
03/08/2011
Application #:
12614750
Filing Dt:
11/09/2009
Publication #:
Pub Dt:
03/11/2010
Title:
MEMORY ARRAY SEGMENTATION AND METHODS
82
Patent #:
Issue Dt:
01/10/2012
Application #:
12615083
Filing Dt:
11/09/2009
Publication #:
Pub Dt:
03/04/2010
Title:
LANTHANIDE YTTRIUM ALUMINUM OXIDE DIELECTRIC FILMS
83
Patent #:
Issue Dt:
02/05/2013
Application #:
12615961
Filing Dt:
11/10/2009
Publication #:
Pub Dt:
03/04/2010
Title:
MEMORY IN LOGIC CELL
84
Patent #:
Issue Dt:
03/01/2011
Application #:
12617174
Filing Dt:
11/12/2009
Publication #:
Pub Dt:
03/04/2010
Title:
METHOD AND SYSTEM FOR CONTROLLING REFRESH TO AVOID MEMORY CELL DATA LOSSES
85
Patent #:
Issue Dt:
12/31/2013
Application #:
12617501
Filing Dt:
11/12/2009
Publication #:
Pub Dt:
05/12/2011
Title:
MEMORY ARRAYS AND ASSOCIATED METHODS OF MANUFACTURING
86
Patent #:
Issue Dt:
08/13/2013
Application #:
12617661
Filing Dt:
11/12/2009
Publication #:
Pub Dt:
05/12/2011
Title:
METHOD AND APPARATUSES FOR CUSTOMIZABLE ERROR CORRECTION OF MEMORY
87
Patent #:
Issue Dt:
03/06/2012
Application #:
12618302
Filing Dt:
11/13/2009
Publication #:
Pub Dt:
05/20/2010
Title:
NONVOLATILE MEMORY DEVICE
88
Patent #:
Issue Dt:
02/22/2011
Application #:
12618429
Filing Dt:
11/13/2009
Publication #:
Pub Dt:
03/04/2010
Title:
SYSTEM AND METHOD FOR INITIALIZING A MEMORY SYSTEM, AND MEMORY DEVICE AND PROCESSOR-BASED SYSTEM USING SAME
89
Patent #:
Issue Dt:
04/26/2011
Application #:
12619364
Filing Dt:
11/16/2009
Publication #:
Pub Dt:
03/11/2010
Title:
FILTERED REGISTER ARCHITECTURE TO GENERATE ACTUATOR SIGNALS
90
Patent #:
Issue Dt:
05/08/2012
Application #:
12619438
Filing Dt:
11/16/2009
Publication #:
Pub Dt:
03/11/2010
Title:
MEMORY DEVICE INTERFACE METHODS, APPARATUS, AND SYSTEMS
91
Patent #:
Issue Dt:
04/16/2013
Application #:
12619441
Filing Dt:
11/16/2009
Title:
SYSTEMS AND METHODS FOR MAPPING A NEIGHBORHOOD OF DATA TO GENERAL REGISTERS OF A PROCESSING ELEMENT
92
Patent #:
Issue Dt:
01/25/2011
Application #:
12619528
Filing Dt:
11/16/2009
Publication #:
Pub Dt:
03/11/2010
Title:
BUS WIDTH NEGOTIATION
93
Patent #:
Issue Dt:
08/09/2011
Application #:
12619862
Filing Dt:
11/17/2009
Publication #:
Pub Dt:
03/11/2010
Title:
REDUCING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE
94
Patent #:
Issue Dt:
01/10/2012
Application #:
12620041
Filing Dt:
11/17/2009
Publication #:
Pub Dt:
03/11/2010
Title:
SEAMLESS COARSE AND FINE DELAY STRUCTURE FOR HIGH PERFORMANCE DLL
95
Patent #:
Issue Dt:
02/07/2012
Application #:
12621104
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
05/20/2010
Title:
SEMICONDUCTOR DEVICE WITH TRANSISTOR, CONDUCTIVE PAD, AND CONTACT
96
Patent #:
Issue Dt:
03/13/2012
Application #:
12621167
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
05/20/2010
Title:
SEMICONDUCTOR DEVICE INCLUDING AN ANTI-FUSE ELEMENT
97
Patent #:
Issue Dt:
01/31/2012
Application #:
12621366
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
03/11/2010
Title:
METHOD AND APPARATUS FOR REMOVING MATERIAL FROM MICROFEATURE WORKPIECES
98
Patent #:
Issue Dt:
07/26/2011
Application #:
12621394
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
03/11/2010
Title:
LOW VOLTAGE SENSE AMPLIFIER AND SENSING METHOD
99
Patent #:
Issue Dt:
08/23/2011
Application #:
12621400
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
03/18/2010
Title:
FLEXIBLE RESULTS PIPELINE FOR PROCESSING ELEMENT
100
Patent #:
Issue Dt:
02/15/2011
Application #:
12621413
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
03/11/2010
Title:
METHOD OF FABICATING A MICROELECTRONIC DIE HAVING A CURVED SURFACE
Assignor
1
Exec Dt:
07/31/2019
Assignee
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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