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Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
10/08/2002
Application #:
09464066
Filing Dt:
12/15/1999
Title:
METHOD FOR THE INTEGRATION OF RESISTORS AND ESD SELF-PROTECTED TRANSISTORS IN AN INTEGRATED DEVICE WITH A MEMORY MATRIX MANUFACTURED BY MEANS OF A PROCESS FEATURING SELF-ALIGNED SOURCE (SAS) FORMATION AND JUNCTION SALICIDATION
2
Patent #:
Issue Dt:
01/16/2001
Application #:
09464985
Filing Dt:
12/16/1999
Title:
METHOD AND APPARATUS FOR EPOXY LOC DIE ATTACHMENT
3
Patent #:
Issue Dt:
11/07/2000
Application #:
09464992
Filing Dt:
12/16/1999
Title:
SEMICONDUCTOR DEVICE INCLUDING COMBED BOND PAD OPENING, ASSEMBLIES AND METHODS
4
Patent #:
Issue Dt:
12/18/2001
Application #:
09465350
Filing Dt:
12/16/1999
Title:
METHOD FOR FABRICATING SEMICONDUCTOR PACKAGES USING MOLD TOOLING FIXTURE WITH FLASH CONTROL CAVITIES
5
Patent #:
Issue Dt:
05/18/2004
Application #:
09466134
Filing Dt:
12/21/1999
Title:
MICROTRANSFORMER FOR SYSTEM-ON-CHIP POWER SUPPLY
6
Patent #:
Issue Dt:
08/07/2001
Application #:
09466269
Filing Dt:
12/17/1999
Title:
FLASH MEMORY CELL
7
Patent #:
Issue Dt:
06/11/2002
Application #:
09466364
Filing Dt:
12/17/1999
Title:
METHOD FOR EXPOSING SEMICONDUCTOR WAFERS IN A MANNER THAT PROMOTES RADIAL PROCESSING UNIFORMITY
8
Patent #:
Issue Dt:
04/24/2001
Application #:
09466454
Filing Dt:
12/17/1999
Title:
METHOD OF CONSTRUCTING STACKED PACKAGES
9
Patent #:
Issue Dt:
03/13/2001
Application #:
09467618
Filing Dt:
12/20/1999
Title:
CALIBRATING TEST EQUIPMENT
10
Patent #:
Issue Dt:
05/28/2002
Application #:
09467667
Filing Dt:
12/17/1999
Title:
CIRCUIT AND METHOD FOR CONTACT PAD ISOLATION
11
Patent #:
Issue Dt:
05/15/2001
Application #:
09467726
Filing Dt:
12/20/1999
Title:
VOLTAGE REGULATOR FOR DRIVING PLURAL LOADS BASED ON THE NUMBER OF LOADS BEING DRIVEN
12
Patent #:
Issue Dt:
04/23/2002
Application #:
09467991
Filing Dt:
12/20/1999
Publication #:
Pub Dt:
08/23/2001
Title:
HIGH-Q INDUCTIVE ELEMENTS
13
Patent #:
Issue Dt:
08/13/2002
Application #:
09468239
Filing Dt:
12/20/1999
Title:
METHOD OF FORMING A SELF-ALIGNED CONTACT OPENING
14
Patent #:
Issue Dt:
12/30/2003
Application #:
09468477
Filing Dt:
12/21/1999
Publication #:
Pub Dt:
10/02/2003
Title:
HASH CAM HAVING A REDUCED WIDTH COMPARISON CIRCUITRY AND ITS APPLICATION
15
Patent #:
Issue Dt:
06/22/2004
Application #:
09468965
Filing Dt:
12/21/1999
Title:
METHOD AND APPARATUS FOR MAINTAINING ORDER IN A PIPELINED PROCESS AND ITS APPLICATION
16
Patent #:
Issue Dt:
08/14/2001
Application #:
09469849
Filing Dt:
12/21/1999
Title:
METHOD FOR MANUFACTURING ELECTRONIC DEVICES, COMPRISING NON-SALICIDED NON-VOLATILE MEMORY CELLS, NON-SALICIDED HV TRANSISTORS, AND LV TRANSISTORS WITH SALICIDED JUNCTIONS WITH FEW MASKS
17
Patent #:
Issue Dt:
10/31/2000
Application #:
09470079
Filing Dt:
12/22/1999
Title:
DIFFERENTIAL FLASH MEMORY CELL AND METHOD FOR PROGRAMMING SAME
18
Patent #:
Issue Dt:
11/11/2003
Application #:
09470189
Filing Dt:
12/22/1999
Title:
MULTI-LINK EXTENSIONS AND BUNDLE SKEW MANAGEMENT
19
Patent #:
Issue Dt:
04/17/2007
Application #:
09470265
Filing Dt:
12/22/1999
Publication #:
Pub Dt:
04/04/2002
Title:
DEVICES HAVING IMPROVED CAPACITANCE
20
Patent #:
Issue Dt:
11/18/2003
Application #:
09470574
Filing Dt:
12/22/1999
Title:
METHOD AND APPARATUS FOR SWITCHING AN OPTICAL BEAM
21
Patent #:
Issue Dt:
05/17/2005
Application #:
09470835
Filing Dt:
12/23/1999
Title:
MULTI-PORT CHEMICAL DISPENSE
22
Patent #:
Issue Dt:
01/15/2008
Application #:
09470875
Filing Dt:
12/22/1999
Title:
METHOD AND APPARATUS FOR PERFORMING DISTRIBUTED SIMULATION UTILIZING A SIMULATION BACKPLANE
23
Patent #:
Issue Dt:
12/05/2000
Application #:
09471215
Filing Dt:
12/23/1999
Title:
METHOD OF PATTERNING A SEMICONDUCTOR DEVICE
24
Patent #:
Issue Dt:
05/27/2003
Application #:
09471279
Filing Dt:
12/23/1999
Title:
LARGE GRAIN SINGLE CRYSTAL VERTICAL THIN FILM POLYSILICON MOSFETS
25
Patent #:
Issue Dt:
11/13/2007
Application #:
09471460
Filing Dt:
12/22/1999
Title:
USE OF A PLASMA SOURCE TO FORM A LAYER DURING THE FORMATION OF A SEMICONDUCTOR DEVICE
26
Patent #:
Issue Dt:
04/21/2009
Application #:
09471964
Filing Dt:
12/23/1999
Title:
REAL-TIME PERFORMANCE ASSESSMENT OF LARGE AREA NETWORK USER EXPERIENCE
27
Patent #:
Issue Dt:
07/02/2002
Application #:
09472291
Filing Dt:
12/27/1999
Title:
HIGH SPEED IC PACKAGE CONFIGURATION
28
Patent #:
Issue Dt:
08/14/2001
Application #:
09472496
Filing Dt:
12/27/1999
Title:
PULSE GENERATOR CIRCUIT, PARTICULARLY FOR NON-VOLATILE MEMORIES
29
Patent #:
Issue Dt:
03/26/2002
Application #:
09472728
Filing Dt:
12/27/1999
Title:
METHOD AND APPARATUS FOR BIASING A CIRCUIT BOARD INTO ENGAGEMENT WITH A COMPUTER CHASSIS
30
Patent #:
Issue Dt:
09/30/2003
Application #:
09472839
Filing Dt:
12/28/1999
Title:
TECHNIQUE FOR SYNCHRONIZING FAULTS IN A PROCESSOR HAVING A REPLAY SYSTEM
31
Patent #:
Issue Dt:
08/28/2001
Application #:
09473082
Filing Dt:
12/28/1999
Title:
PROCESS OF FORMING METAL SILICIDE INTERCONNECTS
32
Patent #:
Issue Dt:
04/30/2002
Application #:
09473232
Filing Dt:
12/24/1999
Title:
BUMPED SEMICONDUCTOR COMPONENT HAVING TEST PADS, AND METHOD AND SYSTEM FOR TESTING BUMPED SEMICONDUCTOR COMPONENTS
33
Patent #:
Issue Dt:
06/26/2001
Application #:
09473368
Filing Dt:
12/28/1999
Title:
METHOD FOR FORMING CONTACTLESS MOS TRANSISTORS AND RESULTING DEVICES, ESPECIALLY FOR USE IN NON-VOLATILE MEMORY ARRAYS
34
Patent #:
Issue Dt:
05/06/2003
Application #:
09474183
Filing Dt:
12/29/1999
Title:
FIELD FRAME MOTION DESIGN FOR DIGITAL VIDEO DECODER
35
Patent #:
Issue Dt:
05/14/2002
Application #:
09474566
Filing Dt:
12/29/1999
Title:
VOLTAGE TOLERANT HIGH DRIVE PULL-UP DRIVER FOR AN I/O BUFFER
36
Patent #:
Issue Dt:
03/02/2004
Application #:
09474746
Filing Dt:
12/29/1999
Title:
PARTIAL UNDERFILL FOR FLIP-CHIP ELECTRONIC PACKAGES
37
Patent #:
Issue Dt:
12/23/2003
Application #:
09474750
Filing Dt:
12/29/1999
Title:
SHIFTING AN INPUT SIGNAL FROM A HIGH-SPEED DOMAIN TO A LOWER-SPEED DOMAIN
38
Patent #:
Issue Dt:
11/05/2002
Application #:
09474932
Filing Dt:
12/29/1999
Title:
METHOD FOR READING A MEMORY, PARTICULARLY A NON-VOLATILE MEMORY
39
Patent #:
Issue Dt:
12/16/2003
Application #:
09475029
Filing Dt:
12/30/1999
Title:
INTERFACE TO A MEMORY SYSTEM FOR A PROCESSOR HAVING A REPLAY SYSTEM
40
Patent #:
Issue Dt:
04/30/2002
Application #:
09475164
Filing Dt:
12/30/1999
Title:
PUMP AREA REDUCTION THROUGH THE USE OF PASSIVE RC-FILTERS OR ACTIVE FILTERS
41
Patent #:
Issue Dt:
04/16/2002
Application #:
09475459
Filing Dt:
12/30/1999
Publication #:
Pub Dt:
01/03/2002
Title:
VOLTAGE BLOCKING METHOD AND APPARATUS FOR A CHARGE PUMP WITH DIODE CONNECTED PULL-UP AND PULL-DOWN ON BOOT NODES
42
Patent #:
Issue Dt:
06/04/2002
Application #:
09475546
Filing Dt:
12/30/1999
Title:
SEMICONDUCTOR COMPONENTS HAVING LASERED MACHINED CONDUCTIVE VIAS
43
Patent #:
Issue Dt:
08/28/2001
Application #:
09476036
Filing Dt:
12/31/1999
Title:
REFERENCE VOLTAGE ASJUSTMENT
44
Patent #:
Issue Dt:
07/16/2002
Application #:
09477407
Filing Dt:
01/04/2000
Title:
COUPLED MULTILAYER SOFT MAGNETIC FILMS FOR HIGH FREQUENCY MICROTRANSFORMER FOR SYSTEM-ON-CHIP POWER SUPPLY
45
Patent #:
Issue Dt:
03/27/2001
Application #:
09478385
Filing Dt:
01/06/2000
Title:
PROCESSING COMPOSITIONS AND METHODS OF USING SAME
46
Patent #:
Issue Dt:
03/12/2002
Application #:
09478386
Filing Dt:
01/06/2000
Title:
METHOD OF FORMING OVERMOLDED CHIP SCALE PACKAGE AND RESULTING PRODUCT
47
Patent #:
Issue Dt:
04/02/2002
Application #:
09478745
Filing Dt:
01/06/2000
Title:
Method of fabricating semiconductor devices utilizing in situ passivation of dielectric thin films
48
Patent #:
Issue Dt:
04/16/2002
Application #:
09478975
Filing Dt:
01/06/2000
Publication #:
Pub Dt:
02/14/2002
Title:
METHODS OF FORMING SEMICONDUCTOR STRUCTURES
49
Patent #:
Issue Dt:
06/10/2003
Application #:
09480072
Filing Dt:
01/10/2000
Title:
SEMICONDUCTOR PROCESSING METHODS, METHODS OF FORMING ELECTRONIC COMPONENTS,AND TRANSISTORS
50
Patent #:
Issue Dt:
05/08/2001
Application #:
09480086
Filing Dt:
01/10/2000
Title:
Semiconductor Package Having Downset Leadframe For Reducing Package Bow
51
Patent #:
Issue Dt:
02/27/2001
Application #:
09480450
Filing Dt:
01/10/2000
Title:
Etch residue clean with aqueous hf/organic solution
52
Patent #:
Issue Dt:
07/01/2003
Application #:
09480905
Filing Dt:
01/11/2000
Publication #:
Pub Dt:
09/19/2002
Title:
SEMICONDUCTOR STRUCTURES FORMED USING REDEPOSITION OF AN ETCHABLE LAYER
53
Patent #:
Issue Dt:
09/11/2001
Application #:
09481166
Filing Dt:
01/12/2000
Title:
A METHOD FOR ENCASING ARRAY PACKAGES
54
Patent #:
Issue Dt:
02/06/2001
Application #:
09481947
Filing Dt:
01/12/2000
Title:
Semiconductor die backside surface and method of fabrication
55
Patent #:
Issue Dt:
02/26/2002
Application #:
09482551
Filing Dt:
01/13/2000
Title:
EFFICIENT COMPANDING ALGORITHM SUITABLE FOR COLOR IMAGING
56
Patent #:
Issue Dt:
04/17/2001
Application #:
09482575
Filing Dt:
01/13/2000
Title:
Multiplexed noisy-quiet power busing for improved area efficiencies and pause performance in DRAM memories
57
Patent #:
Issue Dt:
07/10/2001
Application #:
09482671
Filing Dt:
01/13/2000
Title:
Method for reducing surface charge on semiconductor wafers to prevent arcing during plasma deposition
58
Patent #:
Issue Dt:
10/08/2002
Application #:
09483656
Filing Dt:
01/14/2000
Title:
CHIP OUTLINE BAND (COB) STRUCTURE FOR INTEGRATED CIRCUITS
59
Patent #:
Issue Dt:
02/27/2001
Application #:
09483746
Filing Dt:
01/17/2000
Title:
Method of etching thermally grown oxide substantially selectively relative to deposited oxide
60
Patent #:
Issue Dt:
07/16/2002
Application #:
09483869
Filing Dt:
01/18/2000
Title:
STRUCTURES AND METHODS TO ENHANCE COPPER METALLIZATION
61
Patent #:
Issue Dt:
05/01/2007
Application #:
09483881
Filing Dt:
01/18/2000
Title:
SELECTIVE ELECTROLESS-PLATED COPPER METALLIZATION
62
Patent #:
Issue Dt:
04/23/2002
Application #:
09484002
Filing Dt:
01/18/2000
Title:
PROCESS FOR PROVIDING SEED LAYERS FOR USING ALUMINUM, COPPER, GOLD AND SILVER METALLURGY PROCESS FOR PROVIDING SEED LAYERS FOR USING ALUMINUM, COPPER, GOLD AND SILVER METALLURGY
63
Patent #:
Issue Dt:
08/28/2007
Application #:
09484303
Filing Dt:
01/18/2000
Title:
METHODS FOR MAKING INTEGRATED-CIRCUIT WIRING FROM COPPER, SILVER, GOLD, AND OTHER METALS
64
Patent #:
Issue Dt:
06/05/2001
Application #:
09484440
Filing Dt:
01/18/2000
Title:
Digital voltage translator and its method of operation
65
Patent #:
Issue Dt:
03/13/2001
Application #:
09487865
Filing Dt:
01/20/2000
Title:
Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
66
Patent #:
Issue Dt:
07/10/2001
Application #:
09488096
Filing Dt:
01/18/2000
Title:
Metallization on titanium aluminide
67
Patent #:
Issue Dt:
08/27/2002
Application #:
09488947
Filing Dt:
01/18/2000
Title:
SEMICONDUCTOR PROCESSING METHODS OF TRANSFERRING PATTERNS FROM PATTERNED PHOTORESISTS TO MATERIALS, AND STRUCTURES COMPRISING SILICON NITRIDE
68
Patent #:
Issue Dt:
07/09/2002
Application #:
09488949
Filing Dt:
01/21/2000
Title:
METHODS OF FORMING A FIELD EFFECT TRANSISTOR GATE CONSTRUCTION
69
Patent #:
Issue Dt:
09/11/2001
Application #:
09488974
Filing Dt:
01/20/2000
Title:
Methods of thermal processing and rapid thermal processing
70
Patent #:
Issue Dt:
08/21/2001
Application #:
09489113
Filing Dt:
01/21/2000
Title:
Leadframe alteration to direct compound flow into package
71
Patent #:
Issue Dt:
06/10/2003
Application #:
09489998
Filing Dt:
01/21/2000
Title:
ALIGNMENT AND ORIENTATION FEATURES FOR A SEMICONDUCTOR PACKAGE
72
Patent #:
Issue Dt:
04/17/2001
Application #:
09490727
Filing Dt:
01/25/2000
Title:
DIFFERENTIAL VOLTAGE REGULATOR
73
Patent #:
Issue Dt:
07/08/2003
Application #:
09490771
Filing Dt:
01/24/2000
Title:
COMPUTER SYSTEM HAVING REDUCED NUMBER OF BUS BRIDGE TERMINALS
74
Patent #:
Issue Dt:
03/20/2001
Application #:
09490803
Filing Dt:
01/26/2000
Title:
Method and circuit for sending a signal in a semiconductor device during a setup time
75
Patent #:
Issue Dt:
03/26/2002
Application #:
09490933
Filing Dt:
01/25/2000
Title:
Memory Architecture and decoder Addressing
76
Patent #:
Issue Dt:
06/25/2002
Application #:
09491113
Filing Dt:
01/25/2000
Title:
Metal silicidation methods and methods for using same
77
Patent #:
Issue Dt:
07/10/2001
Application #:
09491475
Filing Dt:
01/19/2000
Title:
Capacitive compensation circuit for the regulation of the word line reading voltage in non-volatile memories
78
Patent #:
Issue Dt:
07/10/2001
Application #:
09491476
Filing Dt:
01/19/2000
Title:
Capacitive boosting circuit for the regulation of the word line reading voltage in non-volatile memories
79
Patent #:
Issue Dt:
07/10/2001
Application #:
09491590
Filing Dt:
01/25/2000
Title:
Direct liquid injection system with on-line cleaning
80
Patent #:
Issue Dt:
12/10/2002
Application #:
09492738
Filing Dt:
01/27/2000
Title:
PLASMA ETCHING METHODS
81
Patent #:
Issue Dt:
11/25/2003
Application #:
09493441
Filing Dt:
01/18/2000
Title:
METHOD OF INITIALIZING A PROCESSOR AND COMPUTER SYSTEM
82
Patent #:
Issue Dt:
10/25/2005
Application #:
09493630
Filing Dt:
01/28/2000
Title:
VARIABLE DELAY LINE
83
Patent #:
Issue Dt:
09/06/2005
Application #:
09493663
Filing Dt:
01/28/2000
Title:
PATTERN RECOGNITION WITH THE USE OF MULTIPLE IMAGES
84
Patent #:
Issue Dt:
01/16/2001
Application #:
09494492
Filing Dt:
01/31/2000
Title:
Trap and delay pulse generator for a high speed clock
85
Patent #:
Issue Dt:
10/22/2002
Application #:
09494546
Filing Dt:
01/31/2000
Title:
RETICLE FOR CREATING RESIST-FILLED VIAS IN A DUAL DAMASCENE PROCESS
86
Patent #:
Issue Dt:
10/01/2002
Application #:
09495055
Filing Dt:
01/31/2000
Title:
CIRCUITS AND METHODS FOR TESTING MEMORY CELLS ALONG A PERIPHERY OF A MEMORY ARRAY
87
Patent #:
Issue Dt:
07/10/2001
Application #:
09495142
Filing Dt:
01/31/2000
Title:
Method for cleaning semiconductor device probe
88
Patent #:
Issue Dt:
09/12/2006
Application #:
09495150
Filing Dt:
01/31/2000
Title:
METHOD AND APPARATUS FOR HARDWARE AND SOFTWARE CO-SIMULATION
89
Patent #:
Issue Dt:
07/03/2001
Application #:
09495191
Filing Dt:
01/31/2000
Title:
Wafer for cleaning semiconductor device probe
90
Patent #:
Issue Dt:
03/13/2001
Application #:
09495518
Filing Dt:
02/01/2000
Title:
Method For Selective Etching Of Antireflective Coatings
91
Patent #:
Issue Dt:
05/15/2001
Application #:
09495767
Filing Dt:
02/01/2000
Title:
Circuit and method for reading and writing data in a memory device
92
Patent #:
Issue Dt:
06/26/2007
Application #:
09496794
Filing Dt:
02/02/2000
Title:
TRENCH ISOLATION FOR SEMICONDUCTOR DEVICES
93
Patent #:
Issue Dt:
05/18/2004
Application #:
09497080
Filing Dt:
02/02/2000
Title:
METHODS OF FORMING SILICON DIOXIDE LAYERS, AND METHODS OF FORMING TRENCH ISOLATION REGIONS
94
Patent #:
Issue Dt:
01/09/2001
Application #:
09497295
Filing Dt:
02/03/2000
Title:
Memory device with a sense amplifier
95
Patent #:
Issue Dt:
06/17/2003
Application #:
09497935
Filing Dt:
02/04/2000
Title:
PROCESSING METHODS OF FORMING A CAPACITOR, AND CAPACITOR CONSTRUCTION
96
Patent #:
Issue Dt:
05/18/2004
Application #:
09499594
Filing Dt:
02/07/2000
Title:
METHOD OF FABRICATING A SEMICONDUCTOR WORK OBJECT
97
Patent #:
Issue Dt:
07/08/2003
Application #:
09499726
Filing Dt:
02/08/2000
Title:
STRUCTURES AND METHODS FOR IMPROVED CAPACITOR CELLS IN INTEGRATED CIRCUITS
98
Patent #:
Issue Dt:
04/16/2002
Application #:
09499799
Filing Dt:
02/08/2000
Title:
Priority determining circuit for non-volatile memory
99
Patent #:
Issue Dt:
09/05/2006
Application #:
09500755
Filing Dt:
02/08/2000
Title:
ENHANCED COMPACT FLASH MEMORY CARD
100
Patent #:
Issue Dt:
03/08/2005
Application #:
09501033
Filing Dt:
02/09/2000
Publication #:
Pub Dt:
11/01/2001
Title:
SYSTEM FOR ELECTRICALLY COUPLING A DEVICE TO AN ELECTRICAL APPARATUS
Assignor
1
Exec Dt:
07/31/2019
Assignee
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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