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Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 18018
Page 39 of 181
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1
Patent #:
6515414
Issue Dt:
02/04/2003
Application #:
09564356
Filing Dt:
05/01/2000
Title:
LOW WORK FUNCTION EMITTERS AND METHOD FOR PRODUCTION OF FED'S
2
Patent #:
6781235
Issue Dt:
08/24/2004
Application #:
09565135
Filing Dt:
05/05/2000
Title:
THREE-LEVEL UNITARY INTERCONNECT STRUCTURE
3
Patent #:
6476490
Issue Dt:
11/05/2002
Application #:
09565197
Filing Dt:
05/04/2000
Title:
CONTACT OPENINGS, METHODS OF FORMING ELECTRICAL CONNECTIONS FOR INTERCONNECTIONS, AND INTEGRATED CIRCUITRY
4
Patent #:
7193965
Issue Dt:
03/20/2007
Application #:
09565215
Filing Dt:
05/04/2000
Title:
MULTI-WIRELESS NETWORK CONFIGURABLE BEHAVIOR
5
Patent #:
6411546
Issue Dt:
06/25/2002
Application #:
09565517
Filing Dt:
05/05/2000
Title:
Nonvolatile memory using flexible erasing methods and method and system for using same
6
Patent #:
6558600
Issue Dt:
05/06/2003
Application #:
09565638
Filing Dt:
05/04/2000
Title:
METHOD FOR PACKAGING MICROELECTRONIC SUBSTRATES
7
Patent #:
6552898
Issue Dt:
04/22/2003
Application #:
09566185
Filing Dt:
05/05/2000
Title:
FAN DUCT MODULE
8
Patent #:
6598113
Issue Dt:
07/22/2003
Application #:
09567574
Filing Dt:
05/10/2000
Publication #:
US20020035661
Pub Dt:
03/21/2002
Title:
STATE MACHINE HAVING EACH EXECUTION CYCLE DIRECTLY CONNECTED TO A SUSPEND CYCLE TO ACHIEVE FAST SUSPEND OF ERASE OPERATION IN FLASH MEMORIES
9
Patent #:
6447634
Issue Dt:
09/10/2002
Application #:
09567631
Filing Dt:
05/09/2000
Title:
METHOD AND APPARATUS FOR SELECTIVE REMOVAL OF MATERIAL FROM WAFER ALIGNMENT MARKS
10
Patent #:
6255837
Issue Dt:
07/03/2001
Application #:
09567632
Filing Dt:
05/09/2000
Title:
Apparatus and method for disabling and re-enabling access to ic test functions
11
Patent #:
6469389
Issue Dt:
10/22/2002
Application #:
09567649
Filing Dt:
05/09/2000
Publication #:
US20020093099
Pub Dt:
07/18/2002
Title:
CONTACT PLUG
12
Patent #:
7259464
Issue Dt:
08/21/2007
Application #:
09567673
Filing Dt:
05/09/2000
Title:
VERTICAL TWIST SCHEME FOR HIGH-DENSITY DRAMS
13
Patent #:
6255838
Issue Dt:
07/03/2001
Application #:
09567796
Filing Dt:
05/09/2000
Title:
Apparatus and method for disabling and re-enabling access to IC test functions
14
Patent #:
6291359
Issue Dt:
09/18/2001
Application #:
09568093
Filing Dt:
05/09/2000
Title:
Methods of forming openings and methods of controlling the degree of taper of openings
15
Patent #:
7012811
Issue Dt:
03/14/2006
Application #:
09568156
Filing Dt:
05/10/2000
Title:
METHOD OF TUNING A MULTI-PATH CIRCUIT
16
Patent #:
6200889
Issue Dt:
03/13/2001
Application #:
09568329
Filing Dt:
05/09/2000
Title:
SEMICONDUCTOR BONDING PAD
17
Patent #:
6400574
Issue Dt:
06/04/2002
Application #:
09568676
Filing Dt:
05/11/2000
Title:
MOLDED BALL GRID ARRAY
18
Patent #:
6337511
Issue Dt:
01/08/2002
Application #:
09569216
Filing Dt:
05/11/2000
Title:
Loc semiconductor assembled with room temperature adhesive
19
Patent #:
6292398
Issue Dt:
09/18/2001
Application #:
09569232
Filing Dt:
05/11/2000
Title:
Method for the in-writing verification of the threshold value in non-volatile memories
20
Patent #:
6281447
Issue Dt:
08/28/2001
Application #:
09569446
Filing Dt:
05/12/2000
Title:
SUBSTRATE STRUCTURE
21
Patent #:
6507064
Issue Dt:
01/14/2003
Application #:
09569570
Filing Dt:
05/10/2000
Title:
DOUBLE SIDED CONTAINER CAPACITOR FOR DRAM CELL ARRAY AND METHOD OF FORMING SAME
22
Patent #:
6301152
Issue Dt:
10/09/2001
Application #:
09570332
Filing Dt:
05/12/2000
Title:
Non-volatile memory device with row redundancy
23
Patent #:
6455939
Issue Dt:
09/24/2002
Application #:
09570879
Filing Dt:
05/15/2000
Title:
SUBSTANTIALLY HILLOCK-FREE ALUMINUM-CONTAINING COMPONENTS
24
Patent #:
6281109
Issue Dt:
08/28/2001
Application #:
09571074
Filing Dt:
05/15/2000
Title:
Advance metallization process
25
Patent #:
6522018
Issue Dt:
02/18/2003
Application #:
09571190
Filing Dt:
05/16/2000
Title:
BALL GRID ARRAY CHIP PACKAGES HAVING IMPROVED TESTING AND STACKING CHARACTERISTICS
26
Patent #:
6430094
Issue Dt:
08/06/2002
Application #:
09571206
Filing Dt:
05/16/2000
Title:
METHOD FOR TESTING A MEMORY DEVICE HAVING TWO OR MORE MEMORY ARRAYS
27
Patent #:
6476434
Issue Dt:
11/05/2002
Application #:
09571352
Filing Dt:
05/16/2000
Title:
FOUR F2 FOLDED BIT LINE DRAM CELL STRUCTURE HAVING BURIED BIT AND WORD LINES
28
Patent #:
6380632
Issue Dt:
04/30/2002
Application #:
09571721
Filing Dt:
05/15/2000
Title:
CENTER BOND FLIP-CHIP SEMICONDUCTOR DEVICE AND METHOD OF MAKING IT
29
Patent #:
6271152
Issue Dt:
08/07/2001
Application #:
09571788
Filing Dt:
05/16/2000
Title:
METHOD FOR FORMING OXIDE LAYER IN FIELD REGIONS FO SEMICONDUCTOR SUBSTRATES IN TWO FORMING STEPS WITH ONE STEP PERFORMED AT AN INCREASED PRESSURE
30
Patent #:
6198660
Issue Dt:
03/06/2001
Application #:
09572127
Filing Dt:
05/17/2000
Title:
Synchronous multilevel non-volatile memory and related reading method
31
Patent #:
6269742
Issue Dt:
08/07/2001
Application #:
09572738
Filing Dt:
05/17/2000
Title:
Method and stencil for extruding material on a substrate
32
Patent #:
6484278
Issue Dt:
11/19/2002
Application #:
09573074
Filing Dt:
05/16/2000
Title:
METHOD AND APPARATUS FOR TESTING AN EMBEDDED DRAM
33
Patent #:
6442719
Issue Dt:
08/27/2002
Application #:
09573450
Filing Dt:
05/16/2000
Title:
METHOD AND APPARATUS FOR DETECTING INTERCELL DEFECTS IN A MEMORY DEVICE
34
Patent #:
6436752
Issue Dt:
08/20/2002
Application #:
09573741
Filing Dt:
05/18/2000
Title:
DISPOSABLE SPACER AND METHOD OF FORMING AND USING SAME
35
Patent #:
6518186
Issue Dt:
02/11/2003
Application #:
09574471
Filing Dt:
05/19/2000
Title:
USE OF RESIDUAL ORGANIC COMPOUNDS TO FACILITATE GATE BREAK ON A CARRIER SUBSTRATE FOR A SEMICONDUCTOR DEVICE
36
Patent #:
6229749
Issue Dt:
05/08/2001
Application #:
09574678
Filing Dt:
05/17/2000
Title:
Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals
37
Patent #:
7005966
Issue Dt:
02/28/2006
Application #:
09574736
Filing Dt:
05/18/2000
Title:
REMOTE COMPUTER CONTROLLER AND CONTROL METHOD
38
Patent #:
6426552
Issue Dt:
07/30/2002
Application #:
09574759
Filing Dt:
05/19/2000
Title:
METHODS EMPLOYING HYBRID ADHESIVE MATERIALS TO SECURE COMPONENTS OF SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES TO ONE ANOTHER AND ASSEMBLIES AND PACKAGES INCLUDING COMPONENTS SECURED TO ONE ANOTHER WITH SUCH HYBRID ADHESIVE MATERIALS
39
Patent #:
6297547
Issue Dt:
10/02/2001
Application #:
09574850
Filing Dt:
05/19/2000
Title:
Mounting multiple semiconductor dies in a package
40
Patent #:
6301178
Issue Dt:
10/09/2001
Application #:
09575964
Filing Dt:
05/23/2000
Title:
Reduced cell voltage for memory device
41
Patent #:
6259199
Issue Dt:
07/10/2001
Application #:
09576018
Filing Dt:
05/23/2000
Title:
Electrode structures, display devices containing the same, and methods for making the same
42
Patent #:
6192956
Issue Dt:
02/27/2001
Application #:
09576399
Filing Dt:
05/22/2000
Title:
Method and apparatus for application of spray adhesive to a leadframe for chip bonding
43
Patent #:
6304505
Issue Dt:
10/16/2001
Application #:
09576445
Filing Dt:
05/22/2000
Title:
Differential correlated double sampling dram sense amplifier
44
Patent #:
6225208
Issue Dt:
05/01/2001
Application #:
09576503
Filing Dt:
05/23/2000
Title:
Method and structure for improved alignment tolerance in multiple, singularized plugs
45
Patent #:
6452807
Issue Dt:
09/17/2002
Application #:
09576881
Filing Dt:
05/22/2000
Title:
TEST INTERPOSER FOR USE WITH BALL GRID ARRAY PACKAGES, ASSEMBLIES AND BALL GRID ARRAY PACKAGES INCLUDING SAME, AND METHODS
46
Patent #:
6479864
Issue Dt:
11/12/2002
Application #:
09577390
Filing Dt:
05/25/2000
Title:
SEMICONDUCTOR STRUCTURE HAVING A PLURALITY OF GATE STACKS
47
Patent #:
6592670
Issue Dt:
07/15/2003
Application #:
09578255
Filing Dt:
05/24/2000
Title:
APPARATUS FOR REDUCING WARPAGE DURING APPLICATION AND CURING OF ENCAPSULANT MATERIALS ON A PRINTED CIRCUIT BOARD
48
Patent #:
6373311
Issue Dt:
04/16/2002
Application #:
09578778
Filing Dt:
05/25/2000
Title:
Oscillator and switch-over control circuit for a high-voltage generator
49
Patent #:
6522163
Issue Dt:
02/18/2003
Application #:
09578917
Filing Dt:
05/25/2000
Title:
APPARATUS AND METHOD FOR COUPLING A FIRST NODE TO A SECOND NODE USING SWITCHES WHICH ARE SELECTIVELY CLOCKED FOR FAST SWITCHING TIMES
50
Patent #:
6653243
Issue Dt:
11/25/2003
Application #:
09579333
Filing Dt:
05/25/2000
Publication #:
US20030068886
Pub Dt:
04/10/2003
Title:
METHODS OF CLEANING SURFACES OF COPPER-CONTAINING MATERIALS, AND METHODS OF FORMING OPENINGS TO COPPER-CONTAINING SUBSTRATES
51
Patent #:
6967408
Issue Dt:
11/22/2005
Application #:
09579402
Filing Dt:
05/25/2000
Title:
GATE STACK STRUCTURE
52
Patent #:
6277704
Issue Dt:
08/21/2001
Application #:
09579538
Filing Dt:
05/24/2000
Title:
Microelectronic device fabricating method, method of forming a pair of conductive device components of different base widths from a common deposited conductive layer
53
Patent #:
6584019
Issue Dt:
06/24/2003
Application #:
09579567
Filing Dt:
05/26/2000
Title:
LEAKAGE DETECTION IN FLASH MEMORY CELL
54
Patent #:
6327639
Issue Dt:
12/04/2001
Application #:
09580392
Filing Dt:
05/26/2000
Title:
Method and apparatus for storing location identification information within non-volatile memory devices
55
Patent #:
6229333
Issue Dt:
05/08/2001
Application #:
09580662
Filing Dt:
05/26/2000
Title:
Apparatus for reducing induced switching transients
56
Patent #:
6222788
Issue Dt:
04/24/2001
Application #:
09580860
Filing Dt:
05/30/2000
Title:
Vertical gate transistors in pass transistor logic decode circuits
57
Patent #:
6744082
Issue Dt:
06/01/2004
Application #:
09580901
Filing Dt:
05/30/2000
Title:
STATIC PASS TRANSISTOR LOGIC WITH TRANSISTORS WITH MULTIPLE VERTICAL GATES
58
Patent #:
6288952
Issue Dt:
09/11/2001
Application #:
09583040
Filing Dt:
05/30/2000
Title:
System for improved memory cell access
59
Patent #:
6256242
Issue Dt:
07/03/2001
Application #:
09583478
Filing Dt:
05/31/2000
Title:
Device and method for margin testing a semiconductor memory by applying a stressing voltage simultaneously to complementary and true digit lines
60
Patent #:
6420902
Issue Dt:
07/16/2002
Application #:
09583584
Filing Dt:
05/31/2000
Title:
FIELD PROGRAMMABLE LOGIC ARRAYS WITH TRANSISTORS WITH VERTICAL GATES
61
Patent #:
6963941
Issue Dt:
11/08/2005
Application #:
09583883
Filing Dt:
05/31/2000
Title:
HIGH SPEED BUS TOPOLOGY FOR EXPANDABLE SYSTEMS
62
Patent #:
6583473
Issue Dt:
06/24/2003
Application #:
09584005
Filing Dt:
05/30/2000
Title:
SURFACE CHANNEL MOS TRANSISTORS, METHODS FOR MAKING THE SAME, AND SEMICONDUCTOR DEVICES CONTAINING THE SAME
63
Patent #:
6674167
Issue Dt:
01/06/2004
Application #:
09584157
Filing Dt:
05/31/2000
Title:
MULTILEVEL COPPER INTERCONNECT WITH DOUBLE PASSIVATION
64
Patent #:
6255228
Issue Dt:
07/03/2001
Application #:
09584240
Filing Dt:
05/30/2000
Title:
Method for removing contaminants from a semiconductor wafer
65
Patent #:
6277731
Issue Dt:
08/21/2001
Application #:
09584256
Filing Dt:
05/31/2000
Title:
Method for forming a semiconductor connection with a top surface having an enlarged recess
66
Patent #:
7729943
Issue Dt:
06/01/2010
Application #:
09584520
Filing Dt:
05/31/2000
Title:
REMOTELY MANAGING AND CONTROLLING A CONSUMER APPLIANCE
67
Patent #:
6486108
Issue Dt:
11/26/2002
Application #:
09584552
Filing Dt:
05/31/2000
Title:
CLEANING COMPOSITION USEFUL IN SEMICONDUCTOR INTEGRATED CIRCUIT FABRICATION
68
Patent #:
6219299
Issue Dt:
04/17/2001
Application #:
09584564
Filing Dt:
05/31/2000
Title:
Programmable memory decode circuits with transistors with vertical gates
69
Patent #:
7173339
Issue Dt:
02/06/2007
Application #:
09585682
Filing Dt:
06/01/2000
Title:
SEMICONDUCTOR DEVICE HAVING A SUBSTRATE AN UNDOPED SILICON OXIDE STRUCTURE AND AN OVERLAYING DOPED SILICON OXIDE STRUCTURE WITH A SIDEWALL TERMINATING AT THE UNDOPED SILICON OXIDE STRUCTURE
70
Patent #:
6433583
Issue Dt:
08/13/2002
Application #:
09585916
Filing Dt:
06/02/2000
Title:
CMOS switch circuit for transferring high voltages, in particular for line decoding in nonvolatile memories, with reduced consumption during switching
71
Patent #:
6473311
Issue Dt:
10/29/2002
Application #:
09586048
Filing Dt:
06/02/2000
Title:
GATE AREA RELIEF STRIP FOR A MOLDED I/C PACKAGE
72
Patent #:
6778404
Issue Dt:
08/17/2004
Application #:
09586050
Filing Dt:
06/02/2000
Title:
STACKABLE BALL GRID ARRAY
73
Patent #:
6717245
Issue Dt:
04/06/2004
Application #:
09586243
Filing Dt:
06/02/2000
Title:
CHIP SCALE PACKAGES FORMED BY WAFER LEVEL PROCESSING
74
Patent #:
6320790
Issue Dt:
11/20/2001
Application #:
09586399
Filing Dt:
06/02/2000
Title:
Biasing stage for biasing the drain terminal of a nonvolatile memory cell during the read phase
75
Patent #:
6417076
Issue Dt:
07/09/2002
Application #:
09586952
Filing Dt:
06/05/2000
Title:
AUTOMATED COMBI DEPOSITION APPARATUS AND METHOD
76
Patent #:
6212114
Issue Dt:
04/03/2001
Application #:
09587105
Filing Dt:
06/01/2000
Title:
Methods of identifying defects in an array of memory cells and related integrated circuitry
77
Patent #:
6437375
Issue Dt:
08/20/2002
Application #:
09587190
Filing Dt:
06/05/2000
Title:
PD-SOI SUBSTRATE WITH SUPPRESSED FLOATING BODY EFFECT AND METHOD FOR ITS FABRICATION
78
Patent #:
6545369
Issue Dt:
04/08/2003
Application #:
09587297
Filing Dt:
06/05/2000
Title:
OVERLAY ERROR REDUCTION BY MINIMIZATION OF UNPATTERNED WAFER AREA
79
Patent #:
6601118
Issue Dt:
07/29/2003
Application #:
09589043
Filing Dt:
06/06/2000
Title:
DYNAMIC BUFFER ALLOCATION FOR A COMPUTER SYSTEM
80
Patent #:
6617206
Issue Dt:
09/09/2003
Application #:
09589671
Filing Dt:
06/07/2000
Title:
METHOD OF FORMING A CAPACITOR STRUCTURE
81
Patent #:
6363015
Issue Dt:
03/26/2002
Application #:
09589723
Filing Dt:
06/08/2000
Title:
Reading method for non-volatile memories with sensing ratio variable with the reading voltage, and device to realize said method
82
Patent #:
6461881
Issue Dt:
10/08/2002
Application #:
09589848
Filing Dt:
06/08/2000
Title:
STEREOLITHOGRAPHIC METHOD AND APPARATUS FOR FABRICATING SPACERS FOR SEMICONDUCTOR DEVICES AND RESULTING STRUCTURES
83
Patent #:
6548764
Issue Dt:
04/15/2003
Application #:
09590023
Filing Dt:
06/07/2000
Title:
SEMICONDUCTOR PACKAGES AND METHODS FOR MAKING THE SAME
84
Patent #:
6234877
Issue Dt:
05/22/2001
Application #:
09590035
Filing Dt:
06/07/2000
Title:
Method of chemical mechanical polishing
85
Patent #:
6569753
Issue Dt:
05/27/2003
Application #:
09590418
Filing Dt:
06/08/2000
Title:
COLLAR POSITIONABLE ABOUT A PERIPHERY OF A CONTACT PAD AND AROUND A CONDUCTIVE STRUCTURE SECURED TO THE CONTACT PADS, SEMICONDUCTOR DEVICE COMPONENTS INCLUDING SAME, AND METHODS FOR FABRICATING SAME
86
Patent #:
7138653
Issue Dt:
11/21/2006
Application #:
09590527
Filing Dt:
06/08/2000
Title:
STRUCTURES FOR STABILIZING SEMICONDUCTOR DEVICES RELATIVE TO TEST SUBSTRATES AND METHODS FOR FABRICATING THE STABILIZERS
87
Patent #:
6480974
Issue Dt:
11/12/2002
Application #:
09590612
Filing Dt:
06/09/2000
Title:
METHOD FOR USE OF BUS PARKING STATES TO COMMUNICATE DIAGNOSTIC INFORMATION
88
Patent #:
7557452
Issue Dt:
07/07/2009
Application #:
09590646
Filing Dt:
06/08/2000
Title:
REINFORCED, SELF-ALIGNING CONDUCTIVE STRUCTURES FOR SEMICONDUCTOR DEVICE COMPONENTS AND METHODS FOR FABRICATING SAME
89
Patent #:
6482736
Issue Dt:
11/19/2002
Application #:
09590791
Filing Dt:
06/08/2000
Title:
METHODS FOR FORMING AND INTEGRATED CIRCUIT STRUCTURES CONTAINING ENHANCED-SURFACE-AREA CONDUCTIVE LAYERS
90
Patent #:
6501170
Issue Dt:
12/31/2002
Application #:
09591144
Filing Dt:
06/09/2000
Title:
PRE-APPLIED ADHESION PROMOTER
91
Patent #:
6329689
Issue Dt:
12/11/2001
Application #:
09591969
Filing Dt:
06/12/2000
Title:
SEMICONDUCTOR DEVICES COMPRISING SEMICONDUCTIVE MATERIAL SUBSTRATES AND INSULATOR LAYERS OVER THE SUBSTRATES
92
Patent #:
6227590
Issue Dt:
05/08/2001
Application #:
09592057
Filing Dt:
06/12/2000
Title:
Method of constructing a wafer carrier
93
Patent #:
6237979
Issue Dt:
05/29/2001
Application #:
09592356
Filing Dt:
06/12/2000
Title:
Wafer carrier having both a rigid structure and resistance to corrosive environments
94
Patent #:
6424043
Issue Dt:
07/23/2002
Application #:
09592441
Filing Dt:
06/12/2000
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY MEMORY DEVICES, METHODS OF FORMING CAPACITOR CONTAINERS, METHODS OF MAKING ELECTRICAL CONNECTION TO CIRCUIT NODES AND RELATED INTEGRATED CIRCUITRY
95
Patent #:
6635552
Issue Dt:
10/21/2003
Application #:
09592604
Filing Dt:
06/12/2000
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
96
Patent #:
6646945
Issue Dt:
11/11/2003
Application #:
09592933
Filing Dt:
06/13/2000
Title:
REFERENCE VOLTAGE FILTER FOR MEMORY MODULES
97
Patent #:
6431960
Issue Dt:
08/13/2002
Application #:
09593046
Filing Dt:
06/12/2000
Title:
FIXED ABRASIVE POLISHING PAD
98
Patent #:
6504891
Issue Dt:
01/07/2003
Application #:
09594050
Filing Dt:
06/14/2000
Title:
TIMER CIRCUIT WITH PROGRAMMABLE DECODE CIRCUITRY
99
Patent #:
6420742
Issue Dt:
07/16/2002
Application #:
09594817
Filing Dt:
06/16/2000
Title:
FERROELECTRIC MEMORY TRANSISTOR WITH HIGH-K GATE INSULATOR AND METHOD OF FABRICATION
100
Patent #:
6589820
Issue Dt:
07/08/2003
Application #:
09595623
Filing Dt:
06/16/2000
Title:
METHOD AND APPARATUS FOR PACKAGING A MICROELECTRONIC DIE
Assignor
1
MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Exec Dt:
07/31/2019
Assignee
1
MICRON TECHNOLOGY, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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