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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
11/12/2002
Application #:
09628527
Filing Dt:
07/31/2000
Title:
FABRICATION OF SEMICONDUCTOR GETTERING STRUCTURES BY ION IMPLANTATION
2
Patent #:
Issue Dt:
01/21/2003
Application #:
09628620
Filing Dt:
07/31/2000
Title:
FABRICATION OF SEMICONDUCTOR GETTERING STRUCTURES BY ION IMPLANTATION
3
Patent #:
Issue Dt:
05/14/2002
Application #:
09628833
Filing Dt:
07/31/2000
Title:
Selectively adjusting surface tension of soldermask material
4
Patent #:
Issue Dt:
04/22/2003
Application #:
09628913
Filing Dt:
07/31/2000
Title:
SACRIFICE READ TEST MODE
5
Patent #:
Issue Dt:
08/20/2002
Application #:
09629229
Filing Dt:
07/31/2000
Title:
ENABLING CIRCUIT FOR OUTPUT DEVICES IN ELECTRONIC MEMORIES
6
Patent #:
Issue Dt:
03/18/2003
Application #:
09629395
Filing Dt:
08/01/2000
Title:
METHOD OF FORMING A CIRCUITRY FABRICATION MASK HAVING A SUBTRACTIVE ALTERNATING PHASE SHIFT REGION
7
Patent #:
Issue Dt:
09/18/2001
Application #:
09629573
Filing Dt:
07/31/2000
Title:
Method and apparatus for multiple row activation in memory devices
8
Patent #:
Issue Dt:
08/20/2002
Application #:
09629602
Filing Dt:
07/31/2000
Title:
APPARATUS AND STRUCTURE FOR RAPID ENABLEMENT
9
Patent #:
Issue Dt:
08/28/2001
Application #:
09629998
Filing Dt:
08/01/2000
Title:
Multiple step methods for forming conformal layers
10
Patent #:
Issue Dt:
11/19/2002
Application #:
09630110
Filing Dt:
08/01/2000
Title:
ANIMATION PACKAGER FOR AN ON-LINE BOOK
11
Patent #:
Issue Dt:
03/18/2003
Application #:
09630549
Filing Dt:
08/01/2000
Title:
LOW LOSS HIGH Q INDUCTOR
12
Patent #:
Issue Dt:
03/26/2002
Application #:
09630933
Filing Dt:
08/02/2000
Title:
Flow process for producing non-volatile memories with differentiated removal of the sacrificial oxide
13
Patent #:
Issue Dt:
04/29/2003
Application #:
09631003
Filing Dt:
08/02/2000
Title:
ANODICALLY-BONDED ELEMENTS FOR FLAT PANEL DISPLAYS
14
Patent #:
Issue Dt:
04/02/2002
Application #:
09631187
Filing Dt:
08/02/2000
Title:
METHOD FOR PROGRAMMING MULTI-LEVEL NON-VOLATILE MEMORIES BY CONTROLLING THE GATE VOLTAGE
15
Patent #:
Issue Dt:
07/23/2002
Application #:
09631259
Filing Dt:
08/02/2000
Title:
BALL ARRAY LAYOUT
16
Patent #:
Issue Dt:
05/06/2003
Application #:
09631329
Filing Dt:
08/03/2000
Title:
METHOD OF PASSIVATING AN OXIDE SURFACE SUBJECTED TO A CONDUCTIVE MATERIAL ANNEAL
17
Patent #:
Issue Dt:
08/19/2003
Application #:
09632087
Filing Dt:
08/02/2000
Title:
LOW PROFILE BALL GRID ARRAY PACKAGE
18
Patent #:
Issue Dt:
02/11/2003
Application #:
09632088
Filing Dt:
08/02/2000
Title:
ACID BLEND FOR REMOVING ETCH RESIDUE
19
Patent #:
Issue Dt:
08/21/2001
Application #:
09632234
Filing Dt:
08/04/2000
Title:
Methods of reducing corrosion of materials, methods of protecting aluminum within aluminum-comprising layers from electrochemical degradation during semiconductor processing, and semiconductor processing methods of forming aluminum-comprising lines
20
Patent #:
Issue Dt:
11/19/2002
Application #:
09632493
Filing Dt:
08/03/2000
Title:
METHOD FOR GENERATING MEMORY ADDRESSES FOR TESTING MEMORY DEVICES
21
Patent #:
Issue Dt:
09/24/2002
Application #:
09632830
Filing Dt:
08/07/2000
Title:
SELECTIVE CAP LAYERS OVER RECESSED POLYSILICON PLUGS
22
Patent #:
Issue Dt:
11/20/2001
Application #:
09633334
Filing Dt:
08/07/2000
Title:
Row decoding circuit for a semiconductor non-volatile electrically programmable memory and corresponding method
23
Patent #:
Issue Dt:
09/20/2005
Application #:
09633375
Filing Dt:
08/07/2000
Title:
CIRCUIT AND METHOD FOR MEASURING AND FORCING AN INTERNAL VOLTAGE OF AN INTEGRATED CIRCUIT
24
Patent #:
Issue Dt:
11/19/2002
Application #:
09633555
Filing Dt:
08/07/2000
Title:
SEMICONDUCTOR PACKAGE HAVING METAL FOIL DIE MOUNTING PLATE
25
Patent #:
Issue Dt:
12/09/2003
Application #:
09633556
Filing Dt:
08/07/2000
Title:
METHODS OF INCORPORATING NITROGEN INTO SILICON-OXIDE-CONTAINING LAYERS
26
Patent #:
Issue Dt:
02/26/2002
Application #:
09633925
Filing Dt:
08/08/2000
Title:
Gate coupled voltage support for an output driver circuit
27
Patent #:
Issue Dt:
02/26/2002
Application #:
09634069
Filing Dt:
08/08/2000
Title:
Cancellation of redundant elements with a cancel bank
28
Patent #:
Issue Dt:
04/01/2003
Application #:
09634490
Filing Dt:
08/08/2000
Title:
TITANIUM BORIDE GATE ELECTRODE AND INTERCONNECT
29
Patent #:
Issue Dt:
09/18/2001
Application #:
09634998
Filing Dt:
08/08/2000
Title:
Method for repairing bump and divot defects in a phase shifting mask
30
Patent #:
Issue Dt:
09/11/2001
Application #:
09635022
Filing Dt:
08/04/2000
Title:
Die paddle clamping method for wire bond enhancement
31
Patent #:
Issue Dt:
04/08/2003
Application #:
09635082
Filing Dt:
08/08/2000
Title:
TITANIUM BORIDE GATE ELECTRODE AND INTERCONNECT AND METHODS REGARDING SAME
32
Patent #:
Issue Dt:
09/03/2002
Application #:
09635965
Filing Dt:
08/10/2000
Title:
CIRCUIT FOR PROGRAMMING ANTIFUSE BITS
33
Patent #:
Issue Dt:
03/04/2003
Application #:
09636155
Filing Dt:
08/10/2000
Title:
INTEGRATED CIRCUIT DEVICES INCLUDING CONNECTION COMPONENTS MECHANICALLY AND ELECTRICALLY ATTACHED TO SEMICONDUCTOR DICE
34
Patent #:
Issue Dt:
09/18/2001
Application #:
09636363
Filing Dt:
08/11/2000
Title:
Data output buffer with precharge
35
Patent #:
Issue Dt:
06/26/2001
Application #:
09636397
Filing Dt:
08/09/2000
Title:
Floating gate MOS transistor charge injection circuit and computation devices incorporating it
36
Patent #:
Issue Dt:
10/01/2002
Application #:
09638227
Filing Dt:
08/14/2000
Title:
METHOD FOR FORMING CONDUCTIVE STRUCTURES
37
Patent #:
Issue Dt:
03/18/2003
Application #:
09638276
Filing Dt:
08/14/2000
Title:
REDUCED TERMINAL TESTING SYSTEM
38
Patent #:
Issue Dt:
02/18/2003
Application #:
09638390
Filing Dt:
08/15/2000
Title:
LOW CAPACITANCE WIRING LAYOUT AND METHOD FOR MAKING SAME
39
Patent #:
Issue Dt:
03/26/2002
Application #:
09638415
Filing Dt:
08/14/2000
Title:
MAGNETO-RESISTIVE MEMORY WITH SHARED WORDLINE AND SENSE LINE
40
Patent #:
Issue Dt:
05/21/2002
Application #:
09638419
Filing Dt:
08/14/2000
Title:
PASSIVATED MAGNETO-RESISTIVE BIT STRUCTURE AND PASSIVATION METHOD THEREFOR
41
Patent #:
Issue Dt:
12/10/2002
Application #:
09638637
Filing Dt:
08/14/2000
Title:
PULSED WRITE TECHNIQUES FOR MAGNETORESISTIVE MEMORIES
42
Patent #:
Issue Dt:
11/05/2002
Application #:
09639088
Filing Dt:
08/16/2000
Title:
METHOD OF FORMING NOBLE METAL PATTERN
43
Patent #:
Issue Dt:
08/20/2002
Application #:
09639090
Filing Dt:
08/16/2000
Title:
METHOD FOR MAKING SHALLOW TRENCHES FOR ISOLATION
44
Patent #:
Issue Dt:
05/01/2001
Application #:
09639358
Filing Dt:
08/14/2000
Title:
Low profile multi-ic chip package connector
45
Patent #:
Issue Dt:
09/25/2001
Application #:
09639359
Filing Dt:
08/14/2000
Title:
Plastic lead frames for semiconductor devices, packages including same, and methods of fabrication
46
Patent #:
Issue Dt:
02/18/2003
Application #:
09639369
Filing Dt:
08/15/2000
Title:
TREATMENT OF EXPOSED SILICON AND SILICON DIOXIDE SURFACES
47
Patent #:
Issue Dt:
03/11/2003
Application #:
09639395
Filing Dt:
08/15/2000
Title:
INTERPOSERS HAVING ENCAPSULANT FILL CONTROL FEATURES
48
Patent #:
Issue Dt:
07/22/2003
Application #:
09639422
Filing Dt:
08/14/2000
Title:
HERMETIC CHIP AND METHOD OF MANUFACTURE
49
Patent #:
Issue Dt:
09/24/2002
Application #:
09639580
Filing Dt:
08/14/2000
Title:
NUCLEATION FOR IMPROVED FLASH ERASE CHARACTERISTICS
50
Patent #:
Issue Dt:
01/25/2005
Application #:
09639625
Filing Dt:
08/15/2000
Title:
PLASMA INDUCED DEPLETION OF FLUORINE FROM SURFACES OF FLUORINATED LOW-K DIELECTRIC MATERIALS
51
Patent #:
Issue Dt:
10/30/2001
Application #:
09639875
Filing Dt:
08/16/2000
Title:
Device and method for repairing a semiconductor memory
52
Patent #:
Issue Dt:
09/25/2007
Application #:
09639917
Filing Dt:
08/16/2000
Title:
METHOD AND APPARATUS FOR REMOVING ENCAPSULATING MATERIAL FROM A PACKAGED MICROELECTRONIC DEVICE
53
Patent #:
Issue Dt:
03/12/2002
Application #:
09639991
Filing Dt:
08/16/2000
Title:
Method and apparatus for reducing current drain caused by row to column shorts in a memory device
54
Patent #:
Issue Dt:
12/02/2003
Application #:
09640333
Filing Dt:
08/16/2000
Title:
STRUCTURE INCLUDING ELECTROPHORETICALLY DEPOSITED PATTERNABLE MATERIAL FOR USE IN PROVIDING A DISPLAY
55
Patent #:
Issue Dt:
04/20/2004
Application #:
09640740
Filing Dt:
08/18/2000
Title:
METHOD AND APPARATUS FOR COMBINING ARCHITECTURES WITH LOGIC OPTION
56
Patent #:
Issue Dt:
04/22/2003
Application #:
09640741
Filing Dt:
08/18/2000
Title:
PROGRAMMABLE ELEMENT LATCH CIRCUIT
57
Patent #:
Issue Dt:
12/03/2002
Application #:
09641065
Filing Dt:
08/17/2000
Title:
INTEGRATED CIRCUIT TEST MODE WITH EXTERNALLY FORCED REFERENCE VOLTAGE
58
Patent #:
Issue Dt:
10/01/2002
Application #:
09641067
Filing Dt:
08/17/2000
Title:
NOVEL MASKED NITROGEN ENHANCED GATE OXIDE
59
Patent #:
Issue Dt:
08/27/2002
Application #:
09641165
Filing Dt:
08/16/2000
Title:
METHOD AND APPARATUS FOR PREDICTING PROCESS CHARACTERISTICS OF POLYURETHANE PADS
60
Patent #:
Issue Dt:
11/11/2003
Application #:
09641518
Filing Dt:
08/21/2000
Title:
MEMORY DEVICE HAVING POSTED WRITE PER COMMAND
61
Patent #:
Issue Dt:
07/24/2001
Application #:
09641623
Filing Dt:
08/18/2000
Title:
Package stack via bottom leaded plastic (BLP) packaging
62
Patent #:
Issue Dt:
09/03/2002
Application #:
09641881
Filing Dt:
08/17/2000
Title:
METHOD AND SYSTEM FOR HIDING REFRESHES IN A DYNAMIC RANDOM ACCESS MEMORY
63
Patent #:
Issue Dt:
04/08/2003
Application #:
09642019
Filing Dt:
08/21/2000
Title:
METHOD AND DEVICE FOR IMPROVED LITHOGRAPHIC CRITICAL DIMENSION CONTROL
64
Patent #:
Issue Dt:
02/05/2002
Application #:
09642089
Filing Dt:
08/21/2000
Title:
Memory circuit with local isolation and pre-charge circuits
65
Patent #:
Issue Dt:
06/04/2002
Application #:
09642134
Filing Dt:
08/18/2000
Title:
DEVICE AND METHOD FOR STACKING WIRE-BONDED INTEGRATED CIRCUIT DICE ON FLIP-CHIP BONDED INTEGRATED CIRCUIT DICE
66
Patent #:
Issue Dt:
12/17/2002
Application #:
09642341
Filing Dt:
08/21/2000
Title:
MULTIPLE BIT LINE COLUMN REDUNDANCY
67
Patent #:
Issue Dt:
10/22/2002
Application #:
09642355
Filing Dt:
08/21/2000
Title:
DEVICE AND METHOD FOR REDUCING IDLE CYCLES IN A SEMICONDUCTOR MEMORY DEVICE
68
Patent #:
Issue Dt:
08/28/2001
Application #:
09642399
Filing Dt:
08/18/2000
Title:
Apparatus for forming materials
69
Patent #:
Issue Dt:
07/02/2002
Application #:
09642427
Filing Dt:
08/21/2000
Title:
REDUCTION/OXIDATION MATERIAL REMOVAL METHOD
70
Patent #:
Issue Dt:
09/03/2002
Application #:
09642683
Filing Dt:
08/21/2000
Title:
ARCHITECTURE, PACKAGE ORIENTATION AND ASSEMBLY OF MEMORY DEVICES
71
Patent #:
Issue Dt:
06/22/2004
Application #:
09642774
Filing Dt:
08/22/2000
Title:
METHOD AND APPARATUS FOR A SHIFT REGISTER BASED INTERCONNECTION FOR A MASSIVELY PARALLEL PROCESSOR ARRAY
72
Patent #:
Issue Dt:
08/21/2001
Application #:
09642775
Filing Dt:
08/22/2000
Title:
Column redundancy for prefetch
73
Patent #:
Issue Dt:
03/19/2002
Application #:
09642781
Filing Dt:
08/22/2000
Title:
Method of consturcting a very wide, very fast distributed memory
74
Patent #:
Issue Dt:
07/17/2001
Application #:
09642956
Filing Dt:
08/21/2000
Title:
Low temperature anti-reflective coating for IC lithography
75
Patent #:
Issue Dt:
02/25/2003
Application #:
09642960
Filing Dt:
08/21/2000
Title:
INTEGRATED CIRCUITS USING OPTICAL FIBER INTERCONNECTS FORMED THROUGH A SEMICONDUCTOR WAFER AND METHODS FOR FORMING SAME
76
Patent #:
Issue Dt:
09/17/2002
Application #:
09642976
Filing Dt:
08/18/2000
Title:
PREHEATING OF CHEMICAL VAPOR DEPOSITION PRECURSORS
77
Patent #:
Issue Dt:
03/20/2007
Application #:
09643004
Filing Dt:
08/21/2000
Title:
LOW SELECTIVITY DEPOSITION METHODS
78
Patent #:
Issue Dt:
05/29/2001
Application #:
09643202
Filing Dt:
08/21/2000
Title:
Microelectronic substrate assemblies and methods of manufacturing such microelectronic substrate assemblies for use in mechanical and chemical-mechanical planarization processes
79
Patent #:
Issue Dt:
08/20/2002
Application #:
09643296
Filing Dt:
08/22/2000
Title:
VERTICAL GATE TRANSISTORS IN PASS TRANSISTOR PROGRAMMABLE LOGIC ARRAYS
80
Patent #:
Issue Dt:
06/29/2004
Application #:
09643526
Filing Dt:
08/22/2000
Title:
CIRCUIT BOARD
81
Patent #:
Issue Dt:
05/13/2003
Application #:
09644196
Filing Dt:
08/22/2000
Title:
APPARATUS AND METHODS OF SEMICONDUCTOR PACKAGES HAVING CIRCUIT-BEARING INTERCONNECT COMPONENTS
82
Patent #:
Issue Dt:
01/28/2003
Application #:
09644254
Filing Dt:
08/22/2000
Title:
METHOD OF FORMING A NON-CONFORMAL LAYER OVER AND EXPOSING A TRENCH
83
Patent #:
Issue Dt:
09/03/2002
Application #:
09644257
Filing Dt:
08/22/2000
Title:
COATED SEMICONDUCTOR DIE/LEADFRAME ASSEMBLY AND METHOD FOR COATING THE ASSEMBLY
84
Patent #:
Issue Dt:
07/17/2001
Application #:
09644352
Filing Dt:
08/23/2000
Title:
Method for using thin spacers and oxidation in gate oxides
85
Patent #:
Issue Dt:
05/13/2003
Application #:
09644365
Filing Dt:
08/23/2000
Title:
SMALL SCALE ACTUATORS AND METHODS FOR THEIR FORMATION AND USE
86
Patent #:
Issue Dt:
08/06/2002
Application #:
09644497
Filing Dt:
08/23/2000
Title:
METHOD FOR CELL MARGIN TESTING A DYNAMIC CELL PLATE SENSING MEMORY ARCHITECTURE
87
Patent #:
Issue Dt:
01/04/2005
Application #:
09644700
Filing Dt:
08/24/2000
Title:
METHOD FOR SIMULTANEOUS FORMATION OF FUSE AND CAPACITOR PLATE AND RESULTING STRUCTURE
88
Patent #:
Issue Dt:
08/19/2003
Application #:
09644766
Filing Dt:
08/23/2000
Title:
STACKED MICROELECTRONIC DIES AND METHODS FOR STACKING MICROELECTRONIC DIES
89
Patent #:
Issue Dt:
07/09/2002
Application #:
09645256
Filing Dt:
08/24/2000
Title:
HIGH DENSITY STACKABLE AND FLEXIBLE SUBTRATE-BASED DEVICES AND SYSTEMS AND METHODS OF FABRICATING
90
Patent #:
Issue Dt:
08/31/2004
Application #:
09645373
Filing Dt:
08/24/2000
Title:
HIGH DENSITY STACKABLE AND FLEXIBLE SUBSTRATE-BASED DEVICES AND SYSTEMS AND METHODS OF FABRICATING
91
Patent #:
Issue Dt:
06/22/2004
Application #:
09645580
Filing Dt:
08/25/2000
Title:
SINGLE INSTRUCTION MULTIPLE DATA MASSIVELY PARALLEL PROCESSOR SYSTEMS ON A CHIP AND SYSTEM USING SAME
92
Patent #:
Issue Dt:
10/29/2002
Application #:
09645711
Filing Dt:
08/24/2000
Title:
PROCESS FOR REALIZING AN INTERMEDIATE DIELECTRIC LAYER FOR ENHANCING THE PLANARITY IN SEMICONDUCTOR ELECTRONIC DEVICES
93
Patent #:
Issue Dt:
08/26/2003
Application #:
09645833
Filing Dt:
08/25/2000
Title:
METHODS OF BALL GRID ARRAY
94
Patent #:
Issue Dt:
12/30/2008
Application #:
09645903
Filing Dt:
08/25/2000
Title:
METHODS FOR FABRICATING RESIDUE-FREE CONTACT OPENINGS
95
Patent #:
Issue Dt:
02/25/2003
Application #:
09645904
Filing Dt:
08/25/2000
Title:
METHOD AND APPARATUS FOR MARKING A BARE SEMICONDUCTOR DIE WITH A TAPE HAVING OPTICAL MARKING PROPERTIES
96
Patent #:
Issue Dt:
06/04/2002
Application #:
09645905
Filing Dt:
08/25/2000
Title:
Surface mount ic using silicon vias in an area array format or same size as die array
97
Patent #:
Issue Dt:
06/11/2002
Application #:
09645907
Filing Dt:
08/25/2000
Title:
Tantalum - aluminum - nitrogen material for semiconductor devices
98
Patent #:
Issue Dt:
07/02/2002
Application #:
09645947
Filing Dt:
08/25/2000
Title:
USE OF PALLADIUM IN IC MANUFACTURING
99
Patent #:
Issue Dt:
09/04/2001
Application #:
09647194
Filing Dt:
10/20/2000
Title:
Memory system
100
Patent #:
Issue Dt:
09/11/2001
Application #:
09648008
Filing Dt:
08/21/2000
Title:
Field effect transistor having improved hot carrier immunity
Assignor
1
Exec Dt:
07/31/2019
Assignee
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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