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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
08/10/2004
Application #:
10039517
Filing Dt:
01/03/2002
Publication #:
Pub Dt:
05/23/2002
Title:
SYSTEM AND DEVICE INCLUDING A BARRIER LAYER
2
Patent #:
Issue Dt:
03/25/2003
Application #:
10039785
Filing Dt:
10/26/2001
Publication #:
Pub Dt:
06/06/2002
Title:
METHOD FOR GENERATING MEMORY ADDRESSES FOR ACCESSING MEMORY-CELL ARRAYS IN MEMORY DEVICES
3
Patent #:
Issue Dt:
09/22/2009
Application #:
10041543
Filing Dt:
01/07/2002
Publication #:
Pub Dt:
07/10/2003
Title:
METHOD AND APPARATUS FOR HEADER UPDATING
4
Patent #:
Issue Dt:
05/20/2003
Application #:
10041684
Filing Dt:
10/24/2001
Title:
MEMORY DEVICE
5
Patent #:
Issue Dt:
05/11/2004
Application #:
10041781
Filing Dt:
10/18/2001
Publication #:
Pub Dt:
05/16/2002
Title:
DYNAMIC RANGE EXTENSION FOR CMOS IMAGE SENSORS
6
Patent #:
Issue Dt:
03/23/2004
Application #:
10042707
Filing Dt:
05/16/2002
Publication #:
Pub Dt:
09/18/2003
Title:
ELECTRONIC DEVICE WORKPIECES, METHODS OF SEMICONDUCTOR PROCESSING AND METHODS OF SENSING TEMPERATURE OF AN ELECTRONIC DEVICE WORKPIECE
7
Patent #:
Issue Dt:
09/23/2003
Application #:
10042922
Filing Dt:
01/09/2002
Publication #:
Pub Dt:
05/23/2002
Title:
ANTIFUSE DETECTION CIRCUIT
8
Patent #:
Issue Dt:
04/19/2005
Application #:
10042924
Filing Dt:
01/09/2002
Publication #:
Pub Dt:
07/18/2002
Title:
P-CHANNEL DYNAMIC FLASH MEMORY CELLS WITH ULTRATHIN TUNNEL OXIDES
9
Patent #:
Issue Dt:
05/03/2005
Application #:
10042925
Filing Dt:
01/09/2002
Publication #:
Pub Dt:
07/18/2002
Title:
P-CHANNEL DYNAMIC FLASH MEMORY CELLS WITH ULTRATHIN TUNNEL OXIDES
10
Patent #:
Issue Dt:
06/21/2005
Application #:
10043065
Filing Dt:
01/09/2002
Publication #:
Pub Dt:
08/22/2002
Title:
P-CHANNEL DYNAMIC FLASH MEMORY CELLS WITH ULTRATHIN TUNNEL OXIDES
11
Patent #:
Issue Dt:
09/27/2005
Application #:
10043104
Filing Dt:
01/14/2002
Publication #:
Pub Dt:
05/16/2002
Title:
SEMICONDUCTOR PACKAGE
12
Patent #:
Issue Dt:
05/06/2003
Application #:
10043199
Filing Dt:
01/14/2002
Publication #:
Pub Dt:
05/23/2002
Title:
NOVEL FILM COMPOSITION
13
Patent #:
Issue Dt:
07/08/2003
Application #:
10043430
Filing Dt:
01/09/2002
Publication #:
Pub Dt:
07/10/2003
Title:
METHODS OF FORMING FLASH FIELD EFFECT TRANSISTOR GATES AND NON-FLASH FIELD EFFECT TRANSISTOR GATES
14
Patent #:
Issue Dt:
07/01/2003
Application #:
10043431
Filing Dt:
01/09/2002
Publication #:
Pub Dt:
07/10/2003
Title:
METHODS OF ELECTROLESS DEPOSITION OF NICKEL, AND METHODS OF FORMING UNDER BUMP METALLURGY, AND CONSTRUCTIONS COMPRISING SOLDER BUMPS
15
Patent #:
Issue Dt:
08/24/2004
Application #:
10043468
Filing Dt:
01/10/2002
Publication #:
Pub Dt:
05/16/2002
Title:
METHOD OF FORMING OVERMOLDED CHIP SCALE PACKAGE AND RESULTING PRODUCT
16
Patent #:
Issue Dt:
07/15/2003
Application #:
10044097
Filing Dt:
01/11/2002
Publication #:
Pub Dt:
08/08/2002
Title:
METHOD FOR MULTILEVEL COPPER INTERCONNECTS FOR ULTRA LARGE SCALE INTEGRATION
17
Patent #:
Issue Dt:
10/03/2006
Application #:
10044178
Filing Dt:
01/10/2002
Publication #:
Pub Dt:
05/23/2002
Title:
SEMICONDUCTOR DEVICE INCORPORATING AN ELECTRICAL CONTACT TO AN INTERNAL CONDUCTIVE LAYER AND METHOD FOR MAKING THE SAME
18
Patent #:
Issue Dt:
06/10/2003
Application #:
10044352
Filing Dt:
01/10/2002
Publication #:
Pub Dt:
05/09/2002
Title:
APPARATUS FOR EXTERNALLY TIMING HIGH VOLTAGE CYCLES OF NON-VOLATILE MEMORY SYSTEM
19
Patent #:
Issue Dt:
09/11/2007
Application #:
10044743
Filing Dt:
01/11/2002
Publication #:
Pub Dt:
08/08/2002
Title:
APPARATUS FOR ESTABLISHING AN ELECTRICAL CONNECTION WITH A WAFER TO FACILITATE WAFER-LEVEL BURN-IN AND METHODS
20
Patent #:
Issue Dt:
07/09/2002
Application #:
10045420
Filing Dt:
01/15/2002
Title:
TEST SYSTEM HAVING ALIGNMENT MEMBER FOR ALIGNING SEMICONDUCTOR COMPONENTS
21
Patent #:
Issue Dt:
06/10/2003
Application #:
10045825
Filing Dt:
10/19/2001
Publication #:
Pub Dt:
05/23/2002
Title:
Packages formed by attaching a semiconductor chip to a leadframe with a footprint of about the same size as the chip
22
Patent #:
Issue Dt:
04/15/2003
Application #:
10046338
Filing Dt:
10/26/2001
Publication #:
Pub Dt:
07/18/2002
Title:
METHOD AND CIRCUIT FOR REGULATING THE OUTPUT VOLTAGE FROM A CHARGE PUMP CIRCUIT, AND MEMORY DEVICE USING SAME
23
Patent #:
Issue Dt:
02/25/2003
Application #:
10047184
Filing Dt:
10/23/2001
Publication #:
Pub Dt:
06/20/2002
Title:
CIRCUITS AND METHODS FOR COMPRESSING MULTI-LEVEL DATA THROUGH A SINGLE INPUT/OUTPUT PIN
24
Patent #:
Issue Dt:
02/11/2003
Application #:
10047185
Filing Dt:
10/23/2001
Publication #:
Pub Dt:
07/11/2002
Title:
CIRCUITS AND METHODS FOR INPUTTING MULTI-LEVEL DATA THROUGH A SINGLE INPUT/OUTPUT PIN
25
Patent #:
Issue Dt:
05/06/2003
Application #:
10047285
Filing Dt:
01/14/2002
Publication #:
Pub Dt:
05/08/2003
Title:
RAIL-TO-RAIL CMOS COMPARATOR
26
Patent #:
Issue Dt:
04/12/2005
Application #:
10047324
Filing Dt:
01/14/2002
Publication #:
Pub Dt:
07/17/2003
Title:
CAS LATENCY SELECT UTILIZING MULTILEVEL SIGNALING
27
Patent #:
Issue Dt:
01/13/2004
Application #:
10047349
Filing Dt:
01/14/2002
Publication #:
Pub Dt:
09/19/2002
Title:
SILICON PLUGS AND LOCAL INTERCONNECT FOR EMBEDDED MEMORY AND SYSTEM-ON-CHIP (SOC) APPLICATIONS
28
Patent #:
Issue Dt:
03/16/2004
Application #:
10047382
Filing Dt:
01/14/2002
Publication #:
Pub Dt:
05/23/2002
Title:
RF POWERED PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION REACTOR AND METHODS OF EFFECTING PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION
29
Patent #:
Issue Dt:
02/04/2003
Application #:
10047476
Filing Dt:
10/23/2001
Publication #:
Pub Dt:
06/27/2002
Title:
CIRCUITS AND METHODS FOR OUTPUTTING MULTI-LEVEL DATA THROUGH A SINGLE INPUT/OUTPUT PIN
30
Patent #:
Issue Dt:
10/28/2003
Application #:
10047477
Filing Dt:
10/23/2001
Publication #:
Pub Dt:
08/01/2002
Title:
TECHNIQUE FOR GATED LATERAL BIPOLAR TRANSISTORS
31
Patent #:
Issue Dt:
02/25/2003
Application #:
10047619
Filing Dt:
01/16/2002
Publication #:
Pub Dt:
05/16/2002
Title:
CIRCUIT CONFIGURATION FOR ENHANCING PERFORMANCE CHARACTERISTICS OF FABRICATED DEVICES
32
Patent #:
Issue Dt:
12/03/2002
Application #:
10047797
Filing Dt:
01/15/2002
Publication #:
Pub Dt:
07/04/2002
Title:
STRESS RELIEVING TAPE BONDING INTERCONNECT
33
Patent #:
Issue Dt:
09/30/2003
Application #:
10047808
Filing Dt:
01/16/2002
Publication #:
Pub Dt:
05/23/2002
Title:
CIRCUIT CONFIGURATION FOR CONTROLLING SIGNAL PROPAGATION FABRICATED DEVICES
34
Patent #:
Issue Dt:
11/04/2003
Application #:
10047918
Filing Dt:
01/14/2002
Publication #:
Pub Dt:
10/17/2002
Title:
METHOD AND CIRCUIT FOR DYNAMIC READING OF A MEMORY CELL, IN PARTICULAR A MULTI-LEVEL NONVOLATILE MEMORY CELL
35
Patent #:
Issue Dt:
04/26/2005
Application #:
10050067
Filing Dt:
01/17/2002
Publication #:
Pub Dt:
07/24/2003
Title:
FAST ALGORITHM TO EXTRACT FLAT INFORMATION FROM HIERARCHICAL NETLISTS
36
Patent #:
Issue Dt:
06/14/2005
Application #:
10050339
Filing Dt:
01/15/2002
Publication #:
Pub Dt:
07/17/2003
Title:
MAGNETIC SHIELD FOR INTEGRATED CIRCUIT PACKAGING
37
Patent #:
Issue Dt:
03/18/2008
Application #:
10050347
Filing Dt:
01/15/2002
Publication #:
Pub Dt:
07/25/2002
Title:
METHODS OF FORMING TRANSISTORS
38
Patent #:
Issue Dt:
12/02/2008
Application #:
10050348
Filing Dt:
01/15/2002
Publication #:
Pub Dt:
07/18/2002
Title:
TRANSISTOR STRUCTURES
39
Patent #:
Issue Dt:
10/07/2008
Application #:
10050373
Filing Dt:
01/15/2002
Publication #:
Pub Dt:
07/18/2002
Title:
METHODS OF FORMING A NITROGEN ENRICHED REGION
40
Patent #:
Issue Dt:
09/13/2005
Application #:
10050404
Filing Dt:
01/15/2002
Publication #:
Pub Dt:
07/17/2003
Title:
MODE ENTRY CIRCUIT AND METHOD
41
Patent #:
Issue Dt:
10/31/2006
Application #:
10050507
Filing Dt:
01/16/2002
Publication #:
Pub Dt:
07/17/2003
Title:
ELIMINATION OF RDL USING TAPE BASE FLIP CHIP ON FLEX FOR DIE STACKING
42
Patent #:
Issue Dt:
03/04/2003
Application #:
10050631
Filing Dt:
01/15/2002
Publication #:
Pub Dt:
05/23/2002
Title:
TRANSISTOR AND METHOD OF MAKING THE SAME
43
Patent #:
Issue Dt:
09/14/2004
Application #:
10050986
Filing Dt:
01/18/2002
Publication #:
Pub Dt:
05/16/2002
Title:
METHOD AND APPARATUS FOR REDUCING THE LOCK TIME OF A DLL
44
Patent #:
Issue Dt:
03/11/2003
Application #:
10051269
Filing Dt:
01/18/2002
Publication #:
Pub Dt:
07/18/2002
Title:
PROCESSING COMPOSITIONS AND METHODS OF USING SAME
45
Patent #:
Issue Dt:
09/28/2004
Application #:
10051678
Filing Dt:
01/16/2002
Publication #:
Pub Dt:
07/17/2003
Title:
METHODS OF FORMING INTEGRATED CIRCUITRY, SEMICONDUCTOR PROCESSING METHODS, AND PROCESSING METHOD OF FORMING MRAM CIRCUITRY
46
Patent #:
Issue Dt:
05/11/2004
Application #:
10051679
Filing Dt:
01/16/2002
Publication #:
Pub Dt:
07/17/2003
Title:
MAGNETORESISTIVE MEMORY DEVICES AND ASSEMBLIES; AND METHODS OF STORING AND RETRIEVING INFORMATION
47
Patent #:
Issue Dt:
05/24/2005
Application #:
10051890
Filing Dt:
01/16/2002
Title:
FABRICATION OF STACKED MICROELECTRONIC DEVICES
48
Patent #:
Issue Dt:
07/08/2003
Application #:
10052178
Filing Dt:
01/16/2002
Publication #:
Pub Dt:
06/06/2002
Title:
NON-CONDUCTIVE AND SELF-LEVELING LEADFRAME CLAMP INSERT FOR WIREBONDING INTEGRATED CIRCUITS
49
Patent #:
Issue Dt:
05/24/2005
Application #:
10052952
Filing Dt:
01/17/2002
Publication #:
Pub Dt:
07/17/2003
Title:
THREE-DIMENSIONAL PHOTONIC CRYSTAL WAVEGUIDE STRUCTURE AND METHOD
50
Patent #:
Issue Dt:
07/27/2004
Application #:
10052983
Filing Dt:
01/17/2002
Publication #:
Pub Dt:
07/17/2003
Title:
HIGHLY RELIABLE AMORPHOUS HIGH-K GATE DIELECTRIC ZROXNY
51
Patent #:
Issue Dt:
03/28/2006
Application #:
10053003
Filing Dt:
01/17/2002
Publication #:
Pub Dt:
07/17/2003
Title:
THREE-DIMENSIONAL COMPLETE BANDGAP PHOTONIC CRYSTAL FORMED BY CRYSTAL MODIFICATION
52
Patent #:
Issue Dt:
09/12/2006
Application #:
10053300
Filing Dt:
01/17/2002
Publication #:
Pub Dt:
07/17/2003
Title:
TRANSISTOR STRUCTURE HAVING REDUCED TRANSISTOR LEAKAGE ATTRIBUTES
53
Patent #:
Issue Dt:
10/12/2004
Application #:
10054255
Filing Dt:
01/22/2002
Publication #:
Pub Dt:
07/24/2003
Title:
TECHNIQUE FOR REDUCING MEMORY LATENCY DURING A MEMORY REQUEST
54
Patent #:
Issue Dt:
09/24/2002
Application #:
10054418
Filing Dt:
01/22/2002
Publication #:
Pub Dt:
05/30/2002
Title:
METHOD FOR PROVIDING AN ALIGNMENT DIFFRACTION GRATING FOR PHOTOLITHOGRAPHIC ALIGNMENT DURING SEMICONDUCTOR FABRICATION
55
Patent #:
Issue Dt:
10/18/2005
Application #:
10054451
Filing Dt:
01/18/2002
Title:
FILE MANAGEMENT OF ONE-TIME-PROGRAMMABLE NONVOLATILE MEMORY DEVICES
56
Patent #:
Issue Dt:
10/12/2004
Application #:
10054556
Filing Dt:
01/22/2002
Publication #:
Pub Dt:
07/24/2003
Title:
WRITE CLOCK AND DATA WINDOW TUNING BASED ON RANK SELECT
57
Patent #:
Issue Dt:
07/18/2006
Application #:
10054692
Filing Dt:
12/19/2001
Title:
POLISHING PAD REFURBISHER FOR IN SITU, REAL-TIME CONDITIONING AND CLEANING OF A POLISHING PAD USED IN CHEMICAL-MECHANICAL POLISHING OF MICROELECTRONIC SUBSTRATES
58
Patent #:
Issue Dt:
06/17/2003
Application #:
10055512
Filing Dt:
10/25/2001
Publication #:
Pub Dt:
08/08/2002
Title:
DRAM PROCESSING METHODS
59
Patent #:
Issue Dt:
11/29/2005
Application #:
10055514
Filing Dt:
02/14/2002
Title:
METHOD AND APPARATUS FOR GENERATING A PULSE
60
Patent #:
Issue Dt:
04/05/2005
Application #:
10056155
Filing Dt:
01/24/2002
Publication #:
Pub Dt:
09/26/2002
Title:
RADIO FREQUENCY AMPLIFIER WITH IMPROVED INTERMODULATION PERFORMANCE
61
Patent #:
Issue Dt:
08/24/2004
Application #:
10056179
Filing Dt:
01/22/2002
Publication #:
Pub Dt:
07/24/2003
Title:
FLOATING GATE TRANSISTOR STI
62
Patent #:
Issue Dt:
12/09/2003
Application #:
10056183
Filing Dt:
01/24/2002
Publication #:
Pub Dt:
06/06/2002
Title:
SELECTIVE POLYSILICON STUD GROWTH OF 6F2 MEMORY CELL MANUFACTURING HAVING A CONVEX UPPER SURFACE PROFILE
63
Patent #:
Issue Dt:
04/15/2003
Application #:
10056263
Filing Dt:
01/23/2002
Title:
SEMICONDUCTOR PROCESSING METHODS, AND SEMICONDUCTOR CONSTRUCTIONS
64
Patent #:
Issue Dt:
02/08/2005
Application #:
10056350
Filing Dt:
01/24/2002
Publication #:
Pub Dt:
06/13/2002
Title:
PROCESS FOR PROVIDING ELECTRICAL CONNECTION BETWEEN A SEMICONDUCTOR DIE AND A SEMICONDUCTOR DIE RECEIVING MEMBER
65
Patent #:
Issue Dt:
09/23/2003
Application #:
10057162
Filing Dt:
01/24/2002
Publication #:
Pub Dt:
06/27/2002
Title:
PASSIVATED MAGNETO-RESISTIVE BIT STRUCTURE AND PASSIVATION METHOD THEREFOR
66
Patent #:
Issue Dt:
02/08/2005
Application #:
10057205
Filing Dt:
01/25/2002
Publication #:
Pub Dt:
05/08/2003
Title:
SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR ELECTRICALLY ISOLATING MODULES
67
Patent #:
Issue Dt:
07/15/2003
Application #:
10057363
Filing Dt:
10/29/2001
Publication #:
Pub Dt:
06/06/2002
Title:
REFLECTANCE METHOD FOR EVALUATING THE SURFACE CHARACTERISTICS OF OPAQUE MATERIALS
68
Patent #:
Issue Dt:
12/23/2003
Application #:
10057768
Filing Dt:
01/24/2002
Publication #:
Pub Dt:
08/22/2002
Title:
METHOD FOR REFRESHING STORED DATA IN AN ELECTRICALLY ERASABLE AND PROGRAMMABLE NON-VOLATILE MEMORY
69
Patent #:
Issue Dt:
09/09/2003
Application #:
10057769
Filing Dt:
01/24/2002
Publication #:
Pub Dt:
10/24/2002
Title:
NON-VOLATILE, ELECTRICALLY ALTERABLE SEMICONDUCTOR MEMORY
70
Patent #:
Issue Dt:
12/16/2003
Application #:
10058357
Filing Dt:
01/30/2002
Publication #:
Pub Dt:
09/26/2002
Title:
COMPOSITION AND METHOD FOR CLEANING RESIDUAL DEBRIS FROM SEMICONDUCTOR SURFACES
71
Patent #:
Issue Dt:
07/22/2003
Application #:
10059308
Filing Dt:
01/31/2002
Publication #:
Pub Dt:
07/11/2002
Title:
ALD METHOD TO IMPROVE SURFACE COVERAGE
72
Patent #:
Issue Dt:
01/06/2004
Application #:
10060076
Filing Dt:
01/29/2002
Publication #:
Pub Dt:
12/26/2002
Title:
ANALOG-TO-DIGITAL CONVERSION METHOD AND DEVICE, IN HIGH-DENSITY MULTILEVEL NON-VOLATILE MEMORY DEVICES
73
Patent #:
Issue Dt:
08/10/2004
Application #:
10060105
Filing Dt:
01/29/2002
Publication #:
Pub Dt:
09/26/2002
Title:
CIRCUIT FOR THE DETECTION OF A DEFECTIVE POWER SUPPLY CONNECTION
74
Patent #:
Issue Dt:
02/18/2003
Application #:
10060532
Filing Dt:
01/30/2002
Publication #:
Pub Dt:
08/01/2002
Title:
METHOD AND COMPOSITE FOR DECREASING CHARGE LEAKAGE
75
Patent #:
Issue Dt:
06/08/2004
Application #:
10060613
Filing Dt:
01/30/2002
Publication #:
Pub Dt:
07/11/2002
Title:
METHOD AND COMPOSITE FOR DECREASING CHARGE LEAKAGE
76
Patent #:
Issue Dt:
09/05/2006
Application #:
10060801
Filing Dt:
01/30/2002
Publication #:
Pub Dt:
07/31/2003
Title:
CAPACITIVE TECHNIQUES TO REDUCE NOISE IN HIGH SPEED INTERCONNECTIONS
77
Patent #:
Issue Dt:
07/15/2003
Application #:
10060894
Filing Dt:
01/29/2002
Publication #:
Pub Dt:
07/11/2002
Title:
BURIED BIT LINE MEMORY CIRCUITRY
78
Patent #:
Issue Dt:
11/26/2002
Application #:
10061531
Filing Dt:
02/01/2002
Publication #:
Pub Dt:
08/01/2002
Title:
METHOD OF FORMING DRAM CIRCUITRY
79
Patent #:
Issue Dt:
10/15/2002
Application #:
10061715
Filing Dt:
02/01/2002
Publication #:
Pub Dt:
09/19/2002
Title:
ANTIFUSE REROUTE OF DIES
80
Patent #:
Issue Dt:
12/14/2004
Application #:
10061739
Filing Dt:
01/31/2002
Publication #:
Pub Dt:
07/31/2003
Title:
METHOD OF FORMING FIELD EFFECT TRANSISTOR COMPRISING AT LEAST ONE OF A CONDUCTIVE METAL OR METAL COMPOUND IN ELECTRICAL CONNECTION WITH TRANSISTOR GATE SEMICONDUCTOR MATERIAL
81
Patent #:
Issue Dt:
11/25/2008
Application #:
10061907
Filing Dt:
02/01/2002
Publication #:
Pub Dt:
08/07/2003
Title:
DIGITAL CAMERA WITH ISO PICKUP SENSITIVITY ADJUSTMENT
82
Patent #:
Issue Dt:
04/01/2003
Application #:
10062892
Filing Dt:
01/30/2002
Publication #:
Pub Dt:
07/25/2002
Title:
METHODS OF FORMING SEMICONDUCTOR STRUCTURES
83
Patent #:
Issue Dt:
11/25/2003
Application #:
10066013
Filing Dt:
10/22/2001
Publication #:
Pub Dt:
08/01/2002
Title:
SEMICONDUCTOR CONSTRUCTIONS
84
Patent #:
Issue Dt:
12/28/2010
Application #:
10067410
Filing Dt:
02/04/2002
Publication #:
Pub Dt:
06/13/2002
Title:
METHOD FOR FORMING A SELECTIVE CONTACT AND LOCAL INTERCONNECT IN SITU
85
Patent #:
Issue Dt:
03/18/2003
Application #:
10067592
Filing Dt:
02/04/2002
Publication #:
Pub Dt:
07/11/2002
Title:
METHOD OF MANUFACTURING LOC SEMICONDUCTOR ASSEMBLED WITH ROOM TEMPERATURE ADHESIVE
86
Patent #:
Issue Dt:
11/26/2002
Application #:
10068081
Filing Dt:
02/06/2002
Publication #:
Pub Dt:
07/04/2002
Title:
LOW PROFILE MULTI-IC CHIP PACKAGE CONNECTOR
87
Patent #:
Issue Dt:
02/19/2008
Application #:
10068159
Filing Dt:
02/05/2002
Publication #:
Pub Dt:
08/07/2003
Title:
STACKED DIE IN DIE BGA PACKAGE
88
Patent #:
Issue Dt:
02/17/2004
Application #:
10068165
Filing Dt:
02/05/2002
Publication #:
Pub Dt:
08/07/2003
Title:
BOC BGA PACKAGE FOR DIE WITH I-SHAPED BOND PAD LAYOUT
89
Patent #:
Issue Dt:
05/20/2003
Application #:
10068198
Filing Dt:
02/06/2002
Publication #:
Pub Dt:
06/27/2002
Title:
METHOD AND STRUCTURE FOR AN IMPROVED FLOATING GATE MEMORY CELL
90
Patent #:
Issue Dt:
08/19/2003
Application #:
10068211
Filing Dt:
02/06/2002
Publication #:
Pub Dt:
07/04/2002
Title:
METHOD AND STRUCTURE FOR AN IMPROVED FLOATING GATE MEMORY CELL
91
Patent #:
Issue Dt:
05/11/2004
Application #:
10068465
Filing Dt:
02/06/2002
Publication #:
Pub Dt:
08/07/2003
Title:
MAGNETO-RESISTIVE MEMORY CELL STRUCTURES WITH IMPROVED SELECTIVITY
92
Patent #:
Issue Dt:
08/26/2003
Application #:
10068698
Filing Dt:
02/06/2002
Publication #:
Pub Dt:
07/04/2002
Title:
METHOD AND STRUCTURE FOR AN IMPROVED FLOATING GATE MEMORY CELL
93
Patent #:
Issue Dt:
02/15/2005
Application #:
10068819
Filing Dt:
02/05/2002
Title:
MASKING FLUX FOR SEMICONDUCTOR COMPONENTS
94
Patent #:
Issue Dt:
12/09/2003
Application #:
10068836
Filing Dt:
02/11/2002
Publication #:
Pub Dt:
10/24/2002
Title:
HIGHLY RELIABLE GATE OXIDE AND METHOD OF FABRICATION
95
Patent #:
Issue Dt:
06/20/2006
Application #:
10071425
Filing Dt:
02/08/2002
Publication #:
Pub Dt:
08/14/2003
Title:
SEMICONDUCTOR PROCESSING METHOD USING PHOTORESIST AND AN ANTIREFLECTIVE COATING
96
Patent #:
Issue Dt:
06/06/2006
Application #:
10071453
Filing Dt:
02/08/2002
Publication #:
Pub Dt:
06/13/2002
Title:
PLURALITY OF TRANSISTORS HAVING DIFFERENT ACTIVE AREA WIDTHS AND DIFFERENT THRESHOLD VOLTAGES DEFINED BY STI
97
Patent #:
Issue Dt:
03/11/2003
Application #:
10071942
Filing Dt:
02/05/2002
Publication #:
Pub Dt:
06/20/2002
Title:
INTERDIGITATED CAPACITOR DESIGN FOR INTEGRATED CIRCUIT LEAD FRAMES AND METHOD
98
Patent #:
Issue Dt:
06/17/2003
Application #:
10071943
Filing Dt:
02/05/2002
Publication #:
Pub Dt:
06/20/2002
Title:
HIGH SPEED IC PACKAGE CONFIGURATION
99
Patent #:
Issue Dt:
06/29/2004
Application #:
10071972
Filing Dt:
02/05/2002
Title:
INCREASING THE MEMORY PERFORMANCE OF FLASH MEMORY DEVICES BY WRITING SECTORS SIMULTANEOUSLY TO MULTIPLE FLASH MEMORY DEVICES
100
Patent #:
Issue Dt:
09/18/2007
Application #:
10072015
Filing Dt:
02/07/2002
Publication #:
Pub Dt:
07/25/2002
Title:
MODIFIED SOURCE/DRAIN RE-OXIDATION METHOD AND SYSTEM
Assignor
1
Exec Dt:
07/31/2019
Assignee
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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