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Patent #:
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|
Issue Dt:
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04/18/2006
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Application #:
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10230678
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Filing Dt:
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08/29/2002
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Publication #:
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Pub Dt:
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03/04/2004
| | | | |
Title:
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METHODS FOR CREATING ELECTROPHORETICALLY INSULATED VIAS IN SEMICONDUCTIVE SUBSTRATES AND RESULTING STRUCTURES
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Patent #:
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|
Issue Dt:
|
12/26/2006
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Application #:
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10230712
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Filing Dt:
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08/29/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
|
METHODS FOR FORMING POROUS INSULATORS FROM "VOID" CREATING MATERIALS AND, STRUCTURES AND SEMICONDUCTOR DEVICES INCLUDING SAME
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|
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Patent #:
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Issue Dt:
|
06/07/2005
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Application #:
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10230732
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Filing Dt:
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08/29/2002
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Publication #:
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Pub Dt:
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12/26/2002
| | | | |
Title:
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SEMICONDUCTOR DEVICES WITH CONDUCTIVE LINES THAT ARE LATERALLY OFFSET RELATIVE TO CORRESPONDING CONTACTS
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|
Patent #:
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|
Issue Dt:
|
12/28/2004
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Application #:
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10230761
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Filing Dt:
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08/28/2002
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
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PACKAGED MICROELECTRONIC COMPONENTS
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|
Patent #:
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|
Issue Dt:
|
10/13/2009
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Application #:
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10230795
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Filing Dt:
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08/29/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
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PROGRAMMABLE CAPACITOR ASSOCIATED WITH AN INPUT/OUTPUT PAD
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|
Patent #:
|
|
Issue Dt:
|
07/27/2004
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Application #:
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10230809
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Filing Dt:
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08/29/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
|
LOW DOSE SUPER DEEP SOURCE/DRAIN IMPLANT
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|
|
Patent #:
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|
Issue Dt:
|
12/16/2003
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Application #:
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10230905
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Filing Dt:
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08/29/2002
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Publication #:
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Pub Dt:
|
01/09/2003
| | | | |
Title:
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MEMORY ADDRESS AND DECODE CIRCUITS WITH ULTRA THIN BODY TRANSISTORS
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|
|
Patent #:
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|
Issue Dt:
|
09/28/2004
|
Application #:
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10230927
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Filing Dt:
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08/29/2002
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Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
METHOD FOR REDUCING DRAIN DISTURB IN PROGRAMMING
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|
|
Patent #:
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|
Issue Dt:
|
01/04/2005
|
Application #:
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10230929
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Filing Dt:
|
08/29/2002
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Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
MERGED MOS-BIPOLAR CAPACITOR MEMORY CELL
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|
Patent #:
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|
Issue Dt:
|
10/27/2009
|
Application #:
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10230938
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Filing Dt:
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08/29/2002
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Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
LOCALIZED BIASING FOR SILICON ON INSULATOR STRUCTURES
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|
|
Patent #:
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|
Issue Dt:
|
12/30/2003
|
Application #:
|
10230948
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Filing Dt:
|
08/29/2002
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Title:
|
MULTILAYERED DOPED CONDUCTOR
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|
|
Patent #:
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|
Issue Dt:
|
02/08/2005
|
Application #:
|
10230950
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Filing Dt:
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08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
RETICLES AND METHODS OF FORMING AND USING THE SAME
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|
|
Patent #:
|
|
Issue Dt:
|
04/13/2004
|
Application #:
|
10230951
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Filing Dt:
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08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/13/2003
| | | | |
Title:
|
PROGRAMMABLE MEMORY ADDRESS AND DECODE CIRCUITS WITH VERTICAL BODY TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2003
|
Application #:
|
10230960
|
Filing Dt:
|
08/29/2002
|
Title:
|
METHOD AND APPARATUS FOR A DEPOSITED FILL LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/2004
|
Application #:
|
10230962
|
Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
INNOVATIVE SOLDER BALL PAD STRUCTURE TO EASE DESIGN RULE, METHODS OF FABRICATING SAME AND SUBSTRATES, ELECTRONIC DEVICE ASSEMBLIES AND SYSTEMS EMPLOYING SAME
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|
|
Patent #:
|
|
Issue Dt:
|
02/24/2009
|
Application #:
|
10231388
|
Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
PROTECTION IN INTEGRATED CIRCUITS
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|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
10231397
|
Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
SINGLE TRANSISTOR VERTICAL MEMORY GAIN CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2003
|
Application #:
|
10231398
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
Title:
|
LEAKAGE DETECTION IN PROGRAMMING ALGORITHM FOR A FLASH MEMORY DEVICE
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|
Patent #:
|
|
Issue Dt:
|
03/28/2006
|
Application #:
|
10231416
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
COMPOSITIONS FOR REMOVAL OF PROCESSING BYPRODUCTS AND METHOD FOR USING SAME
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|
|
Patent #:
|
|
Issue Dt:
|
08/31/2004
|
Application #:
|
10231434
|
Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
SYSTEMS AND METHODS FOR THE ELECTROLYTIC REMOVAL OF METALS FROM SUBSTRATES
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|
|
Patent #:
|
|
Issue Dt:
|
03/01/2005
|
Application #:
|
10231435
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
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METAL PLATING USING SEED FILM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2004
|
Application #:
|
10231449
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
Title:
|
FLASH MEMORY ARRAY STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
10231508
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
FULL STRESS OPEN DIGIT LINE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2004
|
Application #:
|
10231680
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
SYSTEM AND METHOD TO AVOID VOLTAGE READ ERRORS IN OPEN DIGIT LINE ARRAY DYNAMIC RANDOM ACCESS MEMORIES
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|
Patent #:
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|
Issue Dt:
|
01/30/2007
|
Application #:
|
10231687
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
METHOD OF FORMING A DEVICE HAVING A GATE WITH A SELECTED ELECTRON AFFINITY
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|
Patent #:
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|
Issue Dt:
|
05/25/2004
|
Application #:
|
10231700
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
SHALLOW TRENCH ANTIFUSE AND METHODS OF MAKING AND USING SAME
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|
Patent #:
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|
Issue Dt:
|
03/16/2004
|
Application #:
|
10231727
|
Filing Dt:
|
08/28/2002
|
Publication #:
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|
Pub Dt:
|
12/26/2002
| | | | |
Title:
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METHOD OF ATTACHING A LEADFRAME TO SINGULATED SEMICONDUCTOR DICE
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|
Patent #:
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|
Issue Dt:
|
01/06/2004
|
Application #:
|
10231729
|
Filing Dt:
|
08/28/2002
|
Publication #:
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|
Pub Dt:
|
01/02/2003
| | | | |
Title:
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BALL GRID ARRAY CHIP PACKAGES HAVING IMPROVED TESTING AND STACKING CHARACTERISTICS
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|
Patent #:
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|
Issue Dt:
|
05/25/2004
|
Application #:
|
10231731
|
Filing Dt:
|
08/28/2002
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
METHOD FOR BALL GRID ARRAY CHIP PACKAGES HAVING IMPROVED TESTING AND STACKING CHARACTERISTICS
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Patent #:
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|
Issue Dt:
|
06/15/2004
|
Application #:
|
10231756
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Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
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CIRCUITS AND METHODS TO PROTECT A GATE DIELECTRIC ANTIFUSE
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|
Patent #:
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Issue Dt:
|
09/28/2004
|
Application #:
|
10231758
|
Filing Dt:
|
08/29/2002
|
Publication #:
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Pub Dt:
|
01/02/2003
| | | | |
Title:
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CONDUCTOR LAYER NITRIDATION
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Patent #:
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Issue Dt:
|
11/07/2006
|
Application #:
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10231766
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Filing Dt:
|
08/28/2002
|
Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
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INTERMESHED GUARD BANDS FOR MULTIPLE VOLTAGE SUPPLY STRUCTURES ON AN INTEGRATED CIRCUIT, AND METHODS OF MAKING SAME
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Patent #:
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Issue Dt:
|
03/15/2005
|
Application #:
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10231779
|
Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
METHODS TO FORM A MEMORY CELL WITH METAL-RICH METAL CHALCOGENIDE
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|
Patent #:
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Issue Dt:
|
03/20/2007
|
Application #:
|
10231863
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Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
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SLAVE I/O DRIVER CALIBRATION USING ERROR-NULLING MASTER REFERENCE
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|
Patent #:
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|
Issue Dt:
|
10/03/2006
|
Application #:
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10231877
|
Filing Dt:
|
08/29/2002
|
Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
|
MULTI-COMPONENT INTEGRATED CIRCUIT CONTACTS
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Patent #:
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Issue Dt:
|
10/26/2004
|
Application #:
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10231879
|
Filing Dt:
|
08/29/2002
|
Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
|
CASCODE I/O DRIVER WITH IMPROVED ESD OPERATION
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Patent #:
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Issue Dt:
|
10/10/2006
|
Application #:
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10231897
|
Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/25/2004
| | | | |
Title:
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RESONATOR FOR THERMO OPTIC DEVICE
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|
Patent #:
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|
Issue Dt:
|
02/17/2004
|
Application #:
|
10231920
|
Filing Dt:
|
08/29/2002
|
Title:
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DIFFERENTIAL AMPLIFIERS WITH INCREASED INPUT RANGES
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|
Patent #:
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|
Issue Dt:
|
03/30/2004
|
Application #:
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10232090
|
Filing Dt:
|
08/29/2002
|
Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
|
METHOD AND CIRCUIT FOR GENERATING CONSTANT SLEW RATE OUTPUT SIGNAL
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Patent #:
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Issue Dt:
|
11/21/2006
|
Application #:
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10232184
|
Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
TRENCH INTERCONNECT STRUCTURE AND FORMATION METHOD
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|
Patent #:
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Issue Dt:
|
04/17/2007
|
Application #:
|
10232205
|
Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
01/23/2003
| | | | |
Title:
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ANTFUSE HAVING TANTALUM OXYNITRIDE FILM AND METHOD FOR MAKING SAME
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|
|
Patent #:
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|
Issue Dt:
|
03/08/2005
|
Application #:
|
10232206
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
CAPACITOR HAVING TANTALUM OXYNITRIDE FILM AND METHOD FOR MAKING SAME
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|
|
Patent #:
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|
Issue Dt:
|
08/24/2004
|
Application #:
|
10232214
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
SELF-ALIGNED, INTEGRATED CIRCUIT CONTACT AND FORMATION METHOD
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|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
10232216
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
Title:
|
LEAKAGE DETECTION IN PROGRAMMING ALGORITHM FOR A FLASH MEMORY DEVICE
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|
|
Patent #:
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|
Issue Dt:
|
03/01/2005
|
Application #:
|
10232217
|
Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
STRUCTURES AND METHODS FOR ENHANCING CAPACITORS IN INTEGRATED CIRCUITS
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|
|
Patent #:
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|
Issue Dt:
|
07/25/2006
|
Application #:
|
10232219
|
Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
SOFT PROGRAMMING FOR RECOVERY OF OVERERASURE
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|
|
Patent #:
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|
Issue Dt:
|
09/23/2003
|
Application #:
|
10232221
|
Filing Dt:
|
08/29/2002
|
Title:
|
METHOD AND APPARATUS FOR A FLASH MEMORY DEVICE COMPRISING A SOURCE LOCAL INTERCONNECT
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|
|
Patent #:
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|
Issue Dt:
|
05/20/2008
|
Application #:
|
10232267
|
Filing Dt:
|
08/28/2002
|
Publication #:
|
|
Pub Dt:
|
12/18/2003
| | | | |
Title:
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METHOD OF FORMING A CONDUCTIVE VIA THROUGH A WAFER
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|
|
Patent #:
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|
Issue Dt:
|
04/19/2005
|
Application #:
|
10232268
|
Filing Dt:
|
08/28/2002
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
Title:
|
FLASH MEMORY WITH ULTRA THIN VERTICAL BODY TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2004
|
Application #:
|
10232421
|
Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
METHOD AND SYSTEM FOR ACCELERATING COUPLING OF DIGITAL SIGNALS
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|
Patent #:
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|
Issue Dt:
|
04/27/2004
|
Application #:
|
10232475
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
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SYNCHRONOUS MIRROR DELAY (SMD) CIRCUIT AND METHOD INCLUDING A RING OSCILLATOR FOR TIMING COARSE AND FINE DELAY INTERVALS
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|
Patent #:
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|
Issue Dt:
|
06/07/2005
|
Application #:
|
10232549
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
SEMICONDUCTOR COMPONENT HAVING BACKSIDE PIN CONTACTS
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|
Patent #:
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|
Issue Dt:
|
03/23/2004
|
Application #:
|
10232739
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
REDUCING DIGIT EQUILIBRATE CURRENT DURING SELF-REFRESH MODE
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|
Patent #:
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|
Issue Dt:
|
12/14/2004
|
Application #:
|
10232757
|
Filing Dt:
|
08/29/2002
|
Title:
|
PLASMA ETCHING METHODS AND METHODS OF FORMING MEMORY DEVICES COMPRISING A CHALCOGENIDE COMPRISING LAYER RECEIVED OPERABLY PROXIMATE CONDUCTIVE ELECTRODES
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|
Patent #:
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|
Issue Dt:
|
09/09/2003
|
Application #:
|
10232782
|
Filing Dt:
|
08/28/2002
|
Publication #:
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|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
PACKAGED DIE ON PCB WITH HEAT SINK ENCAPSULANT AND METHODS
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|
|
Patent #:
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|
Issue Dt:
|
11/29/2005
|
Application #:
|
10232822
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
MULTIPLE SEGMENT DATA OBJECT MANAGEMENT
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|
|
Patent #:
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|
Issue Dt:
|
11/22/2005
|
Application #:
|
10232840
|
Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
SINGLE SEGMENT DATA OBJECT MANAGEMENT
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|
|
Patent #:
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|
Issue Dt:
|
08/30/2005
|
Application #:
|
10232841
|
Filing Dt:
|
08/29/2002
|
Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
SYSTEM AND METHOD FOR LINEAR OBJECT REALLOCATION IN PLACE
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|
|
Patent #:
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|
Issue Dt:
|
11/16/2010
|
Application #:
|
10232842
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
SYSTEM AND METHOD FOR OPTIMIZING INTERCONNECTIONS OF MEMORY DEVICES IN A MULTICHIP MODULE
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|
|
Patent #:
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|
Issue Dt:
|
07/12/2005
|
Application #:
|
10232846
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Filing Dt:
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08/30/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
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ONE TRANSISTOR SOI NON-VOLATILE RANDOM ACCESS MEMORY CELL
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Patent #:
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Issue Dt:
|
06/07/2005
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Application #:
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10232848
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Filing Dt:
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08/30/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
|
ONE-DEVICE NON-VOLATILE RANDOM ACCESS MEMORY CELL
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Patent #:
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Issue Dt:
|
05/24/2005
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Application #:
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10232853
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Filing Dt:
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08/28/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
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PATTERN GENERATION ON A SEMICONDUCTOR SURFACE
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Patent #:
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Issue Dt:
|
08/08/2006
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Application #:
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10232854
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Filing Dt:
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08/28/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
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EXTENDED KALMAN FILTER INCORPORATING OFFLINE METROLOGY
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Patent #:
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Issue Dt:
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05/09/2006
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Application #:
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10232855
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Filing Dt:
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08/30/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
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GATED LATERAL THYRISTOR-BASED RANDOM ACCESS MEMORY CELL (GLTRAM)
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Patent #:
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Issue Dt:
|
10/31/2006
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Application #:
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10232952
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Filing Dt:
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08/29/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
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DYNAMIC VOLUME MANAGEMENT
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Patent #:
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Issue Dt:
|
05/17/2005
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Application #:
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10232955
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Filing Dt:
|
08/29/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
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LINEAR OBJECT MANAGEMENT FOR A RANGE OF FLASH MEMORY
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Patent #:
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|
Issue Dt:
|
02/28/2006
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Application #:
|
10233000
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Filing Dt:
|
08/29/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
|
WAVEGUIDE FOR THERMO OPTIC DEVICE
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Patent #:
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Issue Dt:
|
12/09/2003
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Application #:
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10233020
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Filing Dt:
|
08/30/2002
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Publication #:
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Pub Dt:
|
12/26/2002
| | | | |
Title:
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METHODS OF FORMING INTEGRATED CIRCUITRY, METHODS OF FORMING ELEVATED SOURCE/DRAIN REGIONS OF A FIELD EFFECT TRANSISTOR, AND METHODS OF FORMING FIELD EFFECT TRANSISTORS
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|
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Patent #:
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|
Issue Dt:
|
05/04/2004
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Application #:
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10233147
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Filing Dt:
|
08/28/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
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AMPLIFIERS WITH VARIABLE SWING CONTROL
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Patent #:
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Issue Dt:
|
02/15/2005
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Application #:
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10233149
|
Filing Dt:
|
08/28/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
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CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
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|
|
Patent #:
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|
Issue Dt:
|
11/13/2007
|
Application #:
|
10233159
|
Filing Dt:
|
08/29/2002
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Publication #:
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Pub Dt:
|
10/23/2003
| | | | |
Title:
|
ULTRATHIN LEADFRAME BGA CIRCUIT PACKAGE
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|
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Patent #:
|
|
Issue Dt:
|
11/29/2005
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Application #:
|
10233262
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Filing Dt:
|
08/29/2002
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Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
ELECTRONIC DEVICE PACKAGE
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|
|
Patent #:
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|
Issue Dt:
|
12/21/2004
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Application #:
|
10233279
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Filing Dt:
|
08/29/2002
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Publication #:
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|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
DOPANT BARRIER FOR DOPED GLASS IN MEMORY DEVICES
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|
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Patent #:
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|
Issue Dt:
|
01/29/2008
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Application #:
|
10233294
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Filing Dt:
|
08/28/2002
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Publication #:
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Pub Dt:
|
03/04/2004
| | | | |
Title:
|
BALL GRID ARRAY STRUCTURES AND TAPE-BASED METHOD OF MANUFACTURING SAME
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|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
|
Application #:
|
10233309
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
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Pub Dt:
|
03/04/2004
| | | | |
Title:
|
ATOMIC LAYER DEPOSITED LANTHANIDE DOPED TIOX DIELECTRIC FILMS
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|
Patent #:
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|
Issue Dt:
|
09/25/2007
|
Application #:
|
10233319
|
Filing Dt:
|
08/28/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
LEADLESS PACKAGING FOR IMAGE SENSOR DEVICES
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|
Patent #:
|
|
Issue Dt:
|
08/09/2005
|
Application #:
|
10233324
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
LINEAR AND NON-LINEAR OBJECT MANAGEMENT
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|
|
Patent #:
|
|
Issue Dt:
|
12/21/2004
|
Application #:
|
10233325
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
ISOLATION DEVICE OVER FIELD IN A MEMORY DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
10233590
|
Filing Dt:
|
09/04/2002
|
Publication #:
|
|
Pub Dt:
|
01/16/2003
| | | | |
Title:
|
METHOD FOR FORMING A MULTILAYER ELECTRODE FOR A FERROELECTRIC CAPACITOR
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|
|
Patent #:
|
|
Issue Dt:
|
06/29/2004
|
Application #:
|
10233871
|
Filing Dt:
|
08/29/2002
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
BIAS SENSING IN DRAM SENSE AMPLIFIERS
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|
|
Patent #:
|
|
Issue Dt:
|
09/06/2005
|
Application #:
|
10234351
|
Filing Dt:
|
08/30/2002
|
Publication #:
|
|
Pub Dt:
|
02/06/2003
| | | | |
Title:
|
INTEGRATED CAPACITORS FABRICATED WITH CONDUCTIVE METAL OXIDES
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|
|
Patent #:
|
|
Issue Dt:
|
02/17/2004
|
Application #:
|
10234577
|
Filing Dt:
|
08/30/2002
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURE WITH SUBSTANTIALLY ETCHED NITRIDE DEFECTS PROTRUDING THEREFROM
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|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
10234581
|
Filing Dt:
|
08/30/2002
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
INTEGRATED CAPACITORS FABRICATED WITH CONDUCTIVE METAL OXIDES
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|
|
Patent #:
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|
Issue Dt:
|
01/13/2004
|
Application #:
|
10234729
|
Filing Dt:
|
08/30/2002
|
Title:
|
TECHNIQUE FOR HIGH EFFICIENCY METALORGANIC CHEMICAL VAPOR DEPOSITION
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|
|
Patent #:
|
|
Issue Dt:
|
01/17/2006
|
Application #:
|
10236282
|
Filing Dt:
|
09/05/2002
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
Title:
|
INTEGRATED CIRCUITRY
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|
|
Patent #:
|
|
Issue Dt:
|
04/19/2005
|
Application #:
|
10236376
|
Filing Dt:
|
09/06/2002
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
CARRIER FOR CLEANING SOCKETS FOR SEMICONDUCTOR COMPONENTS HAVING CONTACT BALLS
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|
Patent #:
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|
Issue Dt:
|
12/26/2006
|
Application #:
|
10236662
|
Filing Dt:
|
09/05/2002
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
Title:
|
METHOD OF FORMING A FIELD EFFECT TRANSISTOR WITH HALO IMPLANT REGIONS
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|
Patent #:
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|
Issue Dt:
|
04/20/2004
|
Application #:
|
10238117
|
Filing Dt:
|
09/10/2002
|
Publication #:
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|
Pub Dt:
|
01/23/2003
| | | | |
Title:
|
MEMORY DEVICE INTERFACE
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|
|
Patent #:
|
|
Issue Dt:
|
07/01/2003
|
Application #:
|
10238317
|
Filing Dt:
|
09/10/2002
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
Title:
|
FLASH MEMORY CELL FOR HIGH EFFICIENCY PROGRAMMING
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|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
10238322
|
Filing Dt:
|
09/09/2002
|
Publication #:
|
|
Pub Dt:
|
03/11/2004
| | | | |
Title:
|
WAVELENGTH DIVISION MULTIPLEXED MEMORY MODULE, MEMORY SYSTEM AND METHOD
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|
|
Patent #:
|
|
Issue Dt:
|
01/06/2004
|
Application #:
|
10238632
|
Filing Dt:
|
09/11/2002
|
Publication #:
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|
Pub Dt:
|
02/06/2003
| | | | |
Title:
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LAYOUT FOR MEASUREMENT OF OVERLAY ERROR
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|
|
Patent #:
|
|
Issue Dt:
|
12/14/2004
|
Application #:
|
10241243
|
Filing Dt:
|
09/10/2002
|
Publication #:
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|
Pub Dt:
|
01/23/2003
| | | | |
Title:
|
METHOD OF FORMING MEMORY CIRCUITRY
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|
Patent #:
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|
Issue Dt:
|
03/23/2004
|
Application #:
|
10241923
|
Filing Dt:
|
09/11/2002
|
Publication #:
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|
Pub Dt:
|
02/13/2003
| | | | |
Title:
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SEMICONDUCTOR CONSTRUCTION OF A TRENCH
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|
|
Patent #:
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|
Issue Dt:
|
05/25/2004
|
Application #:
|
10243156
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Filing Dt:
|
09/12/2002
|
Publication #:
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|
Pub Dt:
|
02/06/2003
| | | | |
Title:
|
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY AND SEMICONDUCTOR PROCESSING METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY
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|
|
Patent #:
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|
Issue Dt:
|
07/06/2004
|
Application #:
|
10243180
|
Filing Dt:
|
09/12/2002
|
Publication #:
|
|
Pub Dt:
|
03/18/2004
| | | | |
Title:
|
SEMICONDUCTOR-ON-INSULATOR THIN FILM TRANSISTOR CONSTRUCTIONS, AND METHODS OF MAKING SEMICONDUCTOR-ON-INSULATOR THIN FILM TRANSISTOR CONSTRUCTIONS
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|
|
Patent #:
|
|
Issue Dt:
|
09/09/2003
|
Application #:
|
10243406
|
Filing Dt:
|
09/13/2002
|
Publication #:
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|
Pub Dt:
|
01/16/2003
| | | | |
Title:
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METHOD OF DEPOSITNG A LAYER COMPRISING TUNGSTEN AND METHOD OF FORMING A TRANSISTOR GATE LINE
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Patent #:
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Issue Dt:
|
02/17/2004
|
Application #:
|
10243889
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Filing Dt:
|
09/12/2002
|
Publication #:
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|
Pub Dt:
|
01/16/2003
| | | | |
Title:
|
SEMICONDUCTOR CHIP PACKAGE HAVING A LEADFRAME WITH A FOOTPRINT OF ABOUT THE SAME SIZE AS THE CHIP
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|
|
Patent #:
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|
Issue Dt:
|
02/15/2005
|
Application #:
|
10244122
|
Filing Dt:
|
09/12/2002
|
Publication #:
|
|
Pub Dt:
|
05/15/2003
| | | | |
Title:
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SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS, METHODS OF FORMING ELECTRICAL CONNECTIONS AND INTERCONNECTIONS, AND INTEGRATED CIRCUITRY
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|
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Patent #:
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Issue Dt:
|
09/12/2006
|
Application #:
|
10245673
|
Filing Dt:
|
09/17/2002
|
Publication #:
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|
Pub Dt:
|
02/13/2003
| | | | |
Title:
|
PREHEATING OF CHEMICAL VAPOR DEPOSITION PRECURSORS
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|
|
Patent #:
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Issue Dt:
|
03/30/2004
|
Application #:
|
10246245
|
Filing Dt:
|
09/17/2002
|
Publication #:
|
|
Pub Dt:
|
03/18/2004
| | | | |
Title:
|
BRIDGE-TYPE MAGNETIC RANDOM ACCESS MEMORY (MRAM) LATCH
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|