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Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 18018
Page 70 of 181
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181
1
Patent #:
6924686
Issue Dt:
08/02/2005
Application #:
10411853
Filing Dt:
04/11/2003
Publication #:
US20030234673
Pub Dt:
12/25/2003
Title:
SYNCHRONOUS MIRROR DELAY (SMD) CIRCUIT AND METHOD INCLUDING A COUNTER AND REDUCED SIZE BI-DIRECTIONAL DELAY LINE
2
Patent #:
6887740
Issue Dt:
05/03/2005
Application #:
10412064
Filing Dt:
04/10/2003
Publication #:
US20030201547
Pub Dt:
10/30/2003
Title:
Method for making an integrated circuit package having reduced bow
3
Patent #:
7454593
Issue Dt:
11/18/2008
Application #:
10412716
Filing Dt:
04/11/2003
Publication #:
US20040054870
Pub Dt:
03/18/2004
Title:
ROW AND COLUMN ENABLE SIGNAL ACTIVATION OF PROCESSING ARRAY ELEMENTS WITH INTERCONNECTION LOGIC TO SIMULATE BUS EFFECT
4
Patent #:
6838911
Issue Dt:
01/04/2005
Application #:
10413364
Filing Dt:
04/15/2003
Publication #:
US20030206037
Pub Dt:
11/06/2003
Title:
MONOTONIC DYNAMIC STATIC PSEUDO-NMOS LOGIC CIRCUITS
5
Patent #:
6747487
Issue Dt:
06/08/2004
Application #:
10413858
Filing Dt:
04/14/2003
Publication #:
US20030174001
Pub Dt:
09/18/2003
Title:
GATE COUPLED VOLTAGE SUPPORT FOR AN OUTPUT DRIVER CIRCUIT
6
Patent #:
6778459
Issue Dt:
08/17/2004
Application #:
10413864
Filing Dt:
04/14/2003
Publication #:
US20030174568
Pub Dt:
09/18/2003
Title:
FUSE READ SEQUENCE FOR AUTO REFRESH POWER REDUCTION
7
Patent #:
6882049
Issue Dt:
04/19/2005
Application #:
10413865
Filing Dt:
04/14/2003
Publication #:
US20030173665
Pub Dt:
09/18/2003
Title:
SUPPORT RING FOR USE WITH A CONTACT PAD AND SEMICONDUCTOR DEVICE COMPONENTS INCLUDING THE SAME
8
Patent #:
6740392
Issue Dt:
05/25/2004
Application #:
10414147
Filing Dt:
04/15/2003
Title:
SURFACE BARRIERS FOR COPPER AND SILVER INTERCONNECTS
9
Patent #:
6816408
Issue Dt:
11/09/2004
Application #:
10414318
Filing Dt:
04/15/2003
Publication #:
US20030202396
Pub Dt:
10/30/2003
Title:
MEMORY DEVICE WITH MULTI-LEVEL STORAGE CELLS
10
Patent #:
6848040
Issue Dt:
01/25/2005
Application #:
10414818
Filing Dt:
04/15/2003
Publication #:
US20040013010
Pub Dt:
01/22/2004
Title:
COLUMN ADDRESS PATH CIRCUIT AND METHOD FOR MEMORY DEVICES HAVING A BURST ACCESS MODE
11
Patent #:
6897096
Issue Dt:
05/24/2005
Application #:
10417056
Filing Dt:
04/16/2003
Publication #:
US20040033673
Pub Dt:
02/19/2004
Title:
METHOD OF PACKAGING SEMICONDUCTOR DICE EMPLOYING AT LEAST ONE REDISTRIBUTION LAYER
12
Patent #:
6872639
Issue Dt:
03/29/2005
Application #:
10417119
Filing Dt:
04/17/2003
Publication #:
US20030203608
Pub Dt:
10/30/2003
Title:
FABRICATION OF SEMICONDUCTOR DEVICES WITH TRANSITION METAL BORIDE FILMS AS DIFFUSION BARRIERS
13
Patent #:
6901011
Issue Dt:
05/31/2005
Application #:
10417416
Filing Dt:
04/15/2003
Publication #:
US20030231532
Pub Dt:
12/18/2003
Title:
SELF-REPAIR METHOD VIA ECC FOR NONVOLATILE MEMORY DEVICES, AND RELATIVE NONVOLATILE MEMORY DEVICE
14
Patent #:
6791870
Issue Dt:
09/14/2004
Application #:
10418406
Filing Dt:
04/18/2003
Publication #:
US20030205726
Pub Dt:
11/06/2003
Title:
MAGNETORESISTIVE MEMORY DEVICES AND ASSEMBLIES; AND METHODS OF STORING AND RETRIEVING INFORMATION
15
Patent #:
6797979
Issue Dt:
09/28/2004
Application #:
10418530
Filing Dt:
04/17/2003
Publication #:
US20030193063
Pub Dt:
10/16/2003
Title:
METAL STRUCTURE FOR A PHASE-CHANGE MEMORY DEVICE
16
Patent #:
6911367
Issue Dt:
06/28/2005
Application #:
10418696
Filing Dt:
04/18/2003
Publication #:
US20040209446
Pub Dt:
10/21/2004
Title:
METHODS OF FORMING SEMICONDUCTIVE MATERIALS HAVING FLATTENED SURFACES; METHODS OF FORMING ISOLATION REGIONS; AND METHODS OF FORMING ELEVATED SOURCE/DRAIN REGIONS
17
Patent #:
6930944
Issue Dt:
08/16/2005
Application #:
10418945
Filing Dt:
04/18/2003
Publication #:
US20040032782
Pub Dt:
02/19/2004
Title:
SYSTEM AND METHOD FOR POWER SAVING MEMORY REFRESH FOR DYNAMIC RANDOM ACCESS MEMORY DEVICES AFTER AN EXTENDED INTERVAL
18
Patent #:
7821555
Issue Dt:
10/26/2010
Application #:
10419235
Filing Dt:
04/21/2003
Publication #:
US20040207739
Pub Dt:
10/21/2004
Title:
MULTI PATH POWER FOR CMOS IMAGERS
19
Patent #:
6872420
Issue Dt:
03/29/2005
Application #:
10419592
Filing Dt:
04/21/2003
Publication #:
US20030212285
Pub Dt:
11/13/2003
Title:
METHODS FOR PREPARING RUTHENIUM AND OSMIUM COMPOUNDS AND FILMS
20
Patent #:
6930058
Issue Dt:
08/16/2005
Application #:
10420246
Filing Dt:
04/21/2003
Publication #:
US20040209484
Pub Dt:
10/21/2004
Title:
METHOD OF DEPOSITING A SILICON DIOXIDE COMPRISING LAYER DOPED WITH AT LEAST ONE OF P, B AND GE
21
Patent #:
7183186
Issue Dt:
02/27/2007
Application #:
10420307
Filing Dt:
04/22/2003
Publication #:
US20040214399
Pub Dt:
10/28/2004
Title:
ATOMIC LAYER DEPOSITED ZRTIO4 FILMS
22
Patent #:
7297617
Issue Dt:
11/20/2007
Application #:
10420331
Filing Dt:
04/22/2003
Publication #:
US20040212046
Pub Dt:
10/28/2004
Title:
Method for controlling diffusion in semiconductor regions
23
Patent #:
7149986
Issue Dt:
12/12/2006
Application #:
10420435
Filing Dt:
04/22/2003
Publication #:
US20030204821
Pub Dt:
10/30/2003
Title:
AUTOMATED LOAD DETERMINATION FOR PARTITIONED SIMULATION
24
Patent #:
6829169
Issue Dt:
12/07/2004
Application #:
10420533
Filing Dt:
04/22/2003
Publication #:
US20030223289
Pub Dt:
12/04/2003
Title:
ELECTRICALLY ERASABLE AND PROGRAMMABLE MEMORY COMPRISING AN INTERNAL SUPPLY VOLTAGE MANAGEMENT DEVICE
25
Patent #:
6984894
Issue Dt:
01/10/2006
Application #:
10421133
Filing Dt:
04/23/2003
Publication #:
US20030178731
Pub Dt:
09/25/2003
Title:
A SEMICONDUCTOR PACKAGE HAVING A PARTIAL SLOT COVER FOR ENCAPSULATION PROCESS
26
Patent #:
7049153
Issue Dt:
05/23/2006
Application #:
10421157
Filing Dt:
04/23/2003
Publication #:
US20040214351
Pub Dt:
10/28/2004
Title:
POLYMER-BASED FERROELECTRIC MEMORY
27
Patent #:
6999339
Issue Dt:
02/14/2006
Application #:
10421201
Filing Dt:
04/22/2003
Publication #:
US20040213043
Pub Dt:
10/28/2004
Title:
INTEGRATED CIRCUIT INCLUDING SENSOR TO SENSE ENVIRONMENTAL DATA, METHOD OF COMPENSATING AN MRAM INTEGRATED CIRCUIT FOR THE EFFECTS OF AN EXTERNAL MAGNETIC FIELD, MRAM INTEGRATED CIRCUIT, AND METHOD OF TESTING
28
Patent #:
7213142
Issue Dt:
05/01/2007
Application #:
10421287
Filing Dt:
04/22/2003
Publication #:
US20040215836
Pub Dt:
10/28/2004
Title:
SYSTEM AND METHOD TO INITIALIZE REGISTERS WITH AN EEPROM STORED BOOT SEQUENCE
29
Patent #:
7312101
Issue Dt:
12/25/2007
Application #:
10421452
Filing Dt:
04/22/2003
Publication #:
US20040214373
Pub Dt:
10/28/2004
Title:
PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR PACKAGING MICROELECTRONIC DEVICES
30
Patent #:
6706557
Issue Dt:
03/16/2004
Application #:
10422251
Filing Dt:
04/24/2003
Publication #:
US20030203537
Pub Dt:
10/30/2003
Title:
METHOD OF FABRICATING STACKED DIE CONFIGURATIONS UTILIZING REDISTRIBUTION BOND PADS
31
Patent #:
6741490
Issue Dt:
05/25/2004
Application #:
10422849
Filing Dt:
04/25/2003
Publication #:
US20030198078
Pub Dt:
10/23/2003
Title:
SENSING METHOD AND APPARATUS FOR RESISTANCE MEMORY DEVICE
32
Patent #:
6856532
Issue Dt:
02/15/2005
Application #:
10422850
Filing Dt:
04/25/2003
Publication #:
US20040027874
Pub Dt:
02/12/2004
Title:
OFFSET COMPENSATED SENSING FOR MAGNETIC RANDOM ACCESS MEMORY
33
Patent #:
7391066
Issue Dt:
06/24/2008
Application #:
10422965
Filing Dt:
04/25/2003
Publication #:
US20050023580
Pub Dt:
02/03/2005
Title:
IMAGER FLOATING DIFFUSION REGION AND PROCESS FOR FORMING SAME
34
Patent #:
6882167
Issue Dt:
04/19/2005
Application #:
10423124
Filing Dt:
04/25/2003
Publication #:
US20030206028
Pub Dt:
11/06/2003
Title:
METHOD OF FORMING AN ELECTRICAL CONTACT
35
Patent #:
6897667
Issue Dt:
05/24/2005
Application #:
10423241
Filing Dt:
04/25/2003
Publication #:
US20030201785
Pub Dt:
10/30/2003
Title:
TEST SYSTEM FOR SILICON HAVING ELECTRICAL CONTACTS
36
Patent #:
7335396
Issue Dt:
02/26/2008
Application #:
10423711
Filing Dt:
04/24/2003
Publication #:
US20040226507
Pub Dt:
11/18/2004
Title:
METHODS FOR CONTROLLING MASS FLOW RATES AND PRESSURES IN PASSAGEWAYS COUPLED TO REACTION CHAMBERS AND SYSTEMS FOR DEPOSITING MATERIAL ONTO MICROFEATURE WORKPIECES IN REACTION CHAMBERS
37
Patent #:
6922366
Issue Dt:
07/26/2005
Application #:
10423845
Filing Dt:
04/24/2003
Publication #:
US20030235092
Pub Dt:
12/25/2003
Title:
SELF-REPAIR METHOD FOR NONVOLATILE MEMORY DEVICES USING A SUPERSECURE ARCHITECTURE, AND NONVOLATILE MEMORY DEVICE
38
Patent #:
9015390
Issue Dt:
04/21/2015
Application #:
10424206
Filing Dt:
04/25/2003
Publication #:
US20040215852
Pub Dt:
10/28/2004
Title:
Active memory data compression system and method
39
Patent #:
7332820
Issue Dt:
02/19/2008
Application #:
10424426
Filing Dt:
04/28/2003
Publication #:
US20030207515
Pub Dt:
11/06/2003
Title:
STACKED DIE IN DIE BGA PACKAGE
40
Patent #:
7344969
Issue Dt:
03/18/2008
Application #:
10424470
Filing Dt:
04/28/2003
Publication #:
US20030207516
Pub Dt:
11/06/2003
Title:
STACKED DIE IN DIE BGA PACKAGE
41
Patent #:
6839301
Issue Dt:
01/04/2005
Application #:
10425069
Filing Dt:
04/28/2003
Publication #:
US20040213051
Pub Dt:
10/28/2004
Title:
METHOD AND APPARATUS FOR IMPROVING STABILITY AND LOCK TIME FOR SYNCHRONOUS CIRCUITS
42
Patent #:
6825109
Issue Dt:
11/30/2004
Application #:
10425130
Filing Dt:
04/28/2003
Publication #:
US20030186530
Pub Dt:
10/02/2003
Title:
METHODS OF FABRICATING BURIED DIGIT LINES
43
Patent #:
6759751
Issue Dt:
07/06/2004
Application #:
10425378
Filing Dt:
04/28/2003
Publication #:
US20030203172
Pub Dt:
10/30/2003
Title:
CONSTRUCTIONS COMPRISING SOLDER BUMPS
44
Patent #:
6888200
Issue Dt:
05/03/2005
Application #:
10425483
Filing Dt:
04/29/2003
Publication #:
US20040041206
Pub Dt:
03/04/2004
Title:
ONE TRANSISTOR SOI NON-VOLATILE RANDOM ACCESS MEMORY CELL
45
Patent #:
7220656
Issue Dt:
05/22/2007
Application #:
10425484
Filing Dt:
04/29/2003
Publication #:
US20040217352
Pub Dt:
11/04/2004
Title:
STRAINED SEMICONDUCTOR BY WAFER BONDING WITH MISORIENTATION
46
Patent #:
7041575
Issue Dt:
05/09/2006
Application #:
10425797
Filing Dt:
04/29/2003
Publication #:
US20040217391
Pub Dt:
11/04/2004
Title:
LOCALIZED STRAINED SEMICONDUCTOR ON INSULATOR
47
Patent #:
6908812
Issue Dt:
06/21/2005
Application #:
10426380
Filing Dt:
04/30/2003
Publication #:
US20030201469
Pub Dt:
10/30/2003
Title:
PHASE CHANGE MATERIAL MEMORY DEVICE
48
Patent #:
6768187
Issue Dt:
07/27/2004
Application #:
10426571
Filing Dt:
04/30/2003
Publication #:
US20030160338
Pub Dt:
08/28/2003
Title:
COUPLING SPACED BOND PADS TO A CONTACT
49
Patent #:
6826083
Issue Dt:
11/30/2004
Application #:
10426924
Filing Dt:
04/29/2003
Publication #:
US20030235100
Pub Dt:
12/25/2003
Title:
METHOD FOR REDUCING SPURIOUS ERASING DURING PROGRAMMING OF A NONVOLATILE NROM
50
Patent #:
6842133
Issue Dt:
01/11/2005
Application #:
10427163
Filing Dt:
04/30/2003
Publication #:
US20040217890
Pub Dt:
11/04/2004
Title:
STROBE THROUGH DIFFERENTIAL SIGNALING
51
Patent #:
7387827
Issue Dt:
06/17/2008
Application #:
10427168
Filing Dt:
04/30/2003
Publication #:
US20040115409
Pub Dt:
06/17/2004
Title:
INTERCONNECTION DESIGNS AND MATERIALS HAVING IMPROVED STRENGTH AND FATIGUE LIFE
52
Patent #:
6777291
Issue Dt:
08/17/2004
Application #:
10427559
Filing Dt:
04/30/2003
Publication #:
US20040005760
Pub Dt:
01/08/2004
Title:
METHODS OF FORMING PROGRAMMABLE MEMORY DEVICES COMPRISING TUNGSTEN
53
Patent #:
6778003
Issue Dt:
08/17/2004
Application #:
10428040
Filing Dt:
04/30/2003
Title:
METHOD AND CIRCUIT FOR ADJUSTING A VOLTAGE UPON DETECTION OF A COMMAND APPLIED TO AN INTEGRATED CIRCUIT
54
Patent #:
6784026
Issue Dt:
08/31/2004
Application #:
10428449
Filing Dt:
04/30/2003
Publication #:
US20030205732
Pub Dt:
11/06/2003
Title:
MICROELECTRONIC DIE INCLUDING LOW RC UNDER-LAYER INTERCONNECTS
55
Patent #:
6826096
Issue Dt:
11/30/2004
Application #:
10429373
Filing Dt:
05/05/2003
Publication #:
US20030202400
Pub Dt:
10/30/2003
Title:
MULTIPLE VOLTAGE SUPPLY SWITCH
56
Patent #:
6939744
Issue Dt:
09/06/2005
Application #:
10430616
Filing Dt:
05/05/2003
Publication #:
US20030199160
Pub Dt:
10/23/2003
Title:
USE OF PALLADIUM IN IC MANUFACTURING WITH CONDUCTIVE POLYMER BUMP
57
Patent #:
6888252
Issue Dt:
05/03/2005
Application #:
10431061
Filing Dt:
05/07/2003
Publication #:
US20030199152
Pub Dt:
10/23/2003
Title:
METHOD OF FORMING A CONDUCTIVE CONTACT
58
Patent #:
6987037
Issue Dt:
01/17/2006
Application #:
10431134
Filing Dt:
05/07/2003
Publication #:
US20040221792
Pub Dt:
11/11/2004
Title:
STRAINED SI/SIGE STRUCTURES BY ION IMPLANTATION
59
Patent #:
7115480
Issue Dt:
10/03/2006
Application #:
10431137
Filing Dt:
05/07/2003
Publication #:
US20040224480
Pub Dt:
11/11/2004
Title:
MICROMECHANICAL STRAINED SEMICONDUCTOR BY WAFER BONDING
60
Patent #:
7224388
Issue Dt:
05/29/2007
Application #:
10431397
Filing Dt:
05/08/2003
Publication #:
US20040223065
Pub Dt:
11/11/2004
Title:
WIDE DYNAMIC RANGE ACTIVE PIXEL WITH KNEE RESPONSE
61
Patent #:
6822908
Issue Dt:
11/23/2004
Application #:
10431718
Filing Dt:
05/08/2003
Publication #:
US20040223374
Pub Dt:
11/11/2004
Title:
SYNCHRONOUS UP/DOWN ADDRESS GENERATOR FOR BURST MODE READ
62
Patent #:
7155562
Issue Dt:
12/26/2006
Application #:
10431748
Filing Dt:
05/08/2003
Publication #:
US20040225850
Pub Dt:
11/11/2004
Title:
METHOD FOR READING WHILE WRITING TO A SINGLE PARTITION FLASH MEMORY
63
Patent #:
6891758
Issue Dt:
05/10/2005
Application #:
10431749
Filing Dt:
05/08/2003
Publication #:
US20040223394
Pub Dt:
11/11/2004
Title:
POSITION BASED ERASE VERIFICATION LEVELS IN A FLASH MEMORY DEVICE
64
Patent #:
7392436
Issue Dt:
06/24/2008
Application #:
10431767
Filing Dt:
05/08/2003
Publication #:
US20040237000
Pub Dt:
11/25/2004
Title:
PROGRAM FAILURE RECOVERY
65
Patent #:
7155644
Issue Dt:
12/26/2006
Application #:
10431768
Filing Dt:
05/08/2003
Publication #:
US20040225934
Pub Dt:
11/11/2004
Title:
AUTOMATIC TEST ENTRY TERMINATION IN A MEMORY DEVICE
66
Patent #:
6713355
Issue Dt:
03/30/2004
Application #:
10431822
Filing Dt:
05/08/2003
Publication #:
US20030203610
Pub Dt:
10/30/2003
Title:
SEMICONDUCTOR PROCESSING METHOD
67
Patent #:
7203874
Issue Dt:
04/10/2007
Application #:
10431889
Filing Dt:
05/08/2003
Publication #:
US20040243909
Pub Dt:
12/02/2004
Title:
ERROR DETECTION, DOCUMENTATION, AND CORRECTION IN A FLASH MEMORY DEVICE
68
Patent #:
6888771
Issue Dt:
05/03/2005
Application #:
10434087
Filing Dt:
05/09/2003
Publication #:
US20040223393
Pub Dt:
11/11/2004
Title:
SKEWED SENSE AMP FOR VARIABLE RESISTANCE MEMORY SENSING
69
Patent #:
7107671
Issue Dt:
09/19/2006
Application #:
10434380
Filing Dt:
05/08/2003
Publication #:
US20030230179
Pub Dt:
12/18/2003
Title:
METHOD OF PROCESSING A STRIP OF LEAD FRAMES
70
Patent #:
6982892
Issue Dt:
01/03/2006
Application #:
10434578
Filing Dt:
05/08/2003
Publication #:
US20040225853
Pub Dt:
11/11/2004
Title:
APPARATUS AND METHODS FOR A PHYSICAL LAYOUT OF SIMULTANEOUSLY SUB-ACCESSIBLE MEMORY MODULES
71
Patent #:
6930041
Issue Dt:
08/16/2005
Application #:
10435048
Filing Dt:
05/12/2003
Publication #:
US20030232500
Pub Dt:
12/18/2003
Title:
PHOTO-ASSISTED METHOD FOR SEMICONDUCTOR FABRICATION
72
Patent #:
6839258
Issue Dt:
01/04/2005
Application #:
10435049
Filing Dt:
05/12/2003
Publication #:
US20040228155
Pub Dt:
11/18/2004
Title:
FOLDED DRAM CAM CELL
73
Patent #:
6780721
Issue Dt:
08/24/2004
Application #:
10435171
Filing Dt:
05/08/2003
Publication #:
US20030197234
Pub Dt:
10/23/2003
Title:
LOW DIELECTRIC CONSTANT SHALLOW TRENCH ISOLATION
74
Patent #:
6838768
Issue Dt:
01/04/2005
Application #:
10435335
Filing Dt:
05/08/2003
Publication #:
US20030197271
Pub Dt:
10/23/2003
Title:
MODULE ASSEMBLY FOR STACKED BGA PACKAGES
75
Patent #:
6837938
Issue Dt:
01/04/2005
Application #:
10435336
Filing Dt:
05/08/2003
Publication #:
US20030201068
Pub Dt:
10/30/2003
Title:
APPARATUS ASSOCIATABLE WITH A DEPOSITION CHAMBER TO ENHANCE UNIFORMITY OF PROPERTIES OF MATERIAL LAYERS FORMED ON SEMICONDUCTOR SUBSTRATES THEREIN
76
Patent #:
6773960
Issue Dt:
08/10/2004
Application #:
10435423
Filing Dt:
05/08/2003
Publication #:
US20030176045
Pub Dt:
09/18/2003
Title:
METHODS FOR FORMING A SLOT WITH A LATERALLY RECESSED AREA AT AN END THEREOF THROUGH AN INTERPOSER OR OTHER CARRIER SUBSTRATE
77
Patent #:
6939817
Issue Dt:
09/06/2005
Application #:
10435569
Filing Dt:
05/08/2003
Publication #:
US20040224510
Pub Dt:
11/11/2004
Title:
REMOVAL OF CARBON FROM AN INSULATIVE LAYER USING OZONE
78
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6826098
Issue Dt:
11/30/2004
Application #:
10435590
Filing Dt:
05/12/2003
Publication #:
US20030214865
Pub Dt:
11/20/2003
Title:
SEMICONDUCTOR MEMORY HAVING MULTIPLE REDUNDANT COLUMNS WITH OFFSET SEGMENTATION BOUNDARIES
79
Patent #:
7060637
Issue Dt:
06/13/2006
Application #:
10435791
Filing Dt:
05/12/2003
Publication #:
US20040229050
Pub Dt:
11/18/2004
Title:
METHODS OF FORMING INTERMEDIATE SEMICONDUCTOR DEVICE STRUCTURES USING SPIN-ON, PHOTOPATTERNABLE, INTERLAYER DIELECTRIC MATERIALS
80
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Issue Dt:
02/08/2005
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10436584
Filing Dt:
05/12/2003
Publication #:
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Pub Dt:
11/18/2004
Title:
SEMICONDUCTOR COMPONENT HAVING STACKED, ENCAPSULATED DICE
81
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Issue Dt:
09/25/2007
Application #:
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Filing Dt:
05/13/2003
Publication #:
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Pub Dt:
10/30/2003
Title:
METHODS FOR FORMING PHOSPHORUS- AND/OR BORON-CONTAINING SILICA LAYERS ON SUBSTRATES
82
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7437634
Issue Dt:
10/14/2008
Application #:
10436775
Filing Dt:
05/13/2003
Publication #:
US20040243896
Pub Dt:
12/02/2004
Title:
TEST SCAN CELLS
83
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6926191
Issue Dt:
08/09/2005
Application #:
10437214
Filing Dt:
05/13/2003
Publication #:
US20030201309
Pub Dt:
10/30/2003
Title:
PROCESS FOR FABRICATING EXTERNAL CONTACTS ON SEMICONDUCTOR COMPONENTS
84
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6781397
Issue Dt:
08/24/2004
Application #:
10437354
Filing Dt:
05/12/2003
Publication #:
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Pub Dt:
10/30/2003
Title:
ELECTRICAL COMMUNICATION SYSTEM FOR CIRCUITRY
85
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7572666
Issue Dt:
08/11/2009
Application #:
10438146
Filing Dt:
05/13/2003
Publication #:
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Pub Dt:
10/30/2003
Title:
REDUCED AREA INTERSECTION BETWEEN ELECTRODE AND PROGRAMMING ELEMENT
86
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6920066
Issue Dt:
07/19/2005
Application #:
10438175
Filing Dt:
05/13/2003
Publication #:
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Pub Dt:
02/26/2004
Title:
PROGRAMMING METHOD OF THE MEMORY CELLS IN A MULTILEVEL NON-VOLATILE MEMORY DEVICE
87
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6875679
Issue Dt:
04/05/2005
Application #:
10438360
Filing Dt:
05/14/2003
Publication #:
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Pub Dt:
10/23/2003
Title:
ETCH STOP LAYER IN POLY-METAL STRUCTURES
88
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6807103
Issue Dt:
10/19/2004
Application #:
10438733
Filing Dt:
05/15/2003
Publication #:
US20040017722
Pub Dt:
01/29/2004
Title:
PAGE-ERASABLE FLASH MEMORY
89
Patent #:
6869869
Issue Dt:
03/22/2005
Application #:
10439369
Filing Dt:
05/16/2003
Publication #:
US20030205795
Pub Dt:
11/06/2003
Title:
ALIGNMENT AND ORIENTATION FEATURES FOR A SEMICONDUCTOR PACKAGE
90
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6735132
Issue Dt:
05/11/2004
Application #:
10439729
Filing Dt:
05/16/2003
Publication #:
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Pub Dt:
10/23/2003
Title:
6F2 DRAM ARRAY WITH APPARATUS FOR STRESS TESTING AN ISOLATION GATE AND METHOD
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6838293
Issue Dt:
01/04/2005
Application #:
10439774
Filing Dt:
05/16/2003
Publication #:
US20030207472
Pub Dt:
11/06/2003
Title:
METHOD FOR CONTROLLING DEPOSITION OF DIELECTRIC FILMS
92
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6944072
Issue Dt:
09/13/2005
Application #:
10440043
Filing Dt:
05/15/2003
Publication #:
US20040008549
Pub Dt:
01/15/2004
Title:
SELF-REPAIR METHOD FOR NONVOLATILE MEMORY DEVICES WITH ERASING/PROGRAMMING FAILURE, AND RELATIVE NONVOLATILE MEMORY DEVICE
93
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6839265
Issue Dt:
01/04/2005
Application #:
10440575
Filing Dt:
05/19/2003
Publication #:
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Pub Dt:
10/23/2003
Title:
BI-LEVEL DIGIT LINE ARCHITECTURE FOR HIGH DENSITY DRAMS
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7226809
Issue Dt:
06/05/2007
Application #:
10440590
Filing Dt:
05/19/2003
Publication #:
US20030232462
Pub Dt:
12/18/2003
Title:
SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICE COMPONENTS WITH PERIPHERALLY LOCATED, CASTELLATED CONTACTS, ASSEMBLIES AND PACKAGES INCLUDING SUCH SEMICONDUCTOR DEVICES OR PACKAGES AND ASSOCIATED METHODS
95
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6849501
Issue Dt:
02/01/2005
Application #:
10441380
Filing Dt:
05/20/2003
Publication #:
US20030203557
Pub Dt:
10/30/2003
Title:
METHODS FOR FABRICATION AN IMPROVED FLOATING GATE MEMORY CELL
96
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6865131
Issue Dt:
03/08/2005
Application #:
10441702
Filing Dt:
05/20/2003
Publication #:
US20030206464
Pub Dt:
11/06/2003
Title:
MEMORY DEVICES WITH REDUCED POWER CONSUMPTION REFRESH CYCLES
97
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6859760
Issue Dt:
02/22/2005
Application #:
10441703
Filing Dt:
05/20/2003
Publication #:
US20030208340
Pub Dt:
11/06/2003
Title:
REMOTE SEMICONDUCTOR MICROSCOPY
98
Patent #:
6692900
Issue Dt:
02/17/2004
Application #:
10441870
Filing Dt:
05/19/2003
Publication #:
US20030198876
Pub Dt:
10/23/2003
Title:
METHODS OF PATTERNING RADIATION, METHODS OF FORMING RADIATION-PATTERNING TOOLS, AND RADIATION-PATTERNING TOOLS
99
Patent #:
7092234
Issue Dt:
08/15/2006
Application #:
10442509
Filing Dt:
05/20/2003
Publication #:
US20040233610
Pub Dt:
11/25/2004
Title:
DRAM CELLS AND ELECTRONIC SYSTEMS
100
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7627737
Issue Dt:
12/01/2009
Application #:
10442667
Filing Dt:
05/20/2003
Publication #:
US20040054818
Pub Dt:
03/18/2004
Title:
PROCESSING ELEMENT AND METHOD CONNECTING REGISTERS TO PROCESSING LOGIC IN A PLURALITY OF CONFIGURATIONS
Assignor
1
MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Exec Dt:
07/31/2019
Assignee
1
MICRON TECHNOLOGY, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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