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Reel/Frame:	050937/0001			Pages:	964
		Recorded:	10/09/2019
Attorney Dkt #:	4816.244
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 18018
Page 78 of 181
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Patent #:	6925404	Issue Dt:	08/02/2005	Application #:	10783181	Filing Dt:	02/19/2004
Publication #:	US20040162693	Pub Dt:	08/19/2004
Title:	APPARATUS AND METHOD FOR DETERMINING EFFECT OF ON-CHIP NOISE ON SIGNAL PROPAGATION

Patent #:	6905973	Issue Dt:	06/14/2005	Application #:	10783419	Filing Dt:	02/19/2004
Publication #:	US20040166690	Pub Dt:	08/26/2004
Title:	METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS

Patent #:	7166886	Issue Dt:	01/23/2007	Application #:	10783695	Filing Dt:	02/20/2004
Publication #:	US20040160830	Pub Dt:	08/19/2004
Title:	DRAM CELLS WITH REPRESSED FLOATING GATE MEMORY, LOW TUNNEL BARRIER INTERPOLY INSULATORS

Patent #:	7224600	Issue Dt:	05/29/2007	Application #:	10783935	Filing Dt:	02/20/2004
Publication #:	US20050152177	Pub Dt:	07/14/2005
Title:	TAMPER MEMORY CELL

Patent #:	6943106	Issue Dt:	09/13/2005	Application #:	10784074	Filing Dt:	02/20/2004
Publication #:	US20050186790	Pub Dt:	08/25/2005
Title:	METHODS OF FABRICATING INTERCONNECTS FOR SEMICONDUCTOR COMPONENTS INCLUDING PLATING SOLDER-WETTING MATERIAL AND SOLDER FILLING

Patent #:	6977853	Issue Dt:	12/20/2005	Application #:	10784372	Filing Dt:	02/23/2004
Publication #:	US20040165435	Pub Dt:	08/26/2004
Title:	FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES

Patent #:	6973005	Issue Dt:	12/06/2005	Application #:	10784373	Filing Dt:	02/23/2004
Publication #:	US20040165436	Pub Dt:	08/26/2004
Title:	FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES

Patent #:	6982920	Issue Dt:	01/03/2006	Application #:	10784442	Filing Dt:	02/23/2004
Publication #:	US20040165437	Pub Dt:	08/26/2004
Title:	FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES

Patent #:	6934207	Issue Dt:	08/23/2005	Application #:	10784458	Filing Dt:	02/23/2004
Publication #:	US20040165409	Pub Dt:	08/26/2004
Title:	FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES

Patent #:	6909636	Issue Dt:	06/21/2005	Application #:	10784493	Filing Dt:	02/23/2004
Publication #:	US20040165438	Pub Dt:	08/26/2004
Title:	FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES

Patent #:	6862243	Issue Dt:	03/01/2005	Application #:	10784495	Filing Dt:	02/23/2004
Publication #:	US20040165439	Pub Dt:	08/26/2004
Title:	FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES

Patent #:	6977854	Issue Dt:	12/20/2005	Application #:	10784508	Filing Dt:	02/23/2004
Publication #:	US20040165440	Pub Dt:	08/26/2004
Title:	FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES

Patent #:	6940780	Issue Dt:	09/06/2005	Application #:	10784688	Filing Dt:	02/23/2004
Publication #:	US20040165410	Pub Dt:	08/26/2004
Title:	FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES

Patent #:	6847552	Issue Dt:	01/25/2005	Application #:	10784724	Filing Dt:	02/23/2004
Publication #:	US20040165441	Pub Dt:	08/26/2004
Title:	FLASH ARRAY IMPLEMENTATION WITH LOCAL AND GLOBAL BIT LINES

Patent #:	6879516	Issue Dt:	04/12/2005	Application #:	10784785	Filing Dt:	02/24/2004
Publication #:	US20040165461	Pub Dt:	08/26/2004
Title:	STACKED COLUMNAR 1T-NMTJ MRAM STRUCTURE AND ITS METHOD OF FORMATION AND OPERATION

Patent #:	7023743	Issue Dt:	04/04/2006	Application #:	10784786	Filing Dt:	02/24/2004
Publication #:	US20040165421	Pub Dt:	08/26/2004
Title:	STACKED COLUMNAR 1T-NMTJ STRUCTURE AND ITS METHOD OF FORMATION AND OPERATION

Patent #:	7116000	Issue Dt:	10/03/2006	Application #:	10785122	Filing Dt:	02/24/2004
Publication #:	US20040164413	Pub Dt:	08/26/2004
Title:	UNDERFILLED, ENCAPSULATED SEMICONDUCTOR DIE ASSEMBLIES AND METHODS OF FABRICATION

Patent #:	7075146	Issue Dt:	07/11/2006	Application #:	10785310	Filing Dt:	02/24/2004
Publication #:	US20050184337	Pub Dt:	08/25/2005
Title:	4F2 EEPROM NROM MEMORY ARRAYS WITH VERTICAL DEVICES

Patent #:	7115928	Issue Dt:	10/03/2006	Application #:	10785438	Filing Dt:	02/24/2004
Publication #:	US20050003610	Pub Dt:	01/06/2005
Title:	DUAL-DAMASCENE BIT LINE STRUCTURES FOR MICROELECTRONIC DEVICES AND METHODS OF FABRICATING MICROELECTRONIC DEVICES

Patent #:	6833278	Issue Dt:	12/21/2004	Application #:	10785769	Filing Dt:	02/24/2004
Publication #:	US20040166618	Pub Dt:	08/26/2004
Title:	LOW REMANENCE FLUX CONCENTRATOR FOR MRAM DEVICES

Patent #:	7072217	Issue Dt:	07/04/2006	Application #:	10785785	Filing Dt:	02/24/2004
Publication #:	US20050185466	Pub Dt:	08/25/2005
Title:	MULTI-STATE MEMORY CELL WITH ASYMMETRIC CHARGE TRAPPING

Patent #:	7114034	Issue Dt:	09/26/2006	Application #:	10785786	Filing Dt:	02/24/2004
Publication #:	US20040168027	Pub Dt:	08/26/2004
Title:	CACHING OF DYNAMIC ARRAYS

Patent #:	7084448	Issue Dt:	08/01/2006	Application #:	10786348	Filing Dt:	02/24/2004
Publication #:	US20040164335	Pub Dt:	08/26/2004
Title:	DOUBLE SIDED CONTAINER PROCESS USED DURING THE MANUFACTURE OF A SEMICONDUCTOR DEVICE

Patent #:	7333520	Issue Dt:	02/19/2008	Application #:	10786716	Filing Dt:	02/23/2004
Publication #:	US20040165619	Pub Dt:	08/26/2004
Title:	APPARATUS FOR MULTIPLEXING SIGNALS THROUGH I/O PINS

Patent #:	6864139	Issue Dt:	03/08/2005	Application #:	10786726	Filing Dt:	02/25/2004
Publication #:	US20040166621	Pub Dt:	08/26/2004
Title:	STATIC NVRAM WITH ULTRA THIN TUNNEL OXIDES

Patent #:	7112815	Issue Dt:	09/26/2006	Application #:	10786765	Filing Dt:	02/25/2004
Publication #:	US20050184329	Pub Dt:	08/25/2005
Title:	MULTI-LAYER MEMORY ARRAYS

Patent #:	6914822	Issue Dt:	07/05/2005	Application #:	10786768	Filing Dt:	02/25/2004
Publication #:	US20040170078	Pub Dt:	09/02/2004
Title:	READ-BIASING AND AMPLIFYING SYSTEM

Patent #:	6953720	Issue Dt:	10/11/2005	Application #:	10787121	Filing Dt:	02/27/2004
Publication #:	US20040185625	Pub Dt:	09/23/2004
Title:	METHODS FOR FORMING CHALCOGENIDE GLASS-BASED MEMORY ELEMENTS

Patent #:	7078823	Issue Dt:	07/18/2006	Application #:	10787351	Filing Dt:	02/26/2004
Publication #:	US20040201075	Pub Dt:	10/14/2004
Title:	SEMICONDUCTOR DIE CONFIGURED FOR USE WITH INTERPOSER SUBSTRATES HAVING REINFORCED INTERCONNECT SLOTS

Patent #:	7256123	Issue Dt:	08/14/2007	Application #:	10787450	Filing Dt:	02/26/2004
Publication #:	US20040175920	Pub Dt:	09/09/2004
Title:	METHOD OF FORMING AN INTERFACE FOR A SEMICONDUCTOR DEVICE

Patent #:	7206240	Issue Dt:	04/17/2007	Application #:	10787911	Filing Dt:	02/25/2004
Publication #:	US20040165464	Pub Dt:	08/26/2004
Title:	FAST SENSING SCHEME FOR FLOATING-GATE MEMORY CELLS

Patent #:	6839505	Issue Dt:	01/04/2005	Application #:	10788146	Filing Dt:	02/26/2004
Publication #:	US20040170402	Pub Dt:	09/02/2004
Title:	DELIVERY OF SOLID CHEMICAL PRECURSORS

Patent #:	7130216	Issue Dt:	10/31/2006	Application #:	10788230	Filing Dt:	02/26/2004
Publication #:	US20040160825	Pub Dt:	08/19/2004
Title:	ONE-DEVICE NON-VOLATILE RANDOM ACCESS MEMORY CELL

Patent #:	7085163	Issue Dt:	08/01/2006	Application #:	10788525	Filing Dt:	02/26/2004
Publication #:	US20040233722	Pub Dt:	11/25/2004
Title:	GATE VOLTAGE REGULATION SYSTEM FOR A NON VOLATILE MEMORY CELLS PROGRAMMING AND/OR SOFT PROGRAMMING PHASE

Patent #:	7173845	Issue Dt:	02/06/2007	Application #:	10788581	Filing Dt:	02/27/2004
Publication #:	US20040223362	Pub Dt:	11/11/2004
Title:	USER RAM FLASH CLEAR

Patent #:	7071558	Issue Dt:	07/04/2006	Application #:	10788730	Filing Dt:	02/27/2004
Publication #:	US20040171203	Pub Dt:	09/02/2004
Title:	AGGLOMERATION CONTROL USING EARLY TRANSITION METAL ALLOYS

Patent #:	7074673	Issue Dt:	07/11/2006	Application #:	10788810	Filing Dt:	02/27/2004
Publication #:	US20040168145	Pub Dt:	08/26/2004
Title:	SERVICE PROGRAMMABLE LOGIC ARRAYS WITH LOW TUNNEL BARRIER INTERPOLY INSULATORS

Patent #:	7071117	Issue Dt:	07/04/2006	Application #:	10788892	Filing Dt:	02/27/2004
Publication #:	US20050191866	Pub Dt:	09/01/2005
Title:	SEMICONDUCTOR DEVICES AND METHODS FOR DEPOSITING A DIELECTRIC FILM

Patent #:	7468323	Issue Dt:	12/23/2008	Application #:	10788899	Filing Dt:	02/27/2004
Publication #:	US20050191856	Pub Dt:	09/01/2005
Title:	METHOD OF FORMING HIGH ASPECT RATIO STRUCTURES

Patent #:	7057297	Issue Dt:	06/06/2006	Application #:	10788990	Filing Dt:	02/27/2004
Publication #:	US20050051880	Pub Dt:	03/10/2005
Title:	TAPE SUBSTRATES WITH MOLD GATE SUPPORT STRUCTURES THAT ARE COPLANAR WITH CONDUCTIVE TRACES THEREOF AND ASSOCIATED METHODS

Patent #:	7229924	Issue Dt:	06/12/2007	Application #:	10788991	Filing Dt:	02/27/2004
Publication #:	US20040209456	Pub Dt:	10/21/2004
Title:	SURFACE BARRIERS FOR COPPER AND SILVER INTERCONNECTS PRODUCED BY A DAMASCENE PROCESS

Patent #:	6952362	Issue Dt:	10/04/2005	Application #:	10789041	Filing Dt:	02/27/2004
Publication #:	US20040165412	Pub Dt:	08/26/2004
Title:	FERROELECTRIC WRITE ONCE READ ONLY MEMORY FOR ARCHIVAL STORAGE

Patent #:	7235854	Issue Dt:	06/26/2007	Application #:	10789044	Filing Dt:	02/27/2004
Publication #:	US20040164365	Pub Dt:	08/26/2004
Title:	LANTHANIDE DOPED TIOX DIELECTRIC FILMS

Patent #:	7336547	Issue Dt:	02/26/2008	Application #:	10789190	Filing Dt:	02/27/2004
Publication #:	US20050190635	Pub Dt:	09/01/2005
Title:	MEMORY DEVICE HAVING CONDITIONING OUTPUT DATA

Patent #:	7109548	Issue Dt:	09/19/2006	Application #:	10789203	Filing Dt:	02/27/2004
Publication #:	US20040164341	Pub Dt:	08/26/2004
Title:	OPERATING A MEMORY DEVICE

Patent #:	6907493	Issue Dt:	06/14/2005	Application #:	10789290	Filing Dt:	02/27/2004
Publication #:	US20040168020	Pub Dt:	08/26/2004
Title:	MEMORY DEVICE INTERFACE

Patent #:	7139197	Issue Dt:	11/21/2006	Application #:	10789351	Filing Dt:	02/26/2004
Publication #:	US20040233723	Pub Dt:	11/25/2004
Title:	VOLTAGE REGULATION SYSTEM FOR A MULTIWORD PROGRAMMING OF A LOW INTEGRATION AREA NON VOLATILE MEMORY

Patent #:	7132299	Issue Dt:	11/07/2006	Application #:	10789381	Filing Dt:	02/27/2004
Publication #:	US20050191764	Pub Dt:	09/01/2005
Title:	METHOD OF FORMING A MAGNETIC RANDOM ACCESS MEMORY STRUCTURE

Patent #:	6891756	Issue Dt:	05/10/2005	Application #:	10789449	Filing Dt:	02/26/2004
Publication #:	US20040264250	Pub Dt:	12/30/2004
Title:	FLASH MEMORY COMPRISING AN ERASE VERIFY ALGORITHM INTEGRATED INTO A PROGRAMMING ALGORITHM

Patent #:	7220683	Issue Dt:	05/22/2007	Application #:	10789736	Filing Dt:	02/27/2004
Publication #:	US20050056835	Pub Dt:	03/17/2005
Title:	TRANSPARENT AMORPHOUS CARBON STRUCTURE IN SEMICONDUCTOR DEVICES

Patent #:	7214978	Issue Dt:	05/08/2007	Application #:	10789800	Filing Dt:	02/27/2004
Publication #:	US20050189575	Pub Dt:	09/01/2005
Title:	SEMICONDUCTOR FABRICATION THAT INCLUDES SURFACE TENSION CONTROL

Patent #:	7394157	Issue Dt:	07/01/2008	Application #:	10789882	Filing Dt:	02/27/2004
Publication #:	US20040169213	Pub Dt:	09/02/2004
Title:	INTEGRATED CIRCUIT AND SEED LAYERS

Patent #:	7067411	Issue Dt:	06/27/2006	Application #:	10789890	Filing Dt:	02/27/2004
Publication #:	US20040171244	Pub Dt:	09/02/2004
Title:	Method to prevent metal oxide formation during polycide reoxidation

Patent #:	7432774	Issue Dt:	10/07/2008	Application #:	10789931	Filing Dt:	02/27/2004
Publication #:	US20050190587	Pub Dt:	09/01/2005
Title:	MICROSTRIP LINE DIELECTRIC OVERLAY

Patent #:	6859383	Issue Dt:	02/22/2005	Application #:	10790242	Filing Dt:	03/02/2004
Publication #:	US20040190327	Pub Dt:	09/30/2004
Title:	SENSING METHOD AND APPARATUS FOR RESISTANCE MEMORY DEVICE

Patent #:	7479650	Issue Dt:	01/20/2009	Application #:	10790816	Filing Dt:	03/03/2004
Publication #:	US20040171208	Pub Dt:	09/02/2004
Title:	METHOD OF MANUFACTURE OF PROGRAMMABLE CONDUCTOR MEMORY

Patent #:	7186608	Issue Dt:	03/06/2007	Application #:	10791006	Filing Dt:	03/02/2004
Publication #:	US20040171209	Pub Dt:	09/02/2004
Title:	NOVEL MASKED NITROGEN ENHANCED GATE OXIDE

Patent #:	7107117	Issue Dt:	09/12/2006	Application #:	10791193	Filing Dt:	03/02/2004
Publication #:	US20040172152	Pub Dt:	09/02/2004
Title:	SORTING A GROUP OF INTEGRATED CIRCUIT DEVICES FOR THOSE DEVICES REQUIRING SPECIAL TESTING

Patent #:	6967383	Issue Dt:	11/22/2005	Application #:	10791400	Filing Dt:	03/02/2004
Publication #:	US20040173861	Pub Dt:	09/09/2004
Title:	TRANSISTOR WITH NITROGEN-HARDENED GATE OXIDE

Patent #:	7116001	Issue Dt:	10/03/2006	Application #:	10792229	Filing Dt:	03/03/2004
Publication #:	US20040169203	Pub Dt:	09/02/2004
Title:	BUMPED DIE AND WIRE BONDED BOARD-ON-CHIP PACKAGE

Patent #:	6841445	Issue Dt:	01/11/2005	Application #:	10792308	Filing Dt:	03/03/2004
Publication #:	US20040173840	Pub Dt:	09/09/2004
Title:	METHOD OF MAKING FLOATING GATE NON-VOLATILE MEMORY CELL WITH LOW ERASING VOLTAGE HAVING DOUBLE LAYER GATE DIELECTRIC

Patent #:	6800517	Issue Dt:	10/05/2004	Application #:	10792532	Filing Dt:	03/02/2004
Publication #:	US20040166622	Pub Dt:	08/26/2004
Title:	METHODS OF FORMING CONDUCTIVE INTERCONNECTS

Patent #:	6900497	Issue Dt:	05/31/2005	Application #:	10792762	Filing Dt:	03/05/2004
Publication #:	US20040173837	Pub Dt:	09/09/2004
Title:	AN INTEGRATED CIRCUIT WITH A CAPACITOR COMPRISING AN ELECTRODE

Patent #:	6949834	Issue Dt:	09/27/2005	Application #:	10793234	Filing Dt:	03/04/2004
Publication #:	US20040171191	Pub Dt:	09/02/2004
Title:	STACKED SEMICONDUCTOR PACKAGE WITH CIRCUIT SIDE POLYMER LAYER

Patent #:	7033867	Issue Dt:	04/25/2006	Application #:	10793309	Filing Dt:	03/04/2004
Publication #:	US20040169254	Pub Dt:	09/02/2004
Title:	SHALLOW TRENCH ANTIFUSE AND METHODS OF MAKING AND USING SAME

Patent #:	6936775	Issue Dt:	08/30/2005	Application #:	10793415	Filing Dt:	03/04/2004
Publication #:	US20040168826	Pub Dt:	09/02/2004
Title:	SELECTIVELY CONFIGURABLE CIRCUIT BOARD

Patent #:	7115990	Issue Dt:	10/03/2006	Application #:	10793564	Filing Dt:	03/04/2004
Publication #:	US20040169278	Pub Dt:	09/02/2004
Title:	BUMPED DIE AND WIRE BONDED BOARD-ON-CHIP PACKAGE

Patent #:	8013371	Issue Dt:	09/06/2011	Application #:	10793587	Filing Dt:	03/04/2004
Publication #:	US20040169259	Pub Dt:	09/02/2004
Title:	ULTRA THIN TCS (SICL4) CELL NITRIDE FOR DRAM CAPACITOR WITH DCS (SIH2CI2) INTERFACE SEEDING LAYER

Patent #:	7194667	Issue Dt:	03/20/2007	Application #:	10794696	Filing Dt:	03/05/2004
Publication #:	US20040181724	Pub Dt:	09/16/2004
Title:	SYSTEM FOR STORING DEVICE TEST INFORMATION ON A SEMICONDUCTOR DEVICE USING ON-DEVICE LOGIC FOR DETERMINATION OF TEST RESULTS

Patent #:	7105386	Issue Dt:	09/12/2006	Application #:	10795516	Filing Dt:	03/09/2004
Publication #:	US20040171219	Pub Dt:	09/02/2004
Title:	HIGH DENSITY SRAM CELL WITH LATCHED VERTICAL TRANSISTORS

Patent #:	6956761	Issue Dt:	10/18/2005	Application #:	10796000	Filing Dt:	03/10/2004
Publication #:	US20050202620	Pub Dt:	09/15/2005
Title:	METHOD TO MANUFACTURE POLYMER MEMORY WITH COPPER ION SWITCHING SPECIES

Patent #:	6979902	Issue Dt:	12/27/2005	Application #:	10796110	Filing Dt:	03/10/2004
Publication #:	US20050200012	Pub Dt:	09/15/2005
Title:	CHIP SIZE IMAGE SENSOR CAMERA MODULE

Patent #:	6956272	Issue Dt:	10/18/2005	Application #:	10796115	Filing Dt:	03/10/2004
Publication #:	US20050199974	Pub Dt:	09/15/2005
Title:	SUPPORT FRAME FOR SEMICONDUCTOR PACKAGES

Patent #:	7086927	Issue Dt:	08/08/2006	Application #:	10796257	Filing Dt:	03/09/2004
Publication #:	US20050202756	Pub Dt:	09/15/2005
Title:	METHODS AND SYSTEMS FOR PLANARIZING WORKPIECES, E.G., MICROELECTRONIC WORKPIECES

Patent #:	7101594	Issue Dt:	09/05/2006	Application #:	10796479	Filing Dt:	03/08/2004
Publication #:	US20040171259	Pub Dt:	09/02/2004
Title:	METHODS OF FORMING CAPACITOR CONSTRUCTIONS

Patent #:	6861697	Issue Dt:	03/01/2005	Application #:	10797495	Filing Dt:	03/10/2004
Title:	INTERCONNECTING CONDUCTIVE LAYERS OF MEMORY DEVICES

Patent #:	7129114	Issue Dt:	10/31/2006	Application #:	10797504	Filing Dt:	03/10/2004
Publication #:	US20050202651	Pub Dt:	09/15/2005
Title:	METHODS RELATING TO SINGULATING SEMICONDUCTOR WAFERS AND WAFER SCALE ASSEMBLIES

Patent #:	7233064	Issue Dt:	06/19/2007	Application #:	10797647	Filing Dt:	03/10/2004
Publication #:	US20050218486	Pub Dt:	10/06/2005
Title:	SEMICONDUCTOR BGA PACKAGE HAVING A SEGMENTED VOLTAGE PLANE AND METHOD OF MAKING

Patent #:	7366864	Issue Dt:	04/29/2008	Application #:	10797727	Filing Dt:	03/08/2004
Publication #:	US20050210216	Pub Dt:	09/22/2005
Title:	MEMORY HUB ARCHITECTURE HAVING PROGRAMMABLE LANE WIDTHS

Patent #:	7049173	Issue Dt:	05/23/2006	Application #:	10797807	Filing Dt:	03/10/2004
Publication #:	US20050023654	Pub Dt:	02/03/2005
Title:	METHOD FOR FABRICATING SEMICONDUCTOR COMPONENT WITH CHIP ON BOARD LEADFRAME

Patent #:	7415577	Issue Dt:	08/19/2008	Application #:	10799555	Filing Dt:	03/10/2004
Publication #:	US20050204099	Pub Dt:	09/15/2005
Title:	METHOD AND APPARATUS TO WRITE BACK DATA

Patent #:	6940179	Issue Dt:	09/06/2005	Application #:	10800058	Filing Dt:	03/12/2004
Publication #:	US20040173915	Pub Dt:	09/09/2004
Title:	INNOVATIVE SOLDER BALL PAD STRUCTURE TO EASE DESIGN RULE, METHODS OF FABRICATING SAME AND SUBSTRATES, ELECTRONIC DEVICE ASSEMBLIES AND SYSTEMS EMPLOYING SAME

Patent #:	7262089	Issue Dt:	08/28/2007	Application #:	10800196	Filing Dt:	03/11/2004
Publication #:	US20050199932	Pub Dt:	09/15/2005
Title:	METHODS OF FORMING SEMICONDUCTOR STRUCTURES

Patent #:	7299381	Issue Dt:	11/20/2007	Application #:	10801588	Filing Dt:	03/17/2004
Publication #:	US20050210334	Pub Dt:	09/22/2005
Title:	DISCRETE TESTS FOR WEAK BITS

Patent #:	7009374	Issue Dt:	03/07/2006	Application #:	10804346	Filing Dt:	03/19/2004
Publication #:	US20050052173	Pub Dt:	03/10/2005
Title:	LOW RESISTANCE BANDGAP REFERENCE CIRCUIT WITH RESISTIVE T-NETWORK

Patent #:	7354863	Issue Dt:	04/08/2008	Application #:	10804366	Filing Dt:	03/19/2004
Publication #:	US20050208766	Pub Dt:	09/22/2005
Title:	METHODS OF SELECTIVELY REMOVING SILICON

Patent #:	7376874	Issue Dt:	05/20/2008	Application #:	10804371	Filing Dt:	03/19/2004
Publication #:	US20040181725	Pub Dt:	09/16/2004
Title:	METHOD OF CONTROLLING A TEST MODE OF A CIRCUIT

Patent #:	6950585	Issue Dt:	09/27/2005	Application #:	10804421	Filing Dt:	03/19/2004
Publication #:	US20040175085	Pub Dt:	09/09/2004
Title:	HOLLOW CORE PHOTONIC BANDGAP OPTICAL FIBER

Patent #:	6920064	Issue Dt:	07/19/2005	Application #:	10804584	Filing Dt:	03/16/2004
Publication #:	US20040213055	Pub Dt:	10/28/2004
Title:	MAGNETO-RESISTIVE MEMORY CELL STRUCTURES WITH IMPROVED SELECTIVITY

Patent #:	7282948	Issue Dt:	10/16/2007	Application #:	10804699	Filing Dt:	03/19/2004
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Title:	MOS LINEAR REGION IMPEDANCE CURVATURE CORRECTION

Patent #:	7328397	Issue Dt:	02/05/2008	Application #:	10805168	Filing Dt:	03/19/2004
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Title:	METHOD FOR PERFORMING ERROR CORRECTIONS OF DIGITAL INFORMATION CODIFIED AS A SYMBOL SEQUENCE

Patent #:	7730357	Issue Dt:	06/01/2010	Application #:	10805182	Filing Dt:	03/19/2004
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Title:	INTEGRATED MEMORY SYSTEM

Patent #:	7151054	Issue Dt:	12/19/2006	Application #:	10805557	Filing Dt:	03/19/2004
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Title:	SEMICONDUCTOR PROCESSING METHODS OF FORMING AND UTILIZING ANTIREFLECTIVE MATERIAL LAYERS, AND METHODS OF FORMING TRANSISTOR GATE STACKS

Patent #:	6913523	Issue Dt:	07/05/2005	Application #:	10806765	Filing Dt:	03/22/2004
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Title:	METHOD FOR CONTROLLING PH DURING PLANARIZATION AND CLEANING OF MICROELECTRONIC SUBSTRATES

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Title:	METHODS OF DEPOSITING SILICON DIOXIDE COMPRISING LAYERS IN THE FABRICATION OF INTEGRATED CIRCUITRY, METHODS OF FORMING TRENCH ISOLATION, AND METHODS OF FORMING ARRAYS OF MEMORY CELLS

Patent #:	6951790	Issue Dt:	10/04/2005	Application #:	10808018	Filing Dt:	03/24/2004
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Title:	METHOD OF FORMING SELECT LINES FOR NAND MEMORY DEVICES

Patent #:	7102191	Issue Dt:	09/05/2006	Application #:	10808058	Filing Dt:	03/24/2004
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Title:	MEMORY DEVICE WITH HIGH DIELECTRIC CONSTANT GATE DIELECTRICS AND METAL FLOATING GATES

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Title:	DOPED ALUMINUM OXIDE DIELECTRICS

100

Patent #:	7257683	Issue Dt:	08/14/2007	Application #:	10809839	Filing Dt:	03/24/2004
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Title:	MEMORY ARBITRATION SYSTEM AND METHOD HAVING AN ARBITRATION PACKET PROTOCOL

Assignor

MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT

Exec Dt:

07/31/2019

Assignee

MICRON TECHNOLOGY, INC.

8000 S FEDERAL WAY

BOISE, IDAHO 83707

Correspondence name and address
	WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
	ONE MARKET, SPEAR TOWER, SUITE 3300
	SAN FRANCISCO, CA 94105

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