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Reel/Frame:	050937/0001			Pages:	964
		Recorded:	10/09/2019
Attorney Dkt #:	4816.244
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 18018
Page 84 of 181
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Patent #:	7122464	Issue Dt:	10/17/2006	Application #:	10929823	Filing Dt:	08/30/2004
Publication #:	US20050032360	Pub Dt:	02/10/2005
Title:	SYSTEMS AND METHODS OF FORMING REFRACTORY METAL NITRIDE LAYERS USING DISILAZANES

Patent #:	7196007	Issue Dt:	03/27/2007	Application #:	10929827	Filing Dt:	08/30/2004
Publication #:	US20050028733	Pub Dt:	02/10/2005
Title:	SYSTEMS AND METHODS OF FORMING REFRACTORY METAL NITRIDE LAYERS USING DISILAZANES

Patent #:	6900128	Issue Dt:	05/31/2005	Application #:	10929853	Filing Dt:	08/30/2004
Publication #:	US20050023687	Pub Dt:	02/03/2005
Title:	ACTIVATION OF OXIDES FOR ELECTROLESS PLATING

Patent #:	7378290	Issue Dt:	05/27/2008	Application #:	10929898	Filing Dt:	08/30/2004
Publication #:	US20050026315	Pub Dt:	02/03/2005
Title:	ISOLATION CIRCUIT

Patent #:	7215838	Issue Dt:	05/08/2007	Application #:	10929904	Filing Dt:	08/30/2004
Publication #:	US20050025424	Pub Dt:	02/03/2005
Title:	RESISTIVE HEATER FOR THERMO OPTIC DEVICE

Patent #:	7126183	Issue Dt:	10/24/2006	Application #:	10929916	Filing Dt:	08/30/2004
Publication #:	US20050023602	Pub Dt:	02/03/2005
Title:	PROGRAMMABLE ARRAY LOGIC OR MEMORY WITH P-CHANNEL DEVICES AND ASYMMETRICAL TUNNEL BARRIERS

Patent #:	7473956	Issue Dt:	01/06/2009	Application #:	10929986	Filing Dt:	08/30/2004
Publication #:	US20050023603	Pub Dt:	02/03/2005
Title:	ATOMIC LAYER DEPOSITION OF METAL OXIDE AND/OR LOW ASYMMETRICAL TUNNEL BARRIER INTERPOLY INSULATORS

Patent #:	7659152	Issue Dt:	02/09/2010	Application #:	10930001	Filing Dt:	08/30/2004
Publication #:	US20050032284	Pub Dt:	02/10/2005
Title:	LOCALIZED BIASING FOR SILICON ON INSULATOR STRUCTURES

Patent #:	7272758	Issue Dt:	09/18/2007	Application #:	10930087	Filing Dt:	08/31/2004
Publication #:	US20060059383	Pub Dt:	03/16/2006
Title:	DEFECTIVE MEMORY BLOCK IDENTIFICATION IN A MEMORY DEVICE

Patent #:	6930346	Issue Dt:	08/16/2005	Application #:	10930138	Filing Dt:	08/31/2004
Publication #:	US20050026374	Pub Dt:	02/03/2005
Title:	EVAPORATION OF Y-SI-O FILMS FOR MEDIUM-K DIELECTRICS

Patent #:	8158488	Issue Dt:	04/17/2012	Application #:	10930149	Filing Dt:	08/31/2004
Publication #:	US20060046518	Pub Dt:	03/02/2006
Title:	METHOD OF INCREASING DEPOSITION RATE OF SILICON DIOXIDE ON A CATALYST

Patent #:	7213188	Issue Dt:	05/01/2007	Application #:	10930153	Filing Dt:	08/31/2004
Publication #:	US20060048033	Pub Dt:	03/02/2006
Title:	ACCESSING TEST MODES USING COMMAND SEQUENCES

Patent #:	7602049	Issue Dt:	10/13/2009	Application #:	10930158	Filing Dt:	08/31/2004
Publication #:	US20050023650	Pub Dt:	02/03/2005
Title:	CAPACITIVE TECHNIQUES TO REDUCE NOISE IN HIGH SPEED INTERCONNECTIONS

Patent #:	7494939	Issue Dt:	02/24/2009	Application #:	10930167	Filing Dt:	08/31/2004
Publication #:	US20060046522	Pub Dt:	03/02/2006
Title:	METHODS FOR FORMING A LANTHANUM-METAL OXIDE DIELECTRIC LAYER

Patent #:	7208804	Issue Dt:	04/24/2007	Application #:	10930184	Filing Dt:	08/31/2004
Publication #:	US20050032292	Pub Dt:	02/10/2005
Title:	CRYSTALLINE OR AMORPHOUS MEDIUM-K GATE OXIDES, Y2O3 AND GD2O3

Patent #:	7087534	Issue Dt:	08/08/2006	Application #:	10930211	Filing Dt:	08/31/2004
Publication #:	US20050023684	Pub Dt:	02/03/2005
Title:	SEMICONDUCTOR SUBSTRATE CLEANING

Patent #:	7045880	Issue Dt:	05/16/2006	Application #:	10930213	Filing Dt:	08/31/2004
Publication #:	US20050026369	Pub Dt:	02/03/2005
Title:	METHOD AND APPARATUS ON (110) SURFACES OF SILICON STRUCTURES WITH CONDUCTION IN THE <110> DIRECTION

Patent #:	7270056	Issue Dt:	09/18/2007	Application #:	10930251	Filing Dt:	08/31/2004
Publication #:	US20060042482	Pub Dt:	03/02/2006
Title:	PRINT STRIPPER FOR ESD CONTROL

Patent #:	7300821	Issue Dt:	11/27/2007	Application #:	10930252	Filing Dt:	08/31/2004
Publication #:	US20060046322	Pub Dt:	03/02/2006
Title:	INTEGRATED CIRCUIT COOLING AND INSULATING DEVICE AND METHOD

Patent #:	7047265	Issue Dt:	05/16/2006	Application #:	10930288	Filing Dt:	08/30/2004
Publication #:	US20050024386	Pub Dt:	02/03/2005
Title:	SYSTEM AND METHOD FOR A SINGLE-PASS MULTIPLE TAP FILTER

Patent #:	6891750	Issue Dt:	05/10/2005	Application #:	10930422	Filing Dt:	08/30/2004
Publication #:	US20050024934	Pub Dt:	02/03/2005
Title:	STRUCTURE AND METHOD FOR TRANSVERSE FIELD ENHANCEMENT

Patent #:	7554161	Issue Dt:	06/30/2009	Application #:	10930431	Filing Dt:	08/31/2004
Publication #:	US20050023624	Pub Dt:	02/03/2005
Title:	HfAlO3 FILMS FOR GATE DIELECTRICS

Patent #:	7184312	Issue Dt:	02/27/2007	Application #:	10930440	Filing Dt:	08/31/2004
Publication #:	US20050026353	Pub Dt:	02/03/2005
Title:	ONE TRANSISTOR SOI NON-VOLATILE RANDOM ACCESS MEMORY CELL

Patent #:	7067924	Issue Dt:	06/27/2006	Application #:	10930442	Filing Dt:	08/31/2004
Publication #:	US20050023685	Pub Dt:	02/03/2005
Title:	NICKEL BONDING CAP OVER COPPER METALIZED BONDPADS

Patent #:	7055012	Issue Dt:	05/30/2006	Application #:	10930444	Filing Dt:	08/31/2004
Publication #:	US20050027959	Pub Dt:	02/03/2005
Title:	LATENCY REDUCTION USING NEGATIVE CLOCK EDGE AND READ FLAGS

Patent #:	7256115	Issue Dt:	08/14/2007	Application #:	10930510	Filing Dt:	08/31/2004
Publication #:	US20050032387	Pub Dt:	02/10/2005
Title:	ASYMMETRIC PLATING

Patent #:	7091067	Issue Dt:	08/15/2006	Application #:	10930511	Filing Dt:	08/31/2004
Publication #:	US20050026336	Pub Dt:	02/03/2005
Title:	CURRENT LIMITING ANTIFUSE PROGRAMMING PATH

Patent #:	7384840	Issue Dt:	06/10/2008	Application #:	10930512	Filing Dt:	08/31/2004
Publication #:	US20050026387	Pub Dt:	02/03/2005
Title:	BULK-ISOLATED PN DIODE AND METHOD OF FORMING A BULK-ISOLATED PN DIODE

Patent #:	6937530	Issue Dt:	08/30/2005	Application #:	10930513	Filing Dt:	08/31/2004
Publication #:	US20050052910	Pub Dt:	03/10/2005
Title:	DELAY LOCKED LOOP "ACTIVE COMMAND" REACTOR

Patent #:	7112494	Issue Dt:	09/26/2006	Application #:	10930514	Filing Dt:	08/31/2004
Publication #:	US20050026375	Pub Dt:	02/03/2005
Title:	WRITE ONCE READ ONLY MEMORY EMPLOYING CHARGE TRAPPING IN INSULATORS

Patent #:	7466618	Issue Dt:	12/16/2008	Application #:	10930517	Filing Dt:	08/31/2004
Publication #:	US20050024973	Pub Dt:	02/03/2005
Title:	CURRENT LIMITING ANTIFUSE PROGRAMMING PATH

Patent #:	7410748	Issue Dt:	08/12/2008	Application #:	10930518	Filing Dt:	08/31/2004
Publication #:	US20050026087	Pub Dt:	02/03/2005
Title:	METHOD OF ETCHING MATERIALS PATTERNED WITH A SINGLE LAYER 193NM RESIST

Patent #:	7173855	Issue Dt:	02/06/2007	Application #:	10930526	Filing Dt:	08/31/2004
Publication #:	US20050041508	Pub Dt:	02/24/2005
Title:	CURRENT LIMITING ANTIFUSE PROGRAMMING PATH

Patent #:	7577212	Issue Dt:	08/18/2009	Application #:	10930543	Filing Dt:	08/30/2004
Publication #:	US20060045206	Pub Dt:	03/02/2006
Title:	METHOD AND SYSTEM FOR GENERATING REFERENCE VOLTAGES FOR SIGNAL RECEIVERS

Patent #:	7375414	Issue Dt:	05/20/2008	Application #:	10930657	Filing Dt:	08/31/2004
Publication #:	US20050030803	Pub Dt:	02/10/2005
Title:	HIGH PERMEABILITY LAYERED FILMS TO REDUCE NOISE IN HIGH SPEED INTERCONNECTS

Patent #:	7388248	Issue Dt:	06/17/2008	Application #:	10930774	Filing Dt:	09/01/2004
Publication #:	US20060043448	Pub Dt:	03/02/2006
Title:	DIELECTRIC RELAXATION MEMORY

Patent #:	7491570	Issue Dt:	02/17/2009	Application #:	10930789	Filing Dt:	09/01/2004
Publication #:	US20050156266	Pub Dt:	07/21/2005
Title:	DIE PACKAGE HAVING AN ADHESIVE FLOW RESTRICTION AREA

Patent #:	7323400	Issue Dt:	01/29/2008	Application #:	10930895	Filing Dt:	08/30/2004
Publication #:	US20060046477	Pub Dt:	03/02/2006
Title:	PLASMA PROCESSING, DEPOSITION, AND ALD METHODS

Patent #:	7145372	Issue Dt:	12/05/2006	Application #:	10930976	Filing Dt:	08/31/2004
Publication #:	US20060044053	Pub Dt:	03/02/2006
Title:	STARTUP CIRCUIT AND METHOD

Patent #:	7151688	Issue Dt:	12/19/2006	Application #:	10931129	Filing Dt:	09/01/2004
Publication #:	US20060044906	Pub Dt:	03/02/2006
Title:	IMPROVED SENSING OF RESISTANCE VARIABLE MEMORY DEVICES

Patent #:	7190043	Issue Dt:	03/13/2007	Application #:	10931140	Filing Dt:	08/31/2004
Publication #:	US20050029609	Pub Dt:	02/10/2005
Title:	TECHNIQUES TO CREATE LOW K ILD FOR BEOL

Patent #:	7157387	Issue Dt:	01/02/2007	Application #:	10931182	Filing Dt:	08/31/2004
Publication #:	US20050026388	Pub Dt:	02/03/2005
Title:	TECHNIQUES TO CREATE LOW K ILD FOR BEOL

Patent #:	7392331	Issue Dt:	06/24/2008	Application #:	10931326	Filing Dt:	08/31/2004
Publication #:	US20060047891	Pub Dt:	03/02/2006
Title:	SYSTEM AND METHOD FOR TRANSMITTING DATA PACKETS IN A COMPUTER SYSTEM HAVING A MEMORY HUB ARCHITECTURE

Patent #:	7129553	Issue Dt:	10/31/2006	Application #:	10931340	Filing Dt:	08/31/2004
Publication #:	US20050023626	Pub Dt:	02/03/2005
Title:	LANTHANIDE OXIDE / HAFNIUM OXIDE DIELECTRICS

Patent #:	7312494	Issue Dt:	12/25/2007	Application #:	10931343	Filing Dt:	08/31/2004
Publication #:	US20050029547	Pub Dt:	02/10/2005
Title:	LANTHANIDE OXIDE / HAFNIUM OXIDE DIELECTRIC LAYERS

Patent #:	6965537	Issue Dt:	11/15/2005	Application #:	10931353	Filing Dt:	08/31/2004
Title:	MEMORY SYSTEM AND METHOD USING ECC TO ACHIEVE LOW POWER REFRESH

Patent #:	7088156	Issue Dt:	08/08/2006	Application #:	10931354	Filing Dt:	08/31/2004
Publication #:	US20060044931	Pub Dt:	03/02/2006
Title:	DELAY-LOCKED LOOP HAVING A PRE-SHIFT PHASE DETECTOR

Patent #:	7259434	Issue Dt:	08/21/2007	Application #:	10931356	Filing Dt:	08/31/2004
Publication #:	US20050029605	Pub Dt:	02/10/2005
Title:	HIGHLY RELIABLE AMORPHOUS HIGH-K GATE OXIDE ZRO2

Patent #:	7375026	Issue Dt:	05/20/2008	Application #:	10931357	Filing Dt:	08/31/2004
Publication #:	US20050074966	Pub Dt:	04/07/2005
Title:	LOCAL MULTILAYERED METALLIZATION

Patent #:	6980033	Issue Dt:	12/27/2005	Application #:	10931360	Filing Dt:	08/31/2004
Publication #:	US20050024092	Pub Dt:	02/03/2005
Title:	PSEUDO CMOS DYNAMIC LOGIC WITH DELAYED CLOCKS

Patent #:	7370306	Issue Dt:	05/06/2008	Application #:	10931361	Filing Dt:	08/31/2004
Publication #:	US20050034092	Pub Dt:	02/10/2005
Title:	METHOD AND APPARATUS FOR DESIGNING A PATTERN ON A SEMICONDUCTOR SURFACE

Patent #:	7233201	Issue Dt:	06/19/2007	Application #:	10931362	Filing Dt:	08/31/2004
Publication #:	US20060044069	Pub Dt:	03/02/2006
Title:	SINGLE-ENDED PSEUDO-DIFFERENTIAL OUTPUT DRIVER

Patent #:	7183134	Issue Dt:	02/27/2007	Application #:	10931363	Filing Dt:	08/31/2004
Publication #:	US20050026386	Pub Dt:	02/03/2005
Title:	ULTRATHIN LEADFRAME BGA CIRCUIT PACKAGE

Patent #:	7026694	Issue Dt:	04/11/2006	Application #:	10931364	Filing Dt:	08/31/2004
Publication #:	US20050023627	Pub Dt:	02/03/2005
Title:	LANTHANIDE DOPED TIOX DIELECTRIC FILMS BY PLASMA OXIDATION

Patent #:	7440317	Issue Dt:	10/21/2008	Application #:	10931367	Filing Dt:	08/31/2004
Publication #:	US20050026354	Pub Dt:	02/03/2005
Title:	ONE TRANSISTOR SOI NON-VOLATILE RANDOM ACCESS MEMORY CELL

Patent #:	6914287	Issue Dt:	07/05/2005	Application #:	10931368	Filing Dt:	08/31/2004
Publication #:	US20050029599	Pub Dt:	02/10/2005
Title:	SEMICONDUCTOR PROCESSING METHODS OF FORMING TRANSISTORS, SEMICONDUCTOR PROCESSING METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY CIRCUITRY, AND RELATED INTEGRATED CIRCUITRY

Patent #:	7095097	Issue Dt:	08/22/2006	Application #:	10931369	Filing Dt:	08/31/2004
Publication #:	US20050023653	Pub Dt:	02/03/2005
Title:	INTEGRATED CIRCUIT DEVICE HAVING REDUCED BOW AND METHOD FOR MAKING SAME

Patent #:	7791612	Issue Dt:	09/07/2010	Application #:	10931375	Filing Dt:	08/31/2004
Publication #:	US20050024370	Pub Dt:	02/03/2005
Title:	FULLY ASSOCIATIVE TEXTURE CACHE HAVING CONTENT ADDRESSABLE MEMORY AND METHOD FOR USE THEREOF

Patent #:	7214613	Issue Dt:	05/08/2007	Application #:	10931377	Filing Dt:	08/31/2004
Publication #:	US20050032316	Pub Dt:	02/10/2005
Title:	CROSS DIFFUSION BARRIER LAYER IN POLYSILICON

Patent #:	7115493	Issue Dt:	10/03/2006	Application #:	10931378	Filing Dt:	08/31/2004
Publication #:	US20050032279	Pub Dt:	02/10/2005
Title:	ANTIFUSE STRUCTURES, METHODS, AND APPLICATIONS

Patent #:	7176719	Issue Dt:	02/13/2007	Application #:	10931379	Filing Dt:	08/31/2004
Publication #:	US20060044012	Pub Dt:	03/02/2006
Title:	CAPACITIVELY-COUPLED LEVEL RESTORE CIRCUITS FOR LOW VOLTAGE SWING LOGIC CIRCUITS

Patent #:	7084680	Issue Dt:	08/01/2006	Application #:	10931397	Filing Dt:	08/31/2004
Publication #:	US20060044026	Pub Dt:	03/02/2006
Title:	METHOD AND APPARATUS FOR TIMING DOMAIN CROSSING

Patent #:	7126874	Issue Dt:	10/24/2006	Application #:	10931472	Filing Dt:	08/31/2004
Publication #:	US20060044891	Pub Dt:	03/02/2006
Title:	MEMORY SYSTEM AND METHOD FOR STROBING DATA, COMMAND AND ADDRESS SIGNALS

Patent #:	6977419	Issue Dt:	12/20/2005	Application #:	10931507	Filing Dt:	09/01/2004
Publication #:	US20050035408	Pub Dt:	02/17/2005
Title:	MOSFETS INCLUDING A DIELECTRIC PLUG TO SUPPRESS SHORT-CHANNEL EFFECTS

Patent #:	7335965	Issue Dt:	02/26/2008	Application #:	10931510	Filing Dt:	09/01/2004
Publication #:	US20050026351	Pub Dt:	02/03/2005
Title:	PACKAGING OF ELECTRONIC CHIPS WITH AIR-BRIDGE STRUCTURES

Patent #:	7157324	Issue Dt:	01/02/2007	Application #:	10931513	Filing Dt:	09/01/2004
Publication #:	US20050032290	Pub Dt:	02/10/2005
Title:	TRANSISTOR STRUCTURE HAVING REDUCED TRANSISTOR LEAKAGE ATTRIBUTES

Patent #:	7235459	Issue Dt:	06/26/2007	Application #:	10931524	Filing Dt:	08/31/2004
Publication #:	US20060046425	Pub Dt:	03/02/2006
Title:	METHODS OF FORMING TRENCH ISOLATION IN THE FABRICATION OF INTEGRATED CIRCUITRY, METHODS OF FABRICATING MEMORY CIRCUITRY, INTEGRATED CIRCUITRY AND MEMORY INTEGRATED CIRCUITRY

Patent #:	7588988	Issue Dt:	09/15/2009	Application #:	10931533	Filing Dt:	08/31/2004
Publication #:	US20060043504	Pub Dt:	03/02/2006
Title:	METHOD OF FORMING APPARATUS HAVING OXIDE FILMS FORMED USING ATOMIC LAYER DEPOSITION

Patent #:	6952032	Issue Dt:	10/04/2005	Application #:	10931540	Filing Dt:	08/31/2004
Publication #:	US20050023595	Pub Dt:	02/03/2005
Title:	PROGRAMMABLE ARRAY LOGIC OR MEMORY DEVICES WITH ASYMMETRICAL TUNNEL BARRIERS

Patent #:	7253521	Issue Dt:	08/07/2007	Application #:	10931541	Filing Dt:	08/31/2004
Publication #:	US20050023697	Pub Dt:	02/03/2005
Title:	METHODS FOR MAKING INTEGRATED-CIRCUIT WIRING FROM COPPER, SILVER, GOLD, AND OTHER METALS

Patent #:	7465982	Issue Dt:	12/16/2008	Application #:	10931544	Filing Dt:	08/31/2004
Publication #:	US20050037563	Pub Dt:	02/17/2005
Title:	CAPACITOR STRUCTURES

Patent #:	7241658	Issue Dt:	07/10/2007	Application #:	10931545	Filing Dt:	08/31/2004
Publication #:	US20050032313	Pub Dt:	02/10/2005
Title:	VERTICAL GAIN CELL

Patent #:	7221605	Issue Dt:	05/22/2007	Application #:	10931552	Filing Dt:	08/31/2004
Publication #:	US20060044903	Pub Dt:	03/02/2006
Title:	SWITCHED CAPACITOR DRAM SENSE AMPLIFIER WITH IMMUNITY TO MISMATCH AND OFFSETS

Patent #:	7271445	Issue Dt:	09/18/2007	Application #:	10931553	Filing Dt:	08/31/2004
Publication #:	US20050023612	Pub Dt:	02/03/2005
Title:	ULTRA-THIN SEMICONDUCTORS BONDED ON GLASS SUBSTRATES

Patent #:	7151041	Issue Dt:	12/19/2006	Application #:	10931567	Filing Dt:	08/31/2004
Publication #:	US20050026339	Pub Dt:	02/03/2005
Title:	METHODS OF FORMING SEMICONDUCTOR CIRCUITRY,

Patent #:	6927431	Issue Dt:	08/09/2005	Application #:	10931569	Filing Dt:	08/31/2004
Publication #:	US20050042821	Pub Dt:	02/24/2005
Title:	SEMICONDUCTOR CIRCUIT CONSTRUCTIONS

Patent #:	7298638	Issue Dt:	11/20/2007	Application #:	10931573	Filing Dt:	08/31/2004
Publication #:	US20050024936	Pub Dt:	02/03/2005
Title:	OPERATING AN ELECTRONIC DEVICE HAVING A VERTICAL GAIN CELL THAT INCLUDES VERTICAL MOS TRANSISTORS

Patent #:	6964896	Issue Dt:	11/15/2005	Application #:	10931579	Filing Dt:	08/31/2004
Publication #:	US20050026347	Pub Dt:	02/03/2005
Title:	METHODS OF FORMING SEMICONDUCTOR LOGIC CIRCUITRY, AND SEMICONDUCTOR LOGIC CIRCUIT CONSTRUCTIONS

Patent #:	7087490	Issue Dt:	08/08/2006	Application #:	10931581	Filing Dt:	08/31/2004
Publication #:	US20050026370	Pub Dt:	02/03/2005
Title:	METHOD AND COMPOSITE FOR DECREASING CHARGE LEAKAGE

Patent #:	7200053	Issue Dt:	04/03/2007	Application #:	10931587	Filing Dt:	09/01/2004
Publication #:	US20060044888	Pub Dt:	03/02/2006
Title:	LEVEL SHIFTER FOR LOW VOLTAGE OPERATION

Patent #:	7132371	Issue Dt:	11/07/2006	Application #:	10931591	Filing Dt:	08/31/2004
Publication #:	US20050032314	Pub Dt:	02/10/2005
Title:	DOPANT BARRIER FOR DOPED GLASS IN MEMORY DEVICES

Patent #:	7550824	Issue Dt:	06/23/2009	Application #:	10931593	Filing Dt:	08/31/2004
Publication #:	US20050029501	Pub Dt:	02/10/2005
Title:	LOW K INTERCONNECT DIELECTRIC USING SURFACE TRANSFORMATION

Patent #:	6979880	Issue Dt:	12/27/2005	Application #:	10931601	Filing Dt:	08/31/2004
Publication #:	US20050023638	Pub Dt:	02/03/2005
Title:	SCALABLE HIGH PERFORMANCE ANTIFUSE STRUCTURE AND PROCESS

Patent #:	7067426	Issue Dt:	06/27/2006	Application #:	10931607	Filing Dt:	08/31/2004
Publication #:	US20050026438	Pub Dt:	02/03/2005
Title:	SEMICONDUCTOR PROCESSING METHODS

Patent #:	7268012	Issue Dt:	09/11/2007	Application #:	10931678	Filing Dt:	08/31/2004
Publication #:	US20060046350	Pub Dt:	03/02/2006
Title:	METHODS FOR FABRICATION OF THIN SEMICONDUCTOR ASSEMBLIES INCLUDING REDISTRIBUTION LAYERS AND PACKAGES AND ASSEMBLIES FORMED THEREBY

Patent #:	7215571	Issue Dt:	05/08/2007	Application #:	10931689	Filing Dt:	09/01/2004
Publication #:	US20050041468	Pub Dt:	02/24/2005
Title:	METHOD FOR REDUCING DRAIN DISTURB IN PROGRAMMING

Patent #:	7545674	Issue Dt:	06/09/2009	Application #:	10931704	Filing Dt:	09/01/2004
Publication #:	US20050026349	Pub Dt:	02/03/2005
Title:	FLASH MEMORY WITH LOW TUNNEL BARRIER INTERPOLY INSULATORS

Patent #:	7187587	Issue Dt:	03/06/2007	Application #:	10931711	Filing Dt:	09/01/2004
Publication #:	US20050024945	Pub Dt:	02/03/2005
Title:	PROGRAMMABLE MEMORY ADDRESS AND DECODE CIRCUITS WITH LOW TUNNEL BARRIER INTERPOLY INSULATORS

Patent #:	6980478	Issue Dt:	12/27/2005	Application #:	10931735	Filing Dt:	09/01/2004
Title:	ZERO-ENABLED FUSE-SET

Patent #:	7084429	Issue Dt:	08/01/2006	Application #:	10931749	Filing Dt:	08/31/2004
Publication #:	US20050023529	Pub Dt:	02/03/2005
Title:	STRAINED SEMICONDUCTOR BY WAFER BONDING WITH MISORIENTATION

Patent #:	7271106	Issue Dt:	09/18/2007	Application #:	10931772	Filing Dt:	08/31/2004
Publication #:	US20060046483	Pub Dt:	03/02/2006
Title:	CRITICAL DIMENSION CONTROL FOR INTEGRATED CIRCUITS

Patent #:	7511364	Issue Dt:	03/31/2009	Application #:	10931775	Filing Dt:	08/31/2004
Publication #:	US20060043542	Pub Dt:	03/02/2006
Title:	FLOATING LEAD FINGER ON A LEAD FRAME, A LEAD FRAME STRIP, AND A LEAD FRAME ASSEMBLY INCLUDING SAME

Patent #:	7236415	Issue Dt:	06/26/2007	Application #:	10931786	Filing Dt:	09/01/2004
Publication #:	US20060044907	Pub Dt:	03/02/2006
Title:	SAMPLE AND HOLD MEMORY SENSE AMPLIFIER

Patent #:	7180370	Issue Dt:	02/20/2007	Application #:	10931796	Filing Dt:	09/01/2004
Publication #:	US20060044066	Pub Dt:	03/02/2006
Title:	CMOS AMPLIFIERS WITH FREQUENCY COMPENSATING CAPACITORS

Patent #:	7098128	Issue Dt:	08/29/2006	Application #:	10931822	Filing Dt:	09/01/2004
Publication #:	US20060046453	Pub Dt:	03/02/2006
Title:	METHOD FOR FILLING ELECTRICALLY DIFFERENT FEATURES

Patent #:	7084695	Issue Dt:	08/01/2006	Application #:	10931831	Filing Dt:	08/31/2004
Publication #:	US20060044047	Pub Dt:	03/02/2006
Title:	METHOD AND APPARATUS FOR LOW VOLTAGE TEMPERATURE SENSING

Patent #:	7247920	Issue Dt:	07/24/2007	Application #:	10931840	Filing Dt:	09/01/2004
Publication #:	US20050026348	Pub Dt:	02/03/2005
Title:	METHOD OF COMPOSITE GATE FORMATION

Patent #:	7119592	Issue Dt:	10/10/2006	Application #:	10931843	Filing Dt:	08/31/2004
Publication #:	US20050041486	Pub Dt:	02/24/2005
Title:	DELAY LOCKED LOOP CIRCUIT WITH TIME DELAY QUANTIFIER AND CONTROL

Patent #:	7235872	Issue Dt:	06/26/2007	Application #:	10931844	Filing Dt:	08/31/2004
Publication #:	US20050029552	Pub Dt:	02/10/2005
Title:	BOW CONTROL IN AN ELECTRONIC PACKAGE

100

Patent #:	7244663	Issue Dt:	07/17/2007	Application #:	10931847	Filing Dt:	08/31/2004
Publication #:	US20060046438	Pub Dt:	03/02/2006
Title:	WAFER REINFORCEMENT STRUCTURE AND METHODS OF FABRICATION

Assignor

MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT

Exec Dt:

07/31/2019

Assignee

MICRON TECHNOLOGY, INC.

8000 S FEDERAL WAY

BOISE, IDAHO 83707

Correspondence name and address
	WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
	ONE MARKET, SPEAR TOWER, SUITE 3300
	SAN FRANCISCO, CA 94105

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