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10/26/2006
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Title:
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07/22/2008
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11114130
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04/26/2005
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11/02/2006
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Title:
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METHOD OF PRODUCING BALANCED DATA OUTPUT
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08/07/2007
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11114403
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04/26/2005
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Pub Dt:
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10/26/2006
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Title:
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FLASH MEMORY DEVICE HAVING A GRADED COMPOSITION, HIGH DIELECTRIC CONSTANT GATE INSULATOR
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12/02/2008
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11114589
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04/26/2005
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Publication #:
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Pub Dt:
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10/26/2006
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Title:
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ABSORBING BOUNDARY FOR A MULTI-LAYER CIRCUIT BOARD STRUCTURE
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04/15/2008
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11115833
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04/25/2005
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Pub Dt:
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09/22/2005
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Title:
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SEMICONDUCTOR STRUCTURES
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09/25/2007
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11115854
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04/25/2005
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Pub Dt:
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09/08/2005
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Title:
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METHODS OF FILLING GAPS USING HIGH DENSITY PLASMA CHEMICAL VAPOR DEPOSITION
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03/25/2008
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11116181
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04/28/2005
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Pub Dt:
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09/01/2005
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Title:
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LOW CAPACITANCE WIRING LAYOUT
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07/15/2008
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11116597
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04/28/2005
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Pub Dt:
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11/02/2006
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Title:
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MEMORY BLOCK REALLOCATION IN A FLASH MEMORY DEVICE
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10/09/2007
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11116630
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04/26/2005
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11/09/2006
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Title:
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SYSTEM AND METHOD FOR CAPTURING DATA SIGNALS USING A DATA STROBE SIGNAL
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02/03/2009
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11116842
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04/28/2005
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Pub Dt:
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11/02/2006
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Title:
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METHOD OF COMPARISON BETWEEN CACHE AND DATA REGISTER FOR NON-VOLATILE MEMORY
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06/24/2008
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11117121
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04/28/2005
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Pub Dt:
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11/02/2006
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Title:
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ATOMIC LAYER DEPOSITED ZIRCONIUM SILICON OXIDE FILMS
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02/16/2010
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11117125
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04/28/2005
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Pub Dt:
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11/02/2006
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Title:
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ATOMIC LAYER DESPOSITION OF A RUTHENIUM LAYER TO A LANTHANIDE OXIDE DIELECTRIC LAYER
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05/06/2008
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11118959
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04/29/2005
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Title:
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SECURE PORTABLE STORAGE DEVICE
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12/18/2007
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11119127
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04/29/2005
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09/01/2005
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Title:
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CONSTRUCTIONS COMPRISING PEROVSKITE-TYPE DIELECTRIC
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09/11/2007
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11119128
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04/29/2005
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Pub Dt:
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09/15/2005
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Title:
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MEMORY CELL WITH TRENCH-ISOLATED TRANSISTOR INCLUDING FIRST AND SECOND ISOLATION TRENCHES
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01/24/2012
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11119321
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04/29/2005
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Pub Dt:
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12/28/2006
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Title:
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CONFIGURATION FINALIZATION ON FIRST VALID NAND COMMAND
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09/18/2007
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11119370
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04/29/2005
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12/01/2005
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Title:
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BORON INCORPORATED DIFFUSION BARRIER MATERIAL
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01/20/2009
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11119589
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05/02/2005
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09/01/2005
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Title:
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ERASE BLOCK DATA SPLITTING
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08/07/2007
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11120766
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05/03/2005
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11/10/2005
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Title:
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CIRCUIT FOR SELECTING/DESELECTING A BITLINE OF A NON-VOLATILE MEMORY
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04/29/2008
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11121114
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05/04/2005
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11/09/2006
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Title:
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METHOD AND APPARATUS FOR SENSING FLASH MEMORY USING DELTA SIGMA MODULATION
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12/14/2010
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11121119
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05/04/2005
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Pub Dt:
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11/09/2006
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Title:
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METHOD AND APPARATUS FOR DARK CURRENT AND BLOOMING SUPPRESSION IN 4T CMOS IMAGER PIXEL
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06/10/2008
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11121172
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05/04/2005
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Pub Dt:
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11/24/2005
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Title:
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METHOD AND APPARATUS FOR CONNECTING A MASSIVELY PARALLEL PROCESSOR ARRAY TO A MEMORY ARRAY IN A BIT SERIAL MANNER
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06/24/2008
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11121276
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05/03/2005
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09/15/2005
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Title:
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METHOD OF FORMING COMPLIANT CONTACT STRUCTURES
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02/13/2007
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11121615
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05/04/2005
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11/10/2005
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Title:
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METHOD AND CIRCUIT FOR VERIFYING AND EVENTUALLY SUBSTITUTING DEFECTIVE REFERENCE CELLS OF A MEMORY
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07/13/2010
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11121868
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05/03/2005
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11/23/2006
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Title:
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SYSTEM AND METHOD FOR DECODING COMMANDS BASED ON COMMAND SIGNALS AND OPERATING STATE
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09/11/2007
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11122362
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05/05/2005
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11/09/2006
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Title:
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METHOD OF FORMING A PSEUDO SOI SUBSTRATE AND SEMICONDUCTOR DEVICES
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07/22/2008
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11122409
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05/05/2005
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11/09/2006
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Title:
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INTERMEDIATE SEMICONDUCTOR DEVICE STRUCTURES
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08/29/2006
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11122490
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05/04/2005
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09/01/2005
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STATIC CONTENT ADDRESSABLE MEMORY CELL
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06/12/2007
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11122764
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05/05/2005
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11/17/2005
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Title:
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VERTICAL NROM HAVING A STORAGE DENSITY OF 1 BIT PER 1F2
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05/13/2008
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11122854
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05/05/2005
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11/09/2006
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MEMORY CELL, DEVICE, AND SYSTEM
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09/25/2007
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11122929
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05/04/2005
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09/22/2005
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METHOD OF FORMING A DOUBLE-SIDED CAPACITOR
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11/14/2006
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11123184
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05/06/2005
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09/08/2005
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WRITE STATE MACHINE ARCHITECTURE FOR FLASH MEMORY INTERNAL INSTRUCTIONS
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07/11/2006
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11123297
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05/06/2005
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10/06/2005
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INTERPOSER INCLUDING ADHESIVE TAPE
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04/24/2007
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11123466
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05/06/2005
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09/15/2005
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SEMICONDUCTOR COMPONENT ASSEMBLIES HAVING INTERCONNECTS
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02/13/2007
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11123916
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05/06/2005
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09/01/2005
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MAGNETIC TUNNELING JUNCTION ANTIFUSE DEVICE
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05/09/2006
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11124068
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05/06/2005
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09/22/2005
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INTERMEDIATE SEMICONDUCTOR DEVICE HAVING ACTIVATED OXIDE-BASED LAYER FOR ELECTROLESS PLATING
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04/08/2008
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11124743
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05/09/2005
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11/09/2006
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APPARATUS AND METHOD FOR CONTROLLING A DELAY- OR PHASE-LOCKED LOOP AS A FUNCTION OF LOOP FREQUENCY
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11/25/2008
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11124744
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05/09/2005
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11/09/2006
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ADJUSTABLE BYTE LANE OFFSET FOR MEMORY MODULE TO REDUCE SKEW
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07/11/2006
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11124784
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05/09/2005
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09/22/2005
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APPARATUS FOR LATENCY SPECIFIC DUTY CYCLE CORRECTION
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05/06/2008
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11125096
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05/10/2005
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10/19/2006
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GENERATION AND STORAGE OF COLUMN OFFSETS FOR A COLUMN PARALLEL IMAGE SENSOR
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01/18/2011
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11125097
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05/10/2005
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11/16/2006
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ECLIPSE ELIMINATION BY MONITORING THE PIXEL SIGNAL LEVEL
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07/29/2008
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11126455
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05/10/2005
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09/22/2005
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Title:
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SEMICONDUCTOR CONSTRUCTIONS AND TRANSISTOR GATES
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