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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:051028/0001   Pages: 834
Recorded: 11/12/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
07/01/2014
Application #:
13039169
Filing Dt:
03/02/2011
Publication #:
Pub Dt:
06/30/2011
Title:
BIAS SENSING IN DRAM SENSE AMPLIFIERS THROUGH VOLTAGE-COUPLING/DECOUPLING DEVICE
2
Patent #:
Issue Dt:
06/04/2013
Application #:
13039523
Filing Dt:
03/03/2011
Publication #:
Pub Dt:
08/02/2012
Title:
VERTICAL TRANSISTOR FOR RANDOM-ACCESS MEMORY AND MANUFACTURING METHOD THEREOF
3
Patent #:
Issue Dt:
02/21/2012
Application #:
13039600
Filing Dt:
03/03/2011
Publication #:
Pub Dt:
06/23/2011
Title:
METHODS OF FORMING MEMORY CELLS
4
Patent #:
Issue Dt:
02/05/2013
Application #:
13039778
Filing Dt:
03/03/2011
Publication #:
Pub Dt:
09/06/2012
Title:
METHODS FOR PROGRAMMING A MEMORY DEVICE AND MEMORY DEVICES
5
Patent #:
Issue Dt:
12/27/2011
Application #:
13039802
Filing Dt:
03/03/2011
Publication #:
Pub Dt:
06/23/2011
Title:
NON-VOLATILE MEMORY DEVICE HAVING ASSIGNABLE NETWORK IDENTIFICATION
6
Patent #:
Issue Dt:
09/18/2012
Application #:
13039998
Filing Dt:
03/03/2011
Publication #:
Pub Dt:
06/23/2011
Title:
CIRCUITRY AND METHODS FOR IMPROVING DIFFERENTIAL SIGNALS THAT CROSS POWER DOMAINS
7
Patent #:
Issue Dt:
05/28/2013
Application #:
13040200
Filing Dt:
03/03/2011
Publication #:
Pub Dt:
09/06/2012
Title:
READING MEMORY CELL HISTORY DURING PROGRAM OPERATION FOR ADAPTIVE PROGRAMMING
8
Patent #:
NONE
Issue Dt:
Application #:
13040523
Filing Dt:
03/04/2011
Publication #:
Pub Dt:
09/06/2012
Title:
METAL/OXIDE ONE TIME PROGAMMABLE MEMORY
9
Patent #:
Issue Dt:
07/10/2012
Application #:
13040648
Filing Dt:
03/04/2011
Publication #:
Pub Dt:
06/23/2011
Title:
METHOD AND APPARATUS PROVIDING NOISE REDUCTION WHILE PRESERVING EDGES FOR IMAGERS
10
Patent #:
Issue Dt:
02/14/2012
Application #:
13040855
Filing Dt:
03/04/2011
Publication #:
Pub Dt:
06/30/2011
Title:
METHOD OF ERASING MEMORY CELL
11
Patent #:
Issue Dt:
05/07/2013
Application #:
13041118
Filing Dt:
03/04/2011
Publication #:
Pub Dt:
06/30/2011
Title:
HIGH SPEED, WIDE FREQUENCY-RANGE, DIGITAL PHASE MIXER AND METHODS OF OPERATION
12
Patent #:
Issue Dt:
08/12/2014
Application #:
13041288
Filing Dt:
03/04/2011
Publication #:
Pub Dt:
09/06/2012
Title:
APPARATUS, ELECTRONIC DEVICES AND METHODS ASSOCIATED WITH AN OPERATIVE TRANSITION FROM A FIRST INTERFACE TO A SECOND INTERFACE
13
Patent #:
Issue Dt:
05/21/2013
Application #:
13041379
Filing Dt:
03/05/2011
Publication #:
Pub Dt:
06/23/2011
Title:
SECURE CONTROLLER FOR BLOCK ORIENTED STORAGE
14
Patent #:
Issue Dt:
05/20/2014
Application #:
13041402
Filing Dt:
03/06/2011
Publication #:
Pub Dt:
09/06/2012
Title:
LOGICAL ADDRESS TRANSLATION
15
Patent #:
Issue Dt:
12/04/2018
Application #:
13041541
Filing Dt:
03/07/2011
Publication #:
Pub Dt:
06/30/2011
Title:
EXECUTING APPLICATIONS FROM A SEMICONDUCTOR NONVOLATILE MEMORY
16
Patent #:
Issue Dt:
04/02/2013
Application #:
13041795
Filing Dt:
03/07/2011
Publication #:
Pub Dt:
08/25/2011
Title:
SHIELDING BLACK REFERENCE PIXELS IN IMAGE SENSORS
17
Patent #:
Issue Dt:
03/17/2015
Application #:
13042124
Filing Dt:
03/07/2011
Publication #:
Pub Dt:
06/30/2011
Title:
LENS MASTER DEVICES, LENS STRUCTURES, IMAGING DEVICES, AND METHODS AND APPARATUSES OF MAKING THE SAME
18
Patent #:
Issue Dt:
07/17/2012
Application #:
13042151
Filing Dt:
03/07/2011
Publication #:
Pub Dt:
06/30/2011
Title:
DATA STORAGE SYSTEM, ELECTRONIC SYSTEM, AND TELECOMMUNICATIONS SYSTEM
19
Patent #:
Issue Dt:
11/18/2014
Application #:
13042164
Filing Dt:
03/07/2011
Publication #:
Pub Dt:
09/13/2012
Title:
METHODS OF ACCESSING MEMORY CELLS, METHODS OF DISTRIBUTING MEMORY REQUESTS, SYSTEMS, AND MEMORY CONTROLLERS
20
Patent #:
Issue Dt:
11/27/2012
Application #:
13042204
Filing Dt:
03/07/2011
Publication #:
Pub Dt:
06/30/2011
Title:
MEMORY DEVICE HAVING DATA PATHS
21
Patent #:
Issue Dt:
10/15/2013
Application #:
13043005
Filing Dt:
03/08/2011
Publication #:
Pub Dt:
09/13/2012
Title:
SENSE OPERATION IN A STACKED MEMORY ARRAY DEVICE
22
Patent #:
Issue Dt:
09/18/2012
Application #:
13043037
Filing Dt:
03/08/2011
Publication #:
Pub Dt:
08/25/2011
Title:
SEMICONDUCTOR DEVICE ASSEMBLIES
23
Patent #:
Issue Dt:
03/12/2013
Application #:
13043071
Filing Dt:
03/08/2011
Publication #:
Pub Dt:
09/13/2012
Title:
Memory Cell Constructions
24
Patent #:
Issue Dt:
08/27/2013
Application #:
13043295
Filing Dt:
03/08/2011
Publication #:
Pub Dt:
09/13/2012
Title:
THYRISTORS
25
Patent #:
Issue Dt:
06/17/2014
Application #:
13043677
Filing Dt:
03/09/2011
Publication #:
Pub Dt:
06/30/2011
Title:
HIGH DENSITY NOR FLASH ARRAY ARCHITECTURE
26
Patent #:
Issue Dt:
05/22/2012
Application #:
13043680
Filing Dt:
03/09/2011
Publication #:
Pub Dt:
06/30/2011
Title:
SELECTIVE METAL DEPOSITION OVER DIELECTRIC LAYERS
27
Patent #:
Issue Dt:
10/11/2011
Application #:
13043754
Filing Dt:
03/09/2011
Publication #:
Pub Dt:
07/07/2011
Title:
PHOTOMASKS, METHODS OF FORMING PHOTOMASKS, AND METHODS OF PHOTOLITHOGRAPHICALLY-PATTERNING SUBSTRATES
28
Patent #:
Issue Dt:
11/13/2012
Application #:
13043902
Filing Dt:
03/09/2011
Publication #:
Pub Dt:
06/30/2011
Title:
METHODS OF FORMING ELECTRICALLY INSULATIVE MATERIALS, METHODS OF FORMING LOW K DIELECTRIC REGIONS, AND METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
29
Patent #:
Issue Dt:
02/18/2014
Application #:
13043968
Filing Dt:
03/09/2011
Publication #:
Pub Dt:
06/30/2011
Title:
MEMORY DEVICE, ELECTRONIC SYSTEM, AND METHODS ASSOCIATED WITH MODIFYING DATA AND A FILE OF A MEMORY DEVICE
30
Patent #:
Issue Dt:
03/22/2016
Application #:
13044134
Filing Dt:
03/09/2011
Publication #:
Pub Dt:
09/13/2012
Title:
REMOVAL OF METAL
31
Patent #:
Issue Dt:
01/15/2013
Application #:
13045325
Filing Dt:
03/10/2011
Publication #:
Pub Dt:
06/30/2011
Title:
RELAXED-PITCH METHOD OF ALIGNING ACTIVE AREA TO DIGIT LINE
32
Patent #:
Issue Dt:
10/23/2018
Application #:
13046420
Filing Dt:
03/11/2011
Publication #:
Pub Dt:
05/03/2012
Title:
DATA SIGNAL MIRRORING
33
Patent #:
Issue Dt:
01/19/2016
Application #:
13046439
Filing Dt:
03/11/2011
Publication #:
Pub Dt:
09/13/2012
Title:
SYSTEMS, DEVICES, MEMORY CONTROLLERS, AND METHODS FOR CONTROLLING MEMORY
34
Patent #:
Issue Dt:
10/07/2014
Application #:
13046446
Filing Dt:
03/11/2011
Publication #:
Pub Dt:
09/13/2012
Title:
SYSTEMS, DEVICES, MEMORY CONTROLLERS, AND METHODS FOR MEMORY INITIALIZATION
35
Patent #:
Issue Dt:
06/19/2012
Application #:
13047014
Filing Dt:
03/14/2011
Publication #:
Pub Dt:
08/25/2011
Title:
MEMORY DEVICE REFERENCE CELL PROGRAMMING METHOD AND APPARATUS
36
Patent #:
Issue Dt:
12/11/2012
Application #:
13047215
Filing Dt:
03/14/2011
Publication #:
Pub Dt:
06/30/2011
Title:
METHODS OF FORMING A MEMORY ARRAY WITH A PAIR OF MEMORY-CELL STRINGS TO A SINGLE CONDUCTIVE PILLAR
37
Patent #:
Issue Dt:
02/26/2013
Application #:
13047430
Filing Dt:
03/14/2011
Publication #:
Pub Dt:
07/07/2011
Title:
METHODS FOR FORMING SMALL-SCALE CAPACITOR STRUCTURES
38
Patent #:
Issue Dt:
01/14/2014
Application #:
13047555
Filing Dt:
03/14/2011
Publication #:
Pub Dt:
09/20/2012
Title:
METHODS, DEVICES, AND SYSTEMS FOR DATA SENSING IN A MEMORY SYSTEM
39
Patent #:
Issue Dt:
06/05/2012
Application #:
13047562
Filing Dt:
03/14/2011
Publication #:
Pub Dt:
08/25/2011
Title:
RANDOM TELEGRAPH SIGNAL NOISE REDUCTION SCHEME FOR SEMICONDUCTOR MEMORIES
40
Patent #:
Issue Dt:
10/08/2013
Application #:
13047602
Filing Dt:
03/14/2011
Publication #:
Pub Dt:
07/07/2011
Title:
APPARATUS AND METHODS FOR A PHYSICAL LAYOUT OF SIMULTANEOUSLY SUB-ACCESSIBLE MEMORY MODULES
41
Patent #:
Issue Dt:
01/01/2013
Application #:
13047678
Filing Dt:
03/14/2011
Publication #:
Pub Dt:
07/07/2011
Title:
READING METHOD OF A MEMORY DEVICE WITH EMBEDDED ERROR-CORRECTING CODE AND MEMORY DEVICE WITH EMBEDDED ERROR-CORRECTING CODE
42
Patent #:
Issue Dt:
03/13/2012
Application #:
13048082
Filing Dt:
03/15/2011
Publication #:
Pub Dt:
07/07/2011
Title:
METHOD OF ROTATING DATA IN A PLURALITY OF PROCESSING ELEMENTS
43
Patent #:
Issue Dt:
06/26/2012
Application #:
13048110
Filing Dt:
03/15/2011
Publication #:
Pub Dt:
07/07/2011
Title:
METHOD AND APPARATUS FOR DIRECTING MOLDING COMPOUND FLOW AND RESULTING SEMICONDUCTOR DEVICE PACKAGES
44
Patent #:
Issue Dt:
04/26/2016
Application #:
13048656
Filing Dt:
03/15/2011
Publication #:
Pub Dt:
09/20/2012
Title:
SOLID STATE OPTOELECTRONIC DEVICE WITH PREFORMED METAL SUPPORT SUBSTRATE
45
Patent #:
Issue Dt:
05/21/2013
Application #:
13048670
Filing Dt:
03/15/2011
Publication #:
Pub Dt:
07/07/2011
Title:
EPITAXIAL SILICON GROWTH
46
Patent #:
Issue Dt:
10/29/2013
Application #:
13048760
Filing Dt:
03/15/2011
Publication #:
Pub Dt:
07/07/2011
Title:
CONFIGURATION OF A MULTILEVEL FLASH MEMORY DEVICE
47
Patent #:
Issue Dt:
04/22/2014
Application #:
13049264
Filing Dt:
03/16/2011
Publication #:
Pub Dt:
07/07/2011
Title:
MULTI-PHASE SIGNAL GENERATOR AND METHOD
48
Patent #:
Issue Dt:
02/14/2012
Application #:
13049464
Filing Dt:
03/16/2011
Publication #:
Pub Dt:
07/07/2011
Title:
MEMORY CELL OPERATION
49
Patent #:
Issue Dt:
05/14/2013
Application #:
13049717
Filing Dt:
03/16/2011
Publication #:
Pub Dt:
09/20/2012
Title:
SELF-CHECK CALIBRATION OF PROGRAM OR ERASE AND VERIFY PROCESS USING MEMORY CELL DISTRIBUTION
50
Patent #:
Issue Dt:
01/29/2013
Application #:
13050250
Filing Dt:
03/17/2011
Publication #:
Pub Dt:
07/07/2011
Title:
PHOTOMASK CONSTRUCTIONS HAVING LINERS OF SPECIFIED COMPOSITIONS ALONG SIDEWALLS OF MULTI-LAYERED STRUCTURES
51
Patent #:
Issue Dt:
09/03/2013
Application #:
13050725
Filing Dt:
03/17/2011
Publication #:
Pub Dt:
09/20/2012
Title:
METHODS OF FORMING AT LEAST ONE CONDUCTIVE ELEMENT AND METHODS OF FORMING A SEMICONDUCTOR STRUCTURE
52
Patent #:
Issue Dt:
07/24/2012
Application #:
13050819
Filing Dt:
03/17/2011
Publication #:
Pub Dt:
07/07/2011
Title:
MEMORY ARRAY WITH ULTRA-THIN ETCHED PILLAR SURROUND GATE ACCESS TRANSISTORS AND BURIED DATA/BIT LINES
53
Patent #:
Issue Dt:
05/22/2012
Application #:
13051050
Filing Dt:
03/18/2011
Publication #:
Pub Dt:
07/07/2011
Title:
NROM FLASH MEMORY DEVICES ON ULTRATHIN SILICON
54
Patent #:
Issue Dt:
10/07/2014
Application #:
13051324
Filing Dt:
03/18/2011
Publication #:
Pub Dt:
07/14/2011
Title:
BIOS LOCK ENCODE/DECODE DRIVER
55
Patent #:
Issue Dt:
12/17/2013
Application #:
13051363
Filing Dt:
03/18/2011
Publication #:
Pub Dt:
07/07/2011
Title:
PROGRAMMING BASED ON CONTROLLER PERFORMANCE REQUIREMENTS
56
Patent #:
Issue Dt:
06/05/2012
Application #:
13051380
Filing Dt:
03/18/2011
Publication #:
Pub Dt:
07/07/2011
Title:
METHODS FOR PROGRAMMING A MEMORY DEVICE AND MEMORY DEVICES USING INHIBIT VOLTAGES THAT ARE LESS THAN A SUPPLY VOLTAGE
57
Patent #:
Issue Dt:
03/25/2014
Application #:
13051599
Filing Dt:
03/18/2011
Publication #:
Pub Dt:
07/12/2012
Title:
MEMORIES AND METHODS OF PROGRAMMING MEMORIES
58
Patent #:
Issue Dt:
03/20/2012
Application #:
13052493
Filing Dt:
03/21/2011
Publication #:
Pub Dt:
07/14/2011
Title:
MICROELECTRONIC DEVICES
59
Patent #:
Issue Dt:
11/12/2013
Application #:
13052660
Filing Dt:
03/21/2011
Publication #:
Pub Dt:
08/11/2011
Title:
METHOD, APPARATUS AND SYSTEM PROVIDING ADJUSTMENT OF PIXEL DEFECT MAP
60
Patent #:
Issue Dt:
09/09/2014
Application #:
13053604
Filing Dt:
03/22/2011
Publication #:
Pub Dt:
07/14/2011
Title:
INTEGRATED CIRCUITS AND TRANSISTOR DESIGN THEREFOR
61
Patent #:
Issue Dt:
10/09/2012
Application #:
13053723
Filing Dt:
03/22/2011
Publication #:
Pub Dt:
07/14/2011
Title:
ELECTRONIC DEVICE COMPRISING NON VOLATILE MEMORY CELLS AND CORRESPONDING PROGRAMMING METHOD
62
Patent #:
Issue Dt:
08/12/2014
Application #:
13053932
Filing Dt:
03/22/2011
Publication #:
Pub Dt:
09/27/2012
Title:
VERTICAL LIGHT EMITTING DEVICES WITH NICKEL SILICIDE BONDING AND METHODS OF MANUFACTURING
63
Patent #:
Issue Dt:
10/30/2012
Application #:
13064234
Filing Dt:
03/11/2011
Publication #:
Pub Dt:
09/22/2011
Title:
CLOCK GENERATION CIRCUIT, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND METHOD OF GENERATING CLOCK SIGNAL
64
Patent #:
Issue Dt:
04/23/2013
Application #:
13069005
Filing Dt:
03/22/2011
Publication #:
Pub Dt:
07/14/2011
Title:
METHOD OF FABRICATING INTEGRATED CIRCUITRY
65
Patent #:
Issue Dt:
11/15/2016
Application #:
13069162
Filing Dt:
03/22/2011
Publication #:
Pub Dt:
09/27/2012
Title:
SOLID STATE OPTOELECTRONIC DEVICE WITH PLATED SUPPORT SUBSTRATE
66
Patent #:
Issue Dt:
03/25/2014
Application #:
13070121
Filing Dt:
03/23/2011
Publication #:
Pub Dt:
07/14/2011
Title:
WORD LINE VOLTAGE BOOST SYSTEM AND METHOD FOR NON-VOLATILE MEMORY DEVICES AND MEMORY DEVICES AND PROCESSOR-BASED SYSTEM USING SAME
67
Patent #:
Issue Dt:
07/17/2012
Application #:
13070256
Filing Dt:
03/23/2011
Publication #:
Pub Dt:
07/14/2011
Title:
METHODS OF FORMING FIELD EFFECT TRANSISTORS, PLURALITIES OF FIELD EFFECT TRANSISTORS, AND DRAM CIRCUITRY COMPRISING A PLURALITY OF INDIVIDUAL MEMORY CELLS
68
Patent #:
Issue Dt:
02/28/2012
Application #:
13070311
Filing Dt:
03/23/2011
Publication #:
Pub Dt:
07/14/2011
Title:
MULTI-PHASE SIGNAL GENERATOR AND METHOD
69
Patent #:
Issue Dt:
10/25/2016
Application #:
13071287
Filing Dt:
03/24/2011
Publication #:
Pub Dt:
07/14/2011
Title:
METHOD AND APPARATUS FOR SELECTING AN OPERATING MODE BASED ON A DETERMINATION OF THE AVAILABILITY OF INTERNAL CLOCK SIGNALS
70
Patent #:
Issue Dt:
03/25/2014
Application #:
13071296
Filing Dt:
03/24/2011
Publication #:
Pub Dt:
09/27/2012
Title:
ROW ADDRESS DECODING BLOCK FOR NON-VOLATILE MEMORIES AND METHODS FOR DECODING PRE-DECODED ADDRESS INFORMATION
71
Patent #:
Issue Dt:
03/19/2013
Application #:
13071303
Filing Dt:
03/24/2011
Publication #:
Pub Dt:
07/14/2011
Title:
MEMORY BANK SIGNAL COUPLING BUFFER AND METHOD
72
Patent #:
Issue Dt:
08/07/2012
Application #:
13071443
Filing Dt:
03/24/2011
Publication #:
Pub Dt:
07/19/2012
Title:
METHOD FOR FABRICATING A MASK
73
Patent #:
Issue Dt:
03/20/2012
Application #:
13071628
Filing Dt:
03/25/2011
Publication #:
Pub Dt:
07/14/2011
Title:
VERTICAL WRAP-AROUND-GATE FIELD-EFFECT-TRANSISTOR FOR HIGH DENSITY, LOW VOLTAGE LOGIC AND MEMORY ARRAY
74
Patent #:
Issue Dt:
07/17/2012
Application #:
13071911
Filing Dt:
03/25/2011
Publication #:
Pub Dt:
07/14/2011
Title:
ROW ADDRESSING
75
Patent #:
Issue Dt:
05/21/2013
Application #:
13071979
Filing Dt:
03/25/2011
Publication #:
Pub Dt:
07/14/2011
Title:
METHODS OF MAKING A SEMICONDUCTOR MEMORY DEVICE
76
Patent #:
Issue Dt:
07/14/2015
Application #:
13072402
Filing Dt:
03/25/2011
Publication #:
Pub Dt:
09/27/2012
Title:
DEVICES HAVING DIFFERENT EFFECTIVE SERIES RESISTANCE STATES AND METHODS FOR CONTROLLING SUCH DEVICES
77
Patent #:
Issue Dt:
03/12/2013
Application #:
13072445
Filing Dt:
03/25/2011
Publication #:
Pub Dt:
07/14/2011
Title:
SEMICONDUCTOR DEVICE HAVING BACKSIDE REDISTRIBUTION LAYERS
78
Patent #:
Issue Dt:
12/23/2014
Application #:
13072478
Filing Dt:
03/25/2011
Publication #:
Pub Dt:
09/27/2012
Title:
NON-VOLATILE MEMORY PROGRAMMING
79
Patent #:
Issue Dt:
12/11/2012
Application #:
13072504
Filing Dt:
03/25/2011
Publication #:
Pub Dt:
09/27/2012
Title:
MULTI-LEVEL MEMORY CELL
80
Patent #:
Issue Dt:
02/12/2013
Application #:
13073317
Filing Dt:
03/28/2011
Publication #:
Pub Dt:
07/21/2011
Title:
METHOD FOR READING A MULTILEVEL CELL IN A NON-VOLATILE MEMORY DEVICE
81
Patent #:
Issue Dt:
02/10/2015
Application #:
13073360
Filing Dt:
03/28/2011
Publication #:
Pub Dt:
07/14/2011
Title:
NAND INTERFACE
82
Patent #:
Issue Dt:
03/13/2012
Application #:
13073496
Filing Dt:
03/28/2011
Publication #:
Pub Dt:
07/14/2011
Title:
METHODS OF OPERATING A MEMORY SYSTEM
83
Patent #:
Issue Dt:
07/03/2012
Application #:
13073595
Filing Dt:
03/28/2011
Publication #:
Pub Dt:
07/14/2011
Title:
METHODS, DEVICES, AND SYSTEMS RELATING TO MEMORY CELLS HAVING A FLOATING BODY
84
Patent #:
Issue Dt:
06/19/2012
Application #:
13073624
Filing Dt:
03/28/2011
Publication #:
Pub Dt:
07/14/2011
Title:
CAPACITOR-LESS MEMORY CELL, DEVICE, SYSTEM AND METHOD OF MAKING SAME
85
Patent #:
Issue Dt:
05/01/2018
Application #:
13073768
Filing Dt:
03/28/2011
Publication #:
Pub Dt:
07/14/2011
Title:
BUS TRANSLATOR
86
Patent #:
Issue Dt:
01/13/2015
Application #:
13074642
Filing Dt:
03/29/2011
Publication #:
Pub Dt:
10/04/2012
Title:
ARRAYS OF MEMORY CELLS AND METHODS OF FORMING AN ARRAY OF VERTICALLY STACKED TIERS OF MEMORY CELLS
87
Patent #:
Issue Dt:
06/26/2012
Application #:
13074785
Filing Dt:
03/29/2011
Publication #:
Pub Dt:
07/21/2011
Title:
DIGITAL LOCKED LOOPS AND METHODS WITH CONFIGURABLE OPERATING PARAMETERS
88
Patent #:
Issue Dt:
10/29/2013
Application #:
13074852
Filing Dt:
03/29/2011
Publication #:
Pub Dt:
10/04/2012
Title:
METHODS FOR FORMING A SEMICONDUCTOR STRUCTURE
89
Patent #:
Issue Dt:
01/29/2013
Application #:
13074938
Filing Dt:
03/29/2011
Publication #:
Pub Dt:
07/21/2011
Title:
SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES INCLUDING TRENCH AND CHANNEL INTERSECTS WITH THROUGH-HOLE IN THE MOLD MATERIAL
90
Patent #:
Issue Dt:
12/10/2013
Application #:
13074945
Filing Dt:
03/29/2011
Publication #:
Pub Dt:
10/04/2012
Title:
MEASUREMENT INITIALIZATION CIRCUITRY
91
Patent #:
Issue Dt:
03/17/2015
Application #:
13074972
Filing Dt:
03/29/2011
Publication #:
Pub Dt:
10/04/2012
Title:
COMMAND PATHS, APPARATUSES AND METHODS FOR PROVIDING A COMMAND TO A DATA BLOCK
92
Patent #:
Issue Dt:
10/01/2013
Application #:
13076505
Filing Dt:
03/31/2011
Publication #:
Pub Dt:
07/21/2011
Title:
STACKED SEMICONDUCTOR COMPONENTS HAVING CONDUCTIVE INTERCONNECTS
93
Patent #:
Issue Dt:
11/22/2011
Application #:
13077533
Filing Dt:
03/31/2011
Publication #:
Pub Dt:
07/21/2011
Title:
BAND-GAP REFERENCE VOLTAGE DETECTION CIRCUIT
94
Patent #:
Issue Dt:
06/06/2017
Application #:
13078274
Filing Dt:
04/01/2011
Publication #:
Pub Dt:
10/04/2012
Title:
METHODS OF FORMING VERTICAL FIELD-EFFECT TRANSISTOR WITH SELF-ALIGNED CONTACTS FOR MEMORY DEVICES WITH PLANAR PERIPHERY/ARRAY AND INTERMEDIATE STRUCTURES FORMED THEREBY
95
Patent #:
Issue Dt:
08/21/2012
Application #:
13078563
Filing Dt:
04/01/2011
Publication #:
Pub Dt:
07/28/2011
Title:
ASYNCHRONOUS/SYNCHRONOUS INTERFACE
96
Patent #:
Issue Dt:
02/10/2015
Application #:
13078679
Filing Dt:
04/01/2011
Publication #:
Pub Dt:
10/04/2012
Title:
RESISTIVE SWITCHING IN MEMORY CELLS
97
Patent #:
Issue Dt:
11/04/2014
Application #:
13078771
Filing Dt:
04/01/2011
Publication #:
Pub Dt:
07/21/2011
Title:
SYSTEMS, METHODS AND DEVICES FOR LIMITING CURRENT CONSUMPTION BY A DIFFERENT RAMP RATE UPON POWER-UP
98
Patent #:
Issue Dt:
06/12/2012
Application #:
13079643
Filing Dt:
04/04/2011
Publication #:
Pub Dt:
07/28/2011
Title:
DYNAMIC SOFT PROGRAM TRIMS
99
Patent #:
Issue Dt:
07/14/2015
Application #:
13079652
Filing Dt:
04/04/2011
Publication #:
Pub Dt:
10/04/2012
Title:
CONFINED CELL STRUCTURES AND METHODS OF FORMING CONFINED CELL STRUCTURES
100
Patent #:
Issue Dt:
03/05/2013
Application #:
13080205
Filing Dt:
04/05/2011
Title:
PATTERNED SEMICONDUCTOR BASES, AND PATTERNING METHODS
Assignor
1
Exec Dt:
07/31/2019
Assignees
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
2
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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