|
|
Patent #:
|
|
Issue Dt:
|
07/02/2013
|
Application #:
|
13369490
|
Filing Dt:
|
02/09/2012
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
Title:
|
ETCHANT GAS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/2015
|
Application #:
|
13369654
|
Filing Dt:
|
02/09/2012
|
Publication #:
|
|
Pub Dt:
|
08/15/2013
| | | | |
Title:
|
MEMORY CELLS AND MEMORY CELL FORMATION METHODS USING SEALING MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2015
|
Application #:
|
13369822
|
Filing Dt:
|
02/09/2012
|
Publication #:
|
|
Pub Dt:
|
08/15/2013
| | | | |
Title:
|
MEMORY CELL PROFILES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2014
|
Application #:
|
13369928
|
Filing Dt:
|
02/09/2012
|
Publication #:
|
|
Pub Dt:
|
08/15/2013
| | | | |
Title:
|
APPARATUSES AND METHODS FOR LINE CHARGE SHARING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13371045
|
Filing Dt:
|
02/10/2012
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
Title:
|
MEMORY SYSTEM AND METHOD USING A MEMORY DEVICE DIE STACKED WITH A LOGIC DIE USING DATA ENCODING, AND SYSTEM USING THE MEMORY SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2016
|
Application #:
|
13371133
|
Filing Dt:
|
02/10/2012
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
Title:
|
ERROR DETECTION FOR MULTI-BIT MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
13372669
|
Filing Dt:
|
02/14/2012
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
Title:
|
MEMORY CELL OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
13372683
|
Filing Dt:
|
02/14/2012
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
Title:
|
System Of Rotating Data In A Plurality Of Processing Elements
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13377495
|
Filing Dt:
|
04/03/2012
|
Publication #:
|
|
Pub Dt:
|
07/12/2012
| | | | |
Title:
|
SUSPENSION OF MEMORY OPERATIONS FOR REDUCED READ LATENCY IN MEMORY ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2015
|
Application #:
|
13384999
|
Filing Dt:
|
01/19/2012
|
Publication #:
|
|
Pub Dt:
|
04/10/2014
| | | | |
Title:
|
APPARATUS AND METHODS TO PERFORM READ-WHILE WRITE (RWW) OPERATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13396039
|
Filing Dt:
|
02/14/2012
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
Title:
|
Graphoepitaxial Self-Assembly of Arrays of Downward Facing Half-Cylinders
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2013
|
Application #:
|
13396261
|
Filing Dt:
|
02/14/2012
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
Title:
|
Polymer Materials for Formation of Registered Arrays of Cylindrical Pores
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2013
|
Application #:
|
13396414
|
Filing Dt:
|
02/14/2012
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
Title:
|
METHODS OF FORMING MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2014
|
Application #:
|
13396473
|
Filing Dt:
|
02/14/2012
|
Publication #:
|
|
Pub Dt:
|
08/15/2013
| | | | |
Title:
|
SUPPLY INDEPENDENT DELAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2018
|
Application #:
|
13397392
|
Filing Dt:
|
02/15/2012
|
Publication #:
|
|
Pub Dt:
|
11/08/2012
| | | | |
Title:
|
MEMORIES AND METHODS TO PROVIDE CONFIGURATION INFORMATION TO CONTROLLERS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2014
|
Application #:
|
13397511
|
Filing Dt:
|
02/15/2012
|
Publication #:
|
|
Pub Dt:
|
06/14/2012
| | | | |
Title:
|
PHASE MIXER WITH ADJUSTABLE LOAD-TO-DRIVE RATIO
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2014
|
Application #:
|
13398041
|
Filing Dt:
|
02/16/2012
|
Publication #:
|
|
Pub Dt:
|
06/14/2012
| | | | |
Title:
|
HIGH PERFORMANCE INPUT RECEIVER CIRCUIT FOR REDUCED-SWING INPUTS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2014
|
Application #:
|
13398491
|
Filing Dt:
|
02/16/2012
|
Publication #:
|
|
Pub Dt:
|
06/07/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICE COMPRISING A TRANSISTOR GATE HAVING MULTIPLE VERTICALLY ORIENTED SIDEWALLS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
13398549
|
Filing Dt:
|
02/16/2012
|
Publication #:
|
|
Pub Dt:
|
06/06/2013
| | | | |
Title:
|
RECESSED CHANNEL NEGATIVE DIFFERENTIAL RESISTANCE-BASED MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
13399739
|
Filing Dt:
|
02/17/2012
|
Publication #:
|
|
Pub Dt:
|
06/14/2012
| | | | |
Title:
|
BIASING SYSTEM AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2016
|
Application #:
|
13399785
|
Filing Dt:
|
02/17/2012
|
Publication #:
|
|
Pub Dt:
|
08/22/2013
| | | | |
Title:
|
APPARATUSES AND METHODS FOR PROVIDING WORD LINE VOLTAGES DURING STANDBY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2014
|
Application #:
|
13400442
|
Filing Dt:
|
02/20/2012
|
Publication #:
|
|
Pub Dt:
|
06/14/2012
| | | | |
Title:
|
JFET DEVICES WITH INCREASED BARRIER HEIGHT AND METHODS OF MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2016
|
Application #:
|
13400518
|
Filing Dt:
|
02/20/2012
|
Publication #:
|
|
Pub Dt:
|
08/22/2013
| | | | |
Title:
|
INTEGRATED CIRCUITRY COMPONENTS, SWITCHES, AND MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2014
|
Application #:
|
13400678
|
Filing Dt:
|
02/21/2012
|
Publication #:
|
|
Pub Dt:
|
08/22/2013
| | | | |
Title:
|
CIRCUIT-PROTECTION DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2014
|
Application #:
|
13400920
|
Filing Dt:
|
02/21/2012
|
Publication #:
|
|
Pub Dt:
|
08/22/2013
| | | | |
Title:
|
METHODS OF FORMING A METAL SILICIDE REGION ON AT LEAST ONE SILICON STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2015
|
Application #:
|
13401534
|
Filing Dt:
|
02/21/2012
|
Publication #:
|
|
Pub Dt:
|
06/14/2012
| | | | |
Title:
|
Circuit Structures and Electronic Systems
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
13403078
|
Filing Dt:
|
02/23/2012
|
Publication #:
|
|
Pub Dt:
|
06/14/2012
| | | | |
Title:
|
FRACTIONAL BITS IN MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2015
|
Application #:
|
13403109
|
Filing Dt:
|
02/23/2012
|
Publication #:
|
|
Pub Dt:
|
08/29/2013
| | | | |
Title:
|
APPARATUS AND METHODS FOR APPLYING A NON-ZERO VOLTAGE DIFFERENTIAL ACROSS A MEMORY CELL NOT INVOLVED IN AN ACCESS OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
13403596
|
Filing Dt:
|
02/23/2012
|
Publication #:
|
|
Pub Dt:
|
06/14/2012
| | | | |
Title:
|
METHODS, DEVICES, AND SYSTEMS RELATING TO A MEMORY CELL HAVING A FLOATING BODY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
13403599
|
Filing Dt:
|
02/23/2012
|
Publication #:
|
|
Pub Dt:
|
06/21/2012
| | | | |
Title:
|
IMAGE SENSOR INCLUDING REAL-TIME AUTOMATIC EXPOSURE CONTROL AND SWALLOWABLE PILL INCLUDING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2016
|
Application #:
|
13404631
|
Filing Dt:
|
02/24/2012
|
Publication #:
|
|
Pub Dt:
|
06/21/2012
| | | | |
Title:
|
METHODS FOR FORMING CONDUCTIVE VIAS IN SEMICONDUCTOR DEVICE COMPONENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/05/2013
|
Application #:
|
13405554
|
Filing Dt:
|
02/27/2012
|
Publication #:
|
|
Pub Dt:
|
06/21/2012
| | | | |
Title:
|
MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2015
|
Application #:
|
13406962
|
Filing Dt:
|
02/28/2012
|
Publication #:
|
|
Pub Dt:
|
08/29/2013
| | | | |
Title:
|
ERROR DETECTION OR CORRECTION OF STORED SIGNALS AFTER ONE OR MORE HEAT EVENTS IN ONE OR MORE MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/14/2013
|
Application #:
|
13407003
|
Filing Dt:
|
02/28/2012
|
Publication #:
|
|
Pub Dt:
|
06/21/2012
| | | | |
Title:
|
Elimination of RDL Using Tape Base Flip Chip on Flex for Die Stacking
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
13407007
|
Filing Dt:
|
02/28/2012
|
Publication #:
|
|
Pub Dt:
|
08/29/2013
| | | | |
Title:
|
SYSTEMS, AND DEVICES, AND METHODS FOR PROGRAMMING A RESISTIVE MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2013
|
Application #:
|
13407185
|
Filing Dt:
|
02/28/2012
|
Publication #:
|
|
Pub Dt:
|
06/28/2012
| | | | |
Title:
|
SEMICONDUCTOR DEVICES INCLUDING A RUTHENIUM FILM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2016
|
Application #:
|
13407328
|
Filing Dt:
|
02/28/2012
|
Publication #:
|
|
Pub Dt:
|
08/29/2013
| | | | |
Title:
|
MEMORY, MEMORY CONTROLLERS, AND METHODS FOR DYNAMICALLY SWITCHING A DATA MASKING/DATA BUS INVERSION INPUT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2013
|
Application #:
|
13408492
|
Filing Dt:
|
02/29/2012
|
Publication #:
|
|
Pub Dt:
|
06/28/2012
| | | | |
Title:
|
PROGRAMMING METHODS AND MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
13408566
|
Filing Dt:
|
02/29/2012
|
Publication #:
|
|
Pub Dt:
|
06/21/2012
| | | | |
Title:
|
SYSTEM AND METHOD FOR HIDDEN-REFRESH RATE MODIFICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2015
|
Application #:
|
13408634
|
Filing Dt:
|
02/29/2012
|
Publication #:
|
|
Pub Dt:
|
06/21/2012
| | | | |
Title:
|
DATA SWITCH
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
13409832
|
Filing Dt:
|
03/01/2012
|
Publication #:
|
|
Pub Dt:
|
06/28/2012
| | | | |
Title:
|
METHODS OF FORMING REVERSE MODE NON-VOLATILE MEMORY CELL STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
13410102
|
Filing Dt:
|
03/01/2012
|
Publication #:
|
|
Pub Dt:
|
09/05/2013
| | | | |
Title:
|
METHOD FOR FABRICATING A VERTICAL TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/2015
|
Application #:
|
13410596
|
Filing Dt:
|
03/02/2012
|
Publication #:
|
|
Pub Dt:
|
07/19/2012
| | | | |
Title:
|
METHODS FOR EPITAXIAL SILICON GROWTH
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2015
|
Application #:
|
13411167
|
Filing Dt:
|
03/02/2012
|
Publication #:
|
|
Pub Dt:
|
09/05/2013
| | | | |
Title:
|
THROUGH-SUBSTRATE VIA (TSV) TESTING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2014
|
Application #:
|
13412367
|
Filing Dt:
|
03/05/2012
|
Publication #:
|
|
Pub Dt:
|
06/28/2012
| | | | |
Title:
|
STACKED DEVICE IDENTIFICATION ASSIGNMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2014
|
Application #:
|
13412378
|
Filing Dt:
|
03/05/2012
|
Publication #:
|
|
Pub Dt:
|
06/28/2012
| | | | |
Title:
|
MEMORY WITH SUB-BLOCKS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/2013
|
Application #:
|
13412388
|
Filing Dt:
|
03/05/2012
|
Publication #:
|
|
Pub Dt:
|
06/28/2012
| | | | |
Title:
|
SOLID STATE LIGHTING DEVICES AND ASSOCIATED METHODS OF MANUFACTURING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2015
|
Application #:
|
13412523
|
Filing Dt:
|
03/05/2012
|
Publication #:
|
|
Pub Dt:
|
09/05/2013
| | | | |
Title:
|
APPARATUSES AND METHODS FOR ADJUSTMENT OF DATA STROBE SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2014
|
Application #:
|
13412539
|
Filing Dt:
|
03/05/2012
|
Publication #:
|
|
Pub Dt:
|
09/05/2013
| | | | |
Title:
|
APPARATUSES AND METHODS FOR ENCODING USING ERROR PROTECTION CODES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2014
|
Application #:
|
13413119
|
Filing Dt:
|
03/06/2012
|
Publication #:
|
|
Pub Dt:
|
06/28/2012
| | | | |
Title:
|
PROCESSORS FOR PROGRAMMING MULTILEVEL-CELL NAND MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2015
|
Application #:
|
13413130
|
Filing Dt:
|
03/06/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
MEMORY AND SENSE PARAMETER DETERMINATION METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2014
|
Application #:
|
13413157
|
Filing Dt:
|
03/06/2012
|
Publication #:
|
|
Pub Dt:
|
07/26/2012
| | | | |
Title:
|
WET ETCHANTS INCLUDING AT LEAST ONE ETCH BLOCKER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2015
|
Application #:
|
13413363
|
Filing Dt:
|
03/06/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
APPARATUSES AND METHODS INCLUDING ERROR CORRECTION CODE ORGANIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/2015
|
Application #:
|
13413402
|
Filing Dt:
|
03/06/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
ARRAYS OF VERTICALLY-ORIENTED TRANSISTORS, MEMORY ARRAYS INCLUDING VERTICALLY-ORIENTED TRANSISTORS, AND MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13413552
|
Filing Dt:
|
03/06/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
SEMICONDUCTOR CONSTRUCTIONS CONTAINING TUBULAR CAPACITOR STORAGE NODES, AND RETAINING STRUCTURES ALONG PORTIONS OF THE TUBULAR CAPACITOR STORAGE NODES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2014
|
Application #:
|
13413762
|
Filing Dt:
|
03/07/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
LOCAL SELF-BOOST USING A PLURALITY OF CUT-OFF CELLS ON A SINGLE SIDE OF A STRING OF MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2017
|
Application #:
|
13414329
|
Filing Dt:
|
03/07/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
METHOD FOR BASE CONTACT LAYOUT, SUCH AS FOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2012
|
Application #:
|
13415389
|
Filing Dt:
|
03/08/2012
|
Publication #:
|
|
Pub Dt:
|
06/28/2012
| | | | |
Title:
|
ROBUST INDEX STORAGE FOR NON-VOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2013
|
Application #:
|
13415408
|
Filing Dt:
|
03/08/2012
|
Publication #:
|
|
Pub Dt:
|
06/28/2012
| | | | |
Title:
|
DISCRETE TRAP NON-VOLATILE MULTI-FUNCTIONAL MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2014
|
Application #:
|
13415422
|
Filing Dt:
|
03/08/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
APPARATUSES AND METHODS FOR COMBINING ERROR CODING AND MODULATION SCHEMES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2015
|
Application #:
|
13415677
|
Filing Dt:
|
03/08/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
ETCHED TRENCHES IN BOND MATERIALS FOR DIE SINGULATION, AND ASSOCIATED SYSTEMS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2015
|
Application #:
|
13415959
|
Filing Dt:
|
03/09/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
Semiconductor Device and Method for Making the Same
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2014
|
Application #:
|
13416351
|
Filing Dt:
|
03/09/2012
|
Publication #:
|
|
Pub Dt:
|
06/28/2012
| | | | |
Title:
|
PATTERNING MASK AND METHOD OF FORMATION OF MASK USING STEP DOUBLE PATTERNING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2015
|
Application #:
|
13416834
|
Filing Dt:
|
03/09/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
METHODS OF FORMING SINGLE CRYSTAL SILICON STRUCTURES AND SEMICONDUCTOR DEVICE STRUCTURES INCLUDING SINGLE CRYSTAL SILICON STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2014
|
Application #:
|
13417475
|
Filing Dt:
|
03/12/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
MEMORY DEVICE BIASING METHOD AND APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/2015
|
Application #:
|
13417715
|
Filing Dt:
|
03/12/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
METHODS OF OPERATING A MEMORY SYSTEM THAT INCLUDE OUTPUTTING A DATA PATTERN FROM A SECTOR ALLOCATION TABLE TO A HOST IF A LOGICAL SECTOR IS INDICATED AS BEING ERASED
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2013
|
Application #:
|
13417763
|
Filing Dt:
|
03/12/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
DC-DC CONVERTER SWITCHING TRANSISTOR CURRENT MEASUREMENT TECHNIQUE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
13417809
|
Filing Dt:
|
03/12/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
NANOWIRE TRANSISTOR WITH SURROUNDING GATE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2014
|
Application #:
|
13418078
|
Filing Dt:
|
03/12/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
OUTPUT SLEW RATE CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2015
|
Application #:
|
13418082
|
Filing Dt:
|
03/12/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
MEMORY DEVICE CONSTRUCTIONS, MEMORY CELL FORMING METHODS, AND SEMICONDUCTOR CONSTRUCTION FORMING METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13418113
|
Filing Dt:
|
03/12/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
SEMICONDUCTOR CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/2017
|
Application #:
|
13418166
|
Filing Dt:
|
03/12/2012
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
CIRCUITS, APPARATUSES, AND METHODS FOR FREQUENCY DIVISION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/2013
|
Application #:
|
13418623
|
Filing Dt:
|
03/13/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
METHOD AND APPARATUS FOR REDUCING OSCILLATION IN SYNCHRONOUS CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2015
|
Application #:
|
13419002
|
Filing Dt:
|
03/13/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
METHODS FOR DEPOSITING MATERIAL ONTO MICROFEATURE WORKPIECES IN REACTION CHAMBERS AND SYSTEMS FOR DEPOSITING MATERIALS ONTO MICROFEATURE WORKPIECES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2013
|
Application #:
|
13419171
|
Filing Dt:
|
03/13/2012
|
Publication #:
|
|
Pub Dt:
|
07/12/2012
| | | | |
Title:
|
SELF-IDENTIFYING STACKED DIE SEMICONDUCTOR COMPONENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
13419964
|
Filing Dt:
|
03/14/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
REMOVABLE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/21/2016
|
Application #:
|
13420430
|
Filing Dt:
|
03/14/2012
|
Publication #:
|
|
Pub Dt:
|
05/16/2013
| | | | |
Title:
|
APPARATUSES, INTEGRATED CIRCUITS, AND METHODS FOR TESTMODE SECURITY SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2013
|
Application #:
|
13420459
|
Filing Dt:
|
03/14/2012
|
Publication #:
|
|
Pub Dt:
|
08/30/2012
| | | | |
Title:
|
DUTY CYCLE CORRECTION SYSTEMS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2013
|
Application #:
|
13420468
|
Filing Dt:
|
03/14/2012
|
Publication #:
|
|
Pub Dt:
|
07/12/2012
| | | | |
Title:
|
METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2013
|
Application #:
|
13420534
|
Filing Dt:
|
03/14/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
MEMORY, COMPUTING SYSTEM AND METHOD FOR CHECKPOINTING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2014
|
Application #:
|
13420623
|
Filing Dt:
|
03/15/2012
|
Publication #:
|
|
Pub Dt:
|
05/30/2013
| | | | |
Title:
|
OVERHEAD RAIL GUIDED TRANSPORT SYSTEM AND IMPLEMENTATION METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2014
|
Application #:
|
13420823
|
Filing Dt:
|
03/15/2012
|
Publication #:
|
|
Pub Dt:
|
07/12/2012
| | | | |
Title:
|
Circuitry and Method Minimizing Output Switching Noise Through Split-Level Signaling and Bus Division Enabled by a Third Power Supply
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2015
|
Application #:
|
13421088
|
Filing Dt:
|
03/15/2012
|
Publication #:
|
|
Pub Dt:
|
09/19/2013
| | | | |
Title:
|
PHYSICAL PAGE, LOGICAL PAGE, AND CODEWORD CORRESPONDENCE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2013
|
Application #:
|
13421289
|
Filing Dt:
|
03/15/2012
|
Publication #:
|
|
Pub Dt:
|
07/05/2012
| | | | |
Title:
|
SELECTIVE REGISTER RESET
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2016
|
Application #:
|
13421578
|
Filing Dt:
|
03/15/2012
|
Publication #:
|
|
Pub Dt:
|
09/19/2013
| | | | |
Title:
|
ERROR PROTECTION FOR MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2014
|
Application #:
|
13421996
|
Filing Dt:
|
03/16/2012
|
Publication #:
|
|
Pub Dt:
|
07/04/2013
| | | | |
Title:
|
METHOD OF FORMING ISOLATION AREA AND STRUCTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2014
|
Application #:
|
13422652
|
Filing Dt:
|
03/16/2012
|
Publication #:
|
|
Pub Dt:
|
09/19/2013
| | | | |
Title:
|
MEMORY DEVICE POWER CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2014
|
Application #:
|
13422870
|
Filing Dt:
|
03/16/2012
|
Publication #:
|
|
Pub Dt:
|
09/19/2013
| | | | |
Title:
|
TECHNIQUES FOR ACCESSING MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2013
|
Application #:
|
13424234
|
Filing Dt:
|
03/19/2012
|
Publication #:
|
|
Pub Dt:
|
07/12/2012
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURES INCLUDING DUAL FINS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2013
|
Application #:
|
13424936
|
Filing Dt:
|
03/20/2012
|
Publication #:
|
|
Pub Dt:
|
07/12/2012
| | | | |
Title:
|
METHODS AND APPARATUS FOR VOLTAGE SENSING AND REPORTING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2014
|
Application #:
|
13425137
|
Filing Dt:
|
03/20/2012
|
Publication #:
|
|
Pub Dt:
|
07/12/2012
| | | | |
Title:
|
Systems, Methods, and Devices for Configuring a Device
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2013
|
Application #:
|
13425325
|
Filing Dt:
|
03/20/2012
|
Publication #:
|
|
Pub Dt:
|
07/12/2012
| | | | |
Title:
|
TECHNIQUES FOR CONTROLLING A DIRECT INJECTION SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/24/2013
|
Application #:
|
13426075
|
Filing Dt:
|
03/21/2012
|
Publication #:
|
|
Pub Dt:
|
07/12/2012
| | | | |
Title:
|
MEMORY CELL SENSING USING NEGATIVE VOLTAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2013
|
Application #:
|
13426402
|
Filing Dt:
|
03/21/2012
|
Publication #:
|
|
Pub Dt:
|
09/06/2012
| | | | |
Title:
|
DELAY LINES, METHODS FOR DELAYING A SIGNAL, AND DELAY LOCK LOOPS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2014
|
Application #:
|
13426825
|
Filing Dt:
|
03/22/2012
|
Publication #:
|
|
Pub Dt:
|
07/04/2013
| | | | |
Title:
|
HIGH-K METAL GATE RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2014
|
Application #:
|
13426832
|
Filing Dt:
|
03/22/2012
|
Publication #:
|
|
Pub Dt:
|
08/08/2013
| | | | |
Title:
|
MANUFACTURING METHOD OF RANDOM ACCESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2015
|
Application #:
|
13427339
|
Filing Dt:
|
03/22/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
MEMORY CELLS, SEMICONDUCTOR DEVICE STRUCTURES, SYSTEMS INCLUDING SUCH CELLS, AND METHODS OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2014
|
Application #:
|
13427529
|
Filing Dt:
|
03/22/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2012
|
Application #:
|
13428241
|
Filing Dt:
|
03/23/2012
|
Publication #:
|
|
Pub Dt:
|
07/12/2012
| | | | |
Title:
|
REDUCING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
13428944
|
Filing Dt:
|
03/23/2012
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
MULTI-FUNCTION RESISTANCE CHANGE MEMORY CELLS AND APPARATUSES INCLUDING THE SAME
|
|