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Reel/Frame:051028/0001   Pages: 834
Recorded: 11/12/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 16529
Page 118 of 166
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1
Patent #:
9157014
Issue Dt:
10/13/2015
Application #:
13689144
Filing Dt:
11/29/2012
Publication #:
US20140147989
Pub Dt:
05/29/2014
Title:
ADHESIVES INCLUDING A FILLER MATERIAL AND RELATED METHODS
2
Patent #:
9257154
Issue Dt:
02/09/2016
Application #:
13689386
Filing Dt:
11/29/2012
Publication #:
US20140146620
Pub Dt:
05/29/2014
Title:
METHODS AND APPARATUSES FOR COMPENSATING FOR SOURCE VOLTAGE
3
Patent #:
9245987
Issue Dt:
01/26/2016
Application #:
13689442
Filing Dt:
11/29/2012
Publication #:
US20140145238
Pub Dt:
05/29/2014
Title:
SEMICONDUCTOR DEVICES AND FABRICATION METHODS
4
Patent #:
8871648
Issue Dt:
10/28/2014
Application #:
13690266
Filing Dt:
11/30/2012
Publication #:
US20130089977
Pub Dt:
04/11/2013
Title:
METHOD FOR FORMING HIGH DENSITY PATTERNS
5
Patent #:
9053801
Issue Dt:
06/09/2015
Application #:
13690957
Filing Dt:
11/30/2012
Publication #:
US20140153312
Pub Dt:
06/05/2014
Title:
MEMORY CELLS HAVING FERROELECTRIC MATERIALS
6
Patent #:
9190174
Issue Dt:
11/17/2015
Application #:
13691266
Filing Dt:
11/30/2012
Publication #:
US20140153332
Pub Dt:
06/05/2014
Title:
DETERMINING SOFT DATA FROM A HARD READ
7
Patent #:
8725959
Issue Dt:
05/13/2014
Application #:
13691338
Filing Dt:
11/30/2012
Publication #:
US20130091336
Pub Dt:
04/11/2013
Title:
Systems and Methods for Internal Initialization of a Nonvolatile Memory
8
Patent #:
8806152
Issue Dt:
08/12/2014
Application #:
13692269
Filing Dt:
12/03/2012
Publication #:
US20130097395
Pub Dt:
04/18/2013
Title:
METHOD AND APPARATUS FOR SENDING DATA FROM MULTIPLE SOURCES OVER A COMMUNICATIONS BUS
9
Patent #:
8772050
Issue Dt:
07/08/2014
Application #:
13692407
Filing Dt:
12/03/2012
Publication #:
US20130122609
Pub Dt:
05/16/2013
Title:
ZR-SUBSTITUTED BATIO3 FILMS
10
Patent #:
8786339
Issue Dt:
07/22/2014
Application #:
13692666
Filing Dt:
12/03/2012
Publication #:
US20140152365
Pub Dt:
06/05/2014
Title:
APPARATUSES AND METHODS FOR DELAYING SIGNALS USING A DELAY LINE WITH HOMOGENOUS ARCHITECTURE AND INTEGRATED MEASURE INITIALIZATION CIRCUITRY
11
Patent #:
8869005
Issue Dt:
10/21/2014
Application #:
13692812
Filing Dt:
12/03/2012
Publication #:
US20130097471
Pub Dt:
04/18/2013
Title:
ERROR CORRECTION IN A STACKED MEMORY
12
Patent #:
9612972
Issue Dt:
04/04/2017
Application #:
13692907
Filing Dt:
12/03/2012
Publication #:
US20140156948
Pub Dt:
06/05/2014
Title:
APPARATUSES AND METHODS FOR PRE-FETCHING AND WRITE-BACK FOR A SEGMENTED CACHE MEMORY
13
Patent #:
9159397
Issue Dt:
10/13/2015
Application #:
13693865
Filing Dt:
12/04/2012
Publication #:
US20140153350
Pub Dt:
06/05/2014
Title:
METHODS AND APPARATUSES FOR REFRESHING MEMORY
14
Patent #:
9443615
Issue Dt:
09/13/2016
Application #:
13693899
Filing Dt:
12/04/2012
Publication #:
US20140157066
Pub Dt:
06/05/2014
Title:
METHODS AND APPARATUSES FOR MEMORY TESTING WITH DATA COMPRESSION
15
Patent #:
8609523
Issue Dt:
12/17/2013
Application #:
13705744
Filing Dt:
12/05/2012
Publication #:
US20130095645
Pub Dt:
04/18/2013
Title:
METHOD OF MAKING A MEMORY ARRAY WITH SURROUNDING GATE ACCESS TRANSISTORS AND CAPACITORS WITH GLOBAL STAGGERED LOCAL BIT LINES
16
Patent #:
9257203
Issue Dt:
02/09/2016
Application #:
13706851
Filing Dt:
12/06/2012
Publication #:
US20140160845
Pub Dt:
06/12/2014
Title:
SETTING A DEFAULT READ SIGNAL BASED ON ERROR CORRECTION
17
Patent #:
9064577
Issue Dt:
06/23/2015
Application #:
13707067
Filing Dt:
12/06/2012
Publication #:
US20140160851
Pub Dt:
06/12/2014
Title:
APPARATUSES AND METHODS TO CONTROL BODY POTENTIAL IN MEMORY OPERATIONS
18
Patent #:
8963121
Issue Dt:
02/24/2015
Application #:
13708526
Filing Dt:
12/07/2012
Publication #:
US20140159063
Pub Dt:
06/12/2014
Title:
VERTICAL SOLID-STATE TRANSDUCERS AND HIGH VOLTAGE SOLID-STATE TRANSDUCERS HAVING BURIED CONTACTS AND ASSOCIATED SYSTEMS AND METHODS
19
Patent #:
8595542
Issue Dt:
11/26/2013
Application #:
13708583
Filing Dt:
12/07/2012
Publication #:
US20130094615
Pub Dt:
04/18/2013
Title:
EXPLICIT SKEW INTERFACE FOR REDUCING CROSSTALK AND SIMULTANEOUS SWITCHING NOISE
20
Patent #:
8778762
Issue Dt:
07/15/2014
Application #:
13708789
Filing Dt:
12/07/2012
Publication #:
US20140162418
Pub Dt:
06/12/2014
Title:
Methods of Forming Vertically-Stacked Structures, and Methods of Forming Vertically-Stacked Memory Cells
21
Patent #:
8817547
Issue Dt:
08/26/2014
Application #:
13709792
Filing Dt:
12/10/2012
Publication #:
US20140160867
Pub Dt:
06/12/2014
Title:
APPARATUSES AND METHODS FOR UNIT IDENTIFICATION IN A MASTER/SLAVE MEMORY STACK
22
Patent #:
8683304
Issue Dt:
03/25/2014
Application #:
13710067
Filing Dt:
12/10/2012
Publication #:
US20130139039
Pub Dt:
05/30/2013
Title:
Error-Correcting Code and Process for Fast Read-Error Correction
23
Patent #:
8719469
Issue Dt:
05/06/2014
Application #:
13710559
Filing Dt:
12/11/2012
Publication #:
US20130103863
Pub Dt:
04/25/2013
Title:
ALIGNMENT OF INSTRUCTIONS AND REPLIES ACROSS MULTIPLE DEVICES IN A CASCADED SYSTEM, USING BUFFERS OF PROGRAMMABLE DEPTHS
24
Patent #:
8703396
Issue Dt:
04/22/2014
Application #:
13710729
Filing Dt:
12/11/2012
Publication #:
US20130102160
Pub Dt:
04/25/2013
Title:
METHODS OF FORMING PATTERNS
25
Patent #:
8976566
Issue Dt:
03/10/2015
Application #:
13710785
Filing Dt:
12/11/2012
Publication #:
US20130099192
Pub Dt:
04/25/2013
Title:
Electronic Devices, Memory Devices and Memory Arrays
26
Patent #:
8603319
Issue Dt:
12/10/2013
Application #:
13711432
Filing Dt:
12/11/2012
Publication #:
US20130102154
Pub Dt:
04/25/2013
Title:
METHODS AND SYSTEMS FOR REMOVING MATERIALS FROM MICROFEATURE WORKPIECES WITH ORGANIC AND/OR NON-AQUEOUS ELECTROLYTIC MEDIA
27
Patent #:
9153451
Issue Dt:
10/06/2015
Application #:
13712635
Filing Dt:
12/12/2012
Publication #:
US20140162455
Pub Dt:
06/12/2014
Title:
METHOD OF FORMING A PLANAR SURFACE FOR A SEMICONDUCTOR DEVICE STRUCTURE, AND RELATED METHODS OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE
28
Patent #:
9034769
Issue Dt:
05/19/2015
Application #:
13712699
Filing Dt:
12/12/2012
Publication #:
US20140159239
Pub Dt:
06/12/2014
Title:
METHODS OF SELECTIVELY REMOVING A SUBSTRATE MATERIAL
29
Patent #:
8999852
Issue Dt:
04/07/2015
Application #:
13712806
Filing Dt:
12/12/2012
Publication #:
US20140162457
Pub Dt:
06/12/2014
Title:
Substrate Mask Patterns, Methods Of Forming A Structure On A Substrate, Methods Of Forming A Square Lattice Pattern From An Oblique Lattice Pattern, And Methods Of Forming A Pattern On A Substrate
30
Patent #:
8889558
Issue Dt:
11/18/2014
Application #:
13712820
Filing Dt:
12/12/2012
Publication #:
US20140162458
Pub Dt:
06/12/2014
Title:
Methods of Forming A Pattern On A Substrate
31
Patent #:
8889559
Issue Dt:
11/18/2014
Application #:
13712830
Filing Dt:
12/12/2012
Publication #:
US20140162459
Pub Dt:
06/12/2014
Title:
Methods of Forming A Pattern On A Substrate
32
Patent #:
8745463
Issue Dt:
06/03/2014
Application #:
13712880
Filing Dt:
12/12/2012
Publication #:
US20130191697
Pub Dt:
07/25/2013
Title:
ERROR CORRECTING CODES FOR INCREASED STORAGE CAPACITY IN MULTILEVEL MEMORY DEVICES
33
Patent #:
8872310
Issue Dt:
10/28/2014
Application #:
13713210
Filing Dt:
12/13/2012
Publication #:
US20130187289
Pub Dt:
07/25/2013
Title:
SEMICONDUCTOR DEVICE STRUCTURES AND ELECTRONIC DEVICES INCLUDING HYBRID CONDUCTIVE VIAS, AND METHODS OF FABRICATION
34
Patent #:
10651315
Issue Dt:
05/12/2020
Application #:
13716287
Filing Dt:
12/17/2012
Publication #:
US20140167131
Pub Dt:
06/19/2014
Title:
THREE DIMENSIONAL MEMORY
35
Patent #:
8889020
Issue Dt:
11/18/2014
Application #:
13716702
Filing Dt:
12/17/2012
Publication #:
US20130105948
Pub Dt:
05/02/2013
Title:
PROCESS FOR IMPROVING CRITICAL DIMENSION UNIFORMITY OF INTEGRATED CIRCUIT ARRAYS
36
Patent #:
8525248
Issue Dt:
09/03/2013
Application #:
13717465
Filing Dt:
12/17/2012
Publication #:
US20130126908
Pub Dt:
05/23/2013
Title:
A MEMORY CELL COMPRISING A FLOATING BODY, A CHANNEL REGION, AND A DIODE
37
Patent #:
9064578
Issue Dt:
06/23/2015
Application #:
13718801
Filing Dt:
12/18/2012
Publication #:
US20140169098
Pub Dt:
06/19/2014
Title:
ENABLE/DISABLE OF MEMORY CHUNKS DURING MEMORY ACCESS
38
Patent #:
8634242
Issue Dt:
01/21/2014
Application #:
13720045
Filing Dt:
12/19/2012
Publication #:
US20130147045
Pub Dt:
06/13/2013
Title:
FLASH MEMORY HAVING MULTI-LEVEL ARCHITECTURE
39
Patent #:
8553458
Issue Dt:
10/08/2013
Application #:
13721808
Filing Dt:
12/20/2012
Publication #:
US20130107626
Pub Dt:
05/02/2013
Title:
METHODS FOR SEGMENTED PROGRAMMING AND MEMORY DEVICES
40
Patent #:
8966409
Issue Dt:
02/24/2015
Application #:
13722909
Filing Dt:
12/20/2012
Publication #:
US20140181763
Pub Dt:
06/26/2014
Title:
Methods Of Forming A Mask And Methods Of Correcting Intra-Field Variation Across A Mask Design Used In Photolithographic Processing
41
Patent #:
8592897
Issue Dt:
11/26/2013
Application #:
13723564
Filing Dt:
12/21/2012
Publication #:
US20130113040
Pub Dt:
05/09/2013
Title:
SEMICONDUCTOR DEVICE COMPRISING TRANSISTOR STRUCTURES AND METHODS FOR FORMING SAME
42
Patent #:
8734957
Issue Dt:
05/27/2014
Application #:
13723573
Filing Dt:
12/21/2012
Publication #:
US20130130053
Pub Dt:
05/23/2013
Title:
METAL PLATING USING SEED FILM
43
Patent #:
9257182
Issue Dt:
02/09/2016
Application #:
13723781
Filing Dt:
12/21/2012
Publication #:
US20140181426
Pub Dt:
06/26/2014
Title:
MEMORY DEVICES AND THEIR OPERATION HAVING TRIM REGISTERS ASSOCIATED WITH ACCESS OPERATION COMMANDS
44
Patent #:
8823006
Issue Dt:
09/02/2014
Application #:
13723838
Filing Dt:
12/21/2012
Publication #:
US20130112982
Pub Dt:
05/09/2013
Title:
METHOD FOR FORMING NANOFIN TRANSISTORS
45
Patent #:
8552526
Issue Dt:
10/08/2013
Application #:
13725384
Filing Dt:
12/21/2012
Publication #:
US20130113069
Pub Dt:
05/09/2013
Title:
SELF-ALIGNED SEMICONDUCTOR TRENCH STRUCTURES
46
Patent #:
8674512
Issue Dt:
03/18/2014
Application #:
13725695
Filing Dt:
12/21/2012
Publication #:
US20130105976
Pub Dt:
05/02/2013
Title:
METHOD TO ALIGN MASK PATTERNS
47
Patent #:
9184159
Issue Dt:
11/10/2015
Application #:
13725915
Filing Dt:
12/21/2012
Publication #:
US20130105937
Pub Dt:
05/02/2013
Title:
SIMPLIFIED PITCH DOUBLING PROCESS FLOW
48
Patent #:
8652934
Issue Dt:
02/18/2014
Application #:
13726891
Filing Dt:
12/26/2012
Title:
SEMICONDUCTOR SUBSTRATE FOR PHOTONIC AND ELECTRONIC STRUCTURES AND METHOD OF MANUFACTURE
49
Patent #:
8656069
Issue Dt:
02/18/2014
Application #:
13728161
Filing Dt:
12/27/2012
Publication #:
US20130151887
Pub Dt:
06/13/2013
Title:
PERIPHERAL INTERFACE ALERT MESSAGE FOR DOWNSTREAM DEVICE
50
Patent #:
8927332
Issue Dt:
01/06/2015
Application #:
13728456
Filing Dt:
12/27/2012
Publication #:
US20130115734
Pub Dt:
05/09/2013
Title:
METHODS OF MANUFACTURING SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING FACE-TO-FACE SEMICONDUCTOR DICE
51
Patent #:
8555127
Issue Dt:
10/08/2013
Application #:
13731658
Filing Dt:
12/31/2012
Publication #:
US20130117628
Pub Dt:
05/09/2013
Title:
SELF-TIMED ERROR CORRECTING CODE EVALUATION SYSTEM AND METHOD
52
Patent #:
9341787
Issue Dt:
05/17/2016
Application #:
13732557
Filing Dt:
01/02/2013
Publication #:
US20140185983
Pub Dt:
07/03/2014
Title:
APPARATUS PROVIDING SIMPLIFIED ALIGNMENT OF OPTICAL FIBER IN PHOTONIC INTEGRATED CIRCUITS
53
Patent #:
9034752
Issue Dt:
05/19/2015
Application #:
13733508
Filing Dt:
01/03/2013
Publication #:
US20140183740
Pub Dt:
07/03/2014
Title:
METHODS OF EXPOSING CONDUCTIVE VIAS OF SEMICONDUCTOR DEVICES AND ASSOCIATED STRUCTURES
54
Patent #:
9210347
Issue Dt:
12/08/2015
Application #:
13733676
Filing Dt:
01/03/2013
Publication #:
US20130128089
Pub Dt:
05/23/2013
Title:
VERTICAL 4-WAY SHARED PIXEL IN A SINGLE COLUMN WITH INTERNAL RESET AND NO ROW SELECT
55
Patent #:
8728932
Issue Dt:
05/20/2014
Application #:
13734476
Filing Dt:
01/04/2013
Publication #:
US20130149861
Pub Dt:
06/13/2013
Title:
CONTACT FOR MEMORY CELL
56
Patent #:
8502579
Issue Dt:
08/06/2013
Application #:
13734745
Filing Dt:
01/04/2013
Publication #:
US20130169335
Pub Dt:
07/04/2013
Title:
DELAY LINES, METHODS FOR DELAYING A SIGNAL, AND DELAY LOCK LOOPS
57
Patent #:
8839416
Issue Dt:
09/16/2014
Application #:
13735553
Filing Dt:
01/07/2013
Publication #:
US20130185790
Pub Dt:
07/18/2013
Title:
SYSTEM AND METHOD FOR CONTROLLING USER ACCESS TO AN ELECTRONIC DEVICE
58
Patent #:
8694860
Issue Dt:
04/08/2014
Application #:
13735789
Filing Dt:
01/07/2013
Publication #:
US20130124946
Pub Dt:
05/16/2013
Title:
SYSTEM AND METHOD FOR DATA READ OF A SYNCHRONOUS SERIAL INTERFACE NAND
59
Patent #:
9875794
Issue Dt:
01/23/2018
Application #:
13735791
Filing Dt:
01/07/2013
Publication #:
US20130155767
Pub Dt:
06/20/2013
Title:
SENSING PHASE-CHANGE MEMORY/TEST CELLS FOR DETERMINING WHETHER A CELL RESISTANCE HAS CHANGED DUE TO THERMAL EXPOSURE
60
Patent #:
9105737
Issue Dt:
08/11/2015
Application #:
13735908
Filing Dt:
01/07/2013
Publication #:
US20140191306
Pub Dt:
07/10/2014
Title:
SEMICONDUCTOR CONSTRUCTIONS
61
Patent #:
8582357
Issue Dt:
11/12/2013
Application #:
13736179
Filing Dt:
01/08/2013
Publication #:
US20130121071
Pub Dt:
05/16/2013
Title:
REDUCING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE
62
Patent #:
8928376
Issue Dt:
01/06/2015
Application #:
13736857
Filing Dt:
01/08/2013
Publication #:
US20130127506
Pub Dt:
05/23/2013
Title:
SYSTEM AND METHOD FOR AN ACCURACY-ENHANCED DLL DURING A MEASURE INITIALIZATION MODE
63
Patent #:
8853769
Issue Dt:
10/07/2014
Application #:
13738147
Filing Dt:
01/10/2013
Publication #:
US20140191340
Pub Dt:
07/10/2014
Title:
TRANSISTORS AND SEMICONDUCTOR CONSTRUCTIONS
64
Patent #:
8921821
Issue Dt:
12/30/2014
Application #:
13738201
Filing Dt:
01/10/2013
Publication #:
US20140191182
Pub Dt:
07/10/2014
Title:
MEMORY CELLS
65
Patent #:
8633529
Issue Dt:
01/21/2014
Application #:
13738260
Filing Dt:
01/10/2013
Publication #:
US20130140618
Pub Dt:
06/06/2013
Title:
VERTICAL TRANSISTORS
66
Patent #:
8877624
Issue Dt:
11/04/2014
Application #:
13738457
Filing Dt:
01/10/2013
Publication #:
US20140193969
Pub Dt:
07/10/2014
Title:
SEMICONDUCTOR STRUCTURES
67
Patent #:
8906743
Issue Dt:
12/09/2014
Application #:
13739331
Filing Dt:
01/11/2013
Publication #:
US20140197526
Pub Dt:
07/17/2014
Title:
SEMICONDUCTOR DEVICE WITH MOLDED CASING AND PACKAGE INTERCONNECT EXTENDING THERETHROUGH, AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS
68
Patent #:
8988926
Issue Dt:
03/24/2015
Application #:
13739387
Filing Dt:
01/11/2013
Publication #:
US20140198565
Pub Dt:
07/17/2014
Title:
METHOD, SYSTEM AND DEVICE FOR PHASE CHANGE MEMORY WITH SHUNT
69
Patent #:
9329990
Issue Dt:
05/03/2016
Application #:
13739453
Filing Dt:
01/11/2013
Publication #:
US20140201473
Pub Dt:
07/17/2014
Title:
HOST CONTROLLED ENABLEMENT OF AUTOMATIC BACKGROUND OPERATIONS IN A MEMORY DEVICE
70
Patent #:
8940592
Issue Dt:
01/27/2015
Application #:
13739679
Filing Dt:
01/11/2013
Publication #:
US20140197416
Pub Dt:
07/17/2014
Title:
MEMORIES AND METHODS OF FORMING THIN-FILM TRANSISTORS USING HYDROGEN PLASMA DOPING
71
Patent #:
8859168
Issue Dt:
10/14/2014
Application #:
13740632
Filing Dt:
01/14/2013
Publication #:
US20130130163
Pub Dt:
05/23/2013
Title:
MASKS FOR MICROLITHOGRAPHY AND METHODS OF MAKING AND USING SUCH MASKS
72
Patent #:
8713385
Issue Dt:
04/29/2014
Application #:
13741148
Filing Dt:
01/14/2013
Publication #:
US20130132805
Pub Dt:
05/23/2013
Title:
ERROR SCANNING IN FLASH MEMORY
73
Patent #:
8987885
Issue Dt:
03/24/2015
Application #:
13741789
Filing Dt:
01/15/2013
Publication #:
US20130193581
Pub Dt:
08/01/2013
Title:
PACKAGED MICRODEVICES AND METHODS FOR MANUFACTURING PACKAGED MICRODEVICES
74
Patent #:
9065654
Issue Dt:
06/23/2015
Application #:
13741964
Filing Dt:
01/15/2013
Publication #:
US20130142326
Pub Dt:
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Title:
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Title:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Pub Dt:
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Title:
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Title:
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Title:
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Pub Dt:
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Title:
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Title:
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Title:
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Title:
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Pub Dt:
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Title:
MEMORY CONTROLLER SELF-CALIBRATION FOR REMOVING SYSTEMIC INFLUENCE
Assignor
1
JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Exec Dt:
07/31/2019
Assignees
1
MICRON TECHNOLOGY, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
2
MICRON SEMICONDUCTOR PRODUCTS, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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