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Reel/Frame:051028/0001   Pages: 834
Recorded: 11/12/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
01/30/2018
Application #:
15393719
Filing Dt:
12/29/2016
Publication #:
Pub Dt:
04/20/2017
Title:
APPARATUSES AND METHODS TO CONTROL BODY POTENTIAL IN 3D NON-VOLATILE MEMORY OPERATIONS
2
Patent #:
Issue Dt:
01/01/2019
Application #:
15393919
Filing Dt:
12/29/2016
Publication #:
Pub Dt:
04/20/2017
Title:
PERSISTENT CONTENT IN NONVOLATILE MEMORY
3
Patent #:
Issue Dt:
10/22/2019
Application #:
15395169
Filing Dt:
12/30/2016
Publication #:
Pub Dt:
04/20/2017
Title:
EXTERNAL GETTERING METHOD AND DEVICE
4
Patent #:
Issue Dt:
08/27/2019
Application #:
15395602
Filing Dt:
12/30/2016
Publication #:
Pub Dt:
06/15/2017
Title:
CONDITIONAL OPERATION IN AN INTERNAL PROCESSOR OF A MEMORY DEVICE
5
Patent #:
Issue Dt:
09/19/2017
Application #:
15396259
Filing Dt:
12/30/2016
Title:
TIMING BASED ARBITER SYSTEMS AND CIRCUITS FOR ZQ CALIBRATION
6
Patent #:
Issue Dt:
08/13/2019
Application #:
15396817
Filing Dt:
01/03/2017
Publication #:
Pub Dt:
07/05/2018
Title:
SEMICONDUCTOR PACKAGE WITH EMBEDDED MIM CAPACITOR, AND METHOD OF FABRICATING THEREOF
7
Patent #:
NONE
Issue Dt:
Application #:
15396828
Filing Dt:
01/03/2017
Publication #:
Pub Dt:
07/05/2018
Title:
MIM CAPACITOR WITH ENHANCED CAPACITANCE
8
Patent #:
Issue Dt:
03/27/2018
Application #:
15397919
Filing Dt:
01/04/2017
Publication #:
Pub Dt:
04/27/2017
Title:
Stack Of Horizontally Extending And Vertically Overlapping Features, Methods Of Forming Circuitry Components, And Methods Of Forming An Array Of Memory Cells
9
Patent #:
Issue Dt:
12/11/2018
Application #:
15398303
Filing Dt:
01/04/2017
Publication #:
Pub Dt:
04/27/2017
Title:
Vertical Ferroelectric Field Effect Transistor Constructions, Constructions Comprising A Pair Of Vertical Ferroelectric Field Effect Transistors, Vertical Strings Of Ferroelectric Field Effect Transistors, And Vertical Strings Of Laterally Opposing Pairs Of Vertical Ferroelectric Field Effect Transistors
10
Patent #:
Issue Dt:
12/18/2018
Application #:
15398475
Filing Dt:
01/04/2017
Publication #:
Pub Dt:
06/29/2017
Title:
CROSS-POINT MEMORY AND METHODS FOR FABRICATION OF SAME
11
Patent #:
Issue Dt:
07/24/2018
Application #:
15399315
Filing Dt:
01/05/2017
Publication #:
Pub Dt:
04/27/2017
Title:
APPARATUSES AND METHODS FOR STORING A DATA VALUE IN MULTIPLE COLUMNS
12
Patent #:
Issue Dt:
10/15/2019
Application #:
15399372
Filing Dt:
01/05/2017
Publication #:
Pub Dt:
04/27/2017
Title:
OHMIC CONTACTS FOR SEMICONDUCTOR STRUCTURES
13
Patent #:
Issue Dt:
07/03/2018
Application #:
15399509
Filing Dt:
01/05/2017
Publication #:
Pub Dt:
07/05/2018
Title:
Magnetic Memory Device with Grid-Shaped Common Source Plate, System, and Method of Fabrication
14
Patent #:
Issue Dt:
08/28/2018
Application #:
15399530
Filing Dt:
01/05/2017
Publication #:
Pub Dt:
06/29/2017
Title:
APPARATUSES AND METHODS OF READING MEMORY CELLS
15
Patent #:
Issue Dt:
02/13/2018
Application #:
15399572
Filing Dt:
01/05/2017
Publication #:
Pub Dt:
04/27/2017
Title:
SEMICONDUCTOR DEVICE AND ERROR CORRECTION METHOD
16
Patent #:
Issue Dt:
02/06/2018
Application #:
15399664
Filing Dt:
01/05/2017
Title:
APPARATUS AND METHODS FOR VIA CONNECTION WITH REDUCED VIA CURRENTS
17
Patent #:
Issue Dt:
08/14/2018
Application #:
15399779
Filing Dt:
01/06/2017
Publication #:
Pub Dt:
05/04/2017
Title:
METHODS OF OPERATING STORAGE SYSTEMS INCLUDING ENCRYPTING A KEY SALT
18
Patent #:
Issue Dt:
10/31/2017
Application #:
15400653
Filing Dt:
01/06/2017
Title:
APPARATUSES AND METHODS FOR A MEMORY DEVICE WITH DUAL COMMON DATA I/O LINES
19
Patent #:
Issue Dt:
07/10/2018
Application #:
15400886
Filing Dt:
01/06/2017
Publication #:
Pub Dt:
07/12/2018
Title:
INTEGRATED MEMORY
20
Patent #:
Issue Dt:
08/28/2018
Application #:
15401372
Filing Dt:
01/09/2017
Publication #:
Pub Dt:
07/12/2018
Title:
Methods Of Forming An Array Of Capacitors, Methods Of Forming An Array Of Memory Cells Individually Comprising A Capacitor And A Transistor, Arrays Of Capacitors, And Arrays Of Memory Cells Individually Comprising A Capacitor And A Transistor
21
Patent #:
Issue Dt:
07/28/2020
Application #:
15401420
Filing Dt:
01/09/2017
Publication #:
Pub Dt:
07/12/2018
Title:
ERROR CORRECTION TO REDUCE A FAILURE IN TIME RATE
22
Patent #:
Issue Dt:
02/20/2018
Application #:
15401762
Filing Dt:
01/09/2017
Publication #:
Pub Dt:
04/27/2017
Title:
SEMICONDUCTOR DEVICE PACKAGES WITH IMPROVED THERMAL MANAGEMENT AND RELATED METHODS
23
Patent #:
Issue Dt:
04/05/2022
Application #:
15401888
Filing Dt:
01/09/2017
Publication #:
Pub Dt:
04/27/2017
Title:
EFFICIENT OPERATIONS OF COMPONENTS IN A WIRELESS COMMUNICATIONS DEVICE
24
Patent #:
Issue Dt:
01/08/2019
Application #:
15401929
Filing Dt:
01/09/2017
Publication #:
Pub Dt:
05/04/2017
Title:
SELF-MEASURING NONVOLATILE MEMORY DEVICE SYSTEMS AND METHODS
25
Patent #:
Issue Dt:
06/05/2018
Application #:
15401945
Filing Dt:
01/09/2017
Publication #:
Pub Dt:
04/27/2017
Title:
STACKED MEMORY DEVICES, SYSTEMS, AND METHODS
26
Patent #:
Issue Dt:
08/14/2018
Application #:
15402014
Filing Dt:
01/09/2017
Publication #:
Pub Dt:
04/27/2017
Title:
SOLID STATE LIGHTING DEVICE WITH DIFFERENT ILLUMINATION PARAMETERS AT DIFFERENT REGIONS OF AN EMITTER ARRAY
27
Patent #:
Issue Dt:
01/16/2018
Application #:
15402055
Filing Dt:
01/09/2017
Publication #:
Pub Dt:
06/29/2017
Title:
COMPUTERIZED APPARATUS WITH A HIGH SPEED DATA BUS
28
Patent #:
Issue Dt:
12/05/2017
Application #:
15402463
Filing Dt:
01/10/2017
Title:
Arrays Of Memory Cells Individually Comprising A Capacitor And An Elevationally-Extending Transistor, Methods Of Forming A Tier Of An Array Of Memory Cells, And Methods Of Forming An Array Of Memory Cells Individually Comprising A Capacitor And An Elevationally-Extending Transistor
29
Patent #:
Issue Dt:
04/03/2018
Application #:
15402679
Filing Dt:
01/10/2017
Title:
METHODS OF FORMING AN ARRAY COMPRISING PAIRS OF VERTICALLY OPPOSED CAPACITORS AND ARRAYS COMPRISING PAIRS OF VERTICALLY OPPOSED CAPACITORS
30
Patent #:
Issue Dt:
10/22/2019
Application #:
15404407
Filing Dt:
01/12/2017
Publication #:
Pub Dt:
07/12/2018
Title:
DIRECTED SANITIZATION OF MEMORY
31
Patent #:
Issue Dt:
08/27/2019
Application #:
15404576
Filing Dt:
01/12/2017
Publication #:
Pub Dt:
07/12/2018
Title:
Memory Cells and Methods of Forming a Capacitor
32
Patent #:
Issue Dt:
12/12/2017
Application #:
15404995
Filing Dt:
01/12/2017
Title:
Memory Cell, An Array Of Memory Cells Individually Comprising A Capacitor And A Transistor With The Array Comprising Rows Of Access Lines And Columns Of Digit Lines, A 2T-1C Memory Cell, And Methods Of Forming An Array Of Capacitors And Access Transistors There-Above
33
Patent #:
Issue Dt:
09/26/2017
Application #:
15405141
Filing Dt:
01/12/2017
Title:
Integrated Structures
34
Patent #:
Issue Dt:
09/03/2019
Application #:
15405711
Filing Dt:
01/13/2017
Publication #:
Pub Dt:
07/19/2018
Title:
INTERCONNECT STRUCTURE WITH NITRIDED BARRIER
35
Patent #:
Issue Dt:
11/06/2018
Application #:
15405839
Filing Dt:
01/13/2017
Publication #:
Pub Dt:
05/04/2017
Title:
MEMORY BANK SIGNAL COUPLING BUFFER AND METHOD
36
Patent #:
Issue Dt:
11/06/2018
Application #:
15407205
Filing Dt:
01/16/2017
Publication #:
Pub Dt:
05/04/2017
Title:
SEMICONDUCTOR CONSTRUCTIONS
37
Patent #:
Issue Dt:
11/20/2018
Application #:
15408272
Filing Dt:
01/17/2017
Publication #:
Pub Dt:
07/19/2018
Title:
APPARATUSES AND METHODS FOR HIGH SPEED WRITING TEST MODE FOR MEMORIES
38
Patent #:
Issue Dt:
02/12/2019
Application #:
15408671
Filing Dt:
01/18/2017
Publication #:
Pub Dt:
07/19/2018
Title:
MEMORY DEVICE INCLUDING MIXED NON-VOLATILE MEMORY CELL TYPES
39
Patent #:
Issue Dt:
03/17/2020
Application #:
15409351
Filing Dt:
01/18/2017
Publication #:
Pub Dt:
04/26/2018
Title:
CUSTOM COMPUTE CORES IN INTEGRATED CIRCUIT DEVICES
40
Patent #:
Issue Dt:
11/13/2018
Application #:
15409412
Filing Dt:
01/18/2017
Publication #:
Pub Dt:
07/19/2018
Title:
Memory Cells, Integrated Structures and Memory Arrays
41
Patent #:
Issue Dt:
10/03/2017
Application #:
15410199
Filing Dt:
01/19/2017
Publication #:
Pub Dt:
05/11/2017
Title:
COMPARISON OPERATIONS IN MEMORY
42
Patent #:
Issue Dt:
01/01/2019
Application #:
15410469
Filing Dt:
01/19/2017
Publication #:
Pub Dt:
05/11/2017
Title:
MEMORY INCLUDING BLOCKING DIELECTRIC IN ETCH STOP TIER
43
Patent #:
Issue Dt:
11/14/2017
Application #:
15410602
Filing Dt:
01/19/2017
Title:
APPARATUSES AND METHODS FOR PROVIDING INTERNAL CLOCK SIGNALS OF DIFFERENT CLOCK FREQUENCIES IN A MEMORY DEVICE
44
Patent #:
Issue Dt:
01/30/2018
Application #:
15411886
Filing Dt:
01/20/2017
Publication #:
Pub Dt:
05/11/2017
Title:
Transistors, Memory Cells and Semiconductor Constructions
45
Patent #:
Issue Dt:
02/26/2019
Application #:
15412148
Filing Dt:
01/23/2017
Publication #:
Pub Dt:
05/11/2017
Title:
AUTORECOVERY AFTER MANUFACTURING/SYSTEM INTEGRATION
46
Patent #:
Issue Dt:
11/12/2019
Application #:
15412826
Filing Dt:
01/23/2017
Publication #:
Pub Dt:
05/11/2017
Title:
APPARATUSES AND METHODS FOR ASYMMETRIC BI-DIRECTIONAL SIGNALING INCORPORATING MULTI-LEVEL ENCODING
47
Patent #:
Issue Dt:
11/13/2018
Application #:
15413732
Filing Dt:
01/24/2017
Publication #:
Pub Dt:
05/11/2017
Title:
INTERCONNECT SYSTEMS AND METHODS USING HYBRID MEMORY CUBE LINKS TO SEND PACKETIZED DATA OVER DIFFERENT ENDPOINTS OF A DATA HANDLING DEVICE
48
Patent #:
Issue Dt:
06/23/2020
Application #:
15414144
Filing Dt:
01/24/2017
Publication #:
Pub Dt:
05/11/2017
Title:
SELF-ALIGNED CROSS-POINT PHASE CHANGE MEMORY-SWITCH ARRAY
49
Patent #:
Issue Dt:
09/10/2019
Application #:
15414699
Filing Dt:
01/25/2017
Publication #:
Pub Dt:
05/11/2017
Title:
MEMORY DEVICES HAVING DIFFERENTLY CONFIGURED BLOCKS OF MEMORY CELLS
50
Patent #:
Issue Dt:
04/10/2018
Application #:
15414953
Filing Dt:
01/25/2017
Publication #:
Pub Dt:
05/11/2017
Title:
SETTING A DEFAULT READ SIGNAL BASED ON ERROR CORRECTION
51
Patent #:
Issue Dt:
07/31/2018
Application #:
15415018
Filing Dt:
01/25/2017
Publication #:
Pub Dt:
05/11/2017
Title:
SEMICONDUCTOR DEVICE WITH MODIFIED CURRENT DISTRIBUTION
52
Patent #:
Issue Dt:
09/08/2020
Application #:
15415611
Filing Dt:
01/25/2017
Publication #:
Pub Dt:
05/11/2017
Title:
FIXED VOLTAGE SENSING IN A MEMORY DEVICE
53
Patent #:
Issue Dt:
10/30/2018
Application #:
15415655
Filing Dt:
01/25/2017
Publication #:
Pub Dt:
05/11/2017
Title:
FREQUENCY SYNTHESIS FOR MEMORY INPUT-OUTPUT OPERATIONS
54
Patent #:
Issue Dt:
03/13/2018
Application #:
15416870
Filing Dt:
01/26/2017
Title:
MEMORY DEVICE INCLUDING MULTIPLE GATE-INDUCED DRAIN LEAKAGE CURRENT GENERATOR CIRCUITS
55
Patent #:
Issue Dt:
03/06/2018
Application #:
15417607
Filing Dt:
01/27/2017
Publication #:
Pub Dt:
05/18/2017
Title:
METHOD FOR CONTROLLING USER ACCESS TO AN ELECTRONIC DEVICE
56
Patent #:
Issue Dt:
06/12/2018
Application #:
15418568
Filing Dt:
01/27/2017
Title:
FORMING CONDUCTIVE PLUGS FOR MEMORY DEVICE
57
Patent #:
Issue Dt:
07/30/2019
Application #:
15418586
Filing Dt:
01/27/2017
Publication #:
Pub Dt:
08/02/2018
Title:
METHODS AND APPARATUSES FOR DIFFERENTIAL SIGNAL TERMINATION
58
Patent #:
Issue Dt:
11/26/2019
Application #:
15419590
Filing Dt:
01/30/2017
Publication #:
Pub Dt:
08/02/2018
Title:
APPARATUSES AND METHODS FOR DISTRIBUTING ROW HAMMER REFRESH EVENTS ACROSS A MEMORY DEVICE
59
Patent #:
Issue Dt:
07/31/2018
Application #:
15419813
Filing Dt:
01/30/2017
Publication #:
Pub Dt:
08/02/2018
Title:
INTEGRATED STRUCTURES AND NAND MEMORY ARRAYS
60
Patent #:
Issue Dt:
12/11/2018
Application #:
15419913
Filing Dt:
01/30/2017
Publication #:
Pub Dt:
05/18/2017
Title:
MICROELECTRONIC DEVICE PACKAGES, STACKED MICROELECTRONIC DEVICE PACKAGES, AND METHODS FOR MANUFACTURING MICROELECTRONIC DEVICES
61
Patent #:
Issue Dt:
01/16/2018
Application #:
15421855
Filing Dt:
02/01/2017
Publication #:
Pub Dt:
05/25/2017
Title:
MEMORY ARRAYS AND METHODS OF FORMING MEMORY ARRAYS
62
Patent #:
Issue Dt:
08/28/2018
Application #:
15422230
Filing Dt:
02/01/2017
Publication #:
Pub Dt:
05/18/2017
Title:
PROXIMITY COUPLING OF INTERCONNECT PACKAGING SYSTEMS AND METHODS
63
Patent #:
Issue Dt:
10/01/2019
Application #:
15422307
Filing Dt:
02/01/2017
Publication #:
Pub Dt:
08/02/2018
Title:
NAND MEMORY ARRAYS
64
Patent #:
Issue Dt:
09/25/2018
Application #:
15422335
Filing Dt:
02/01/2017
Publication #:
Pub Dt:
08/02/2018
Title:
Memory Arrays, and Methods of Forming Memory Arrays
65
Patent #:
Issue Dt:
12/19/2017
Application #:
15423646
Filing Dt:
02/03/2017
Publication #:
Pub Dt:
05/25/2017
Title:
MULTI-BIT FERROELECTRIC MEMORY DEVICE AND METHODS OF FORMING THE SAME
66
Patent #:
Issue Dt:
08/04/2020
Application #:
15423965
Filing Dt:
02/03/2017
Publication #:
Pub Dt:
05/25/2017
Title:
MEMORY CELL STRUCTURES
67
Patent #:
Issue Dt:
02/27/2018
Application #:
15425956
Filing Dt:
02/06/2017
Publication #:
Pub Dt:
05/25/2017
Title:
INTERCONNECT STRUCTURES WITH INTERMETALLIC PALLADIUM JOINTS AND ASSOCIATED SYSTEMS AND METHODS
68
Patent #:
Issue Dt:
09/20/2022
Application #:
15426317
Filing Dt:
02/07/2017
Publication #:
Pub Dt:
05/25/2017
Title:
METHODS AND SYSTEMS FOR IMAGING AND CUTTING SEMICONDUCTOR WAFERS AND OTHER SEMICONDUCTOR WORKPIECES
69
Patent #:
Issue Dt:
09/17/2019
Application #:
15426871
Filing Dt:
02/07/2017
Publication #:
Pub Dt:
08/09/2018
Title:
PRE-WRITING MEMORY CELLS OF AN ARRAY
70
Patent #:
Issue Dt:
06/25/2019
Application #:
15426897
Filing Dt:
02/07/2017
Publication #:
Pub Dt:
05/25/2017
Title:
VERTICAL SOLID-STATE TRANSDUCERS HAVING BACKSIDE TERMINALS AND ASSOCIATED SYSTEMS AND METHODS
71
Patent #:
Issue Dt:
09/11/2018
Application #:
15427600
Filing Dt:
02/08/2017
Publication #:
Pub Dt:
05/25/2017
Title:
Methods Of Forming A Semiconductor Device Comprising First And Second Nitride Layers
72
Patent #:
Issue Dt:
08/13/2019
Application #:
15428124
Filing Dt:
02/08/2017
Publication #:
Pub Dt:
08/09/2018
Title:
SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME
73
Patent #:
Issue Dt:
07/28/2020
Application #:
15428877
Filing Dt:
02/09/2017
Publication #:
Pub Dt:
08/09/2018
Title:
KVS TREE
74
Patent #:
Issue Dt:
07/07/2020
Application #:
15428912
Filing Dt:
02/09/2017
Publication #:
Pub Dt:
08/09/2018
Title:
MERGE TREE GARBAGE METRICS
75
Patent #:
Issue Dt:
07/07/2020
Application #:
15428951
Filing Dt:
02/09/2017
Publication #:
Pub Dt:
08/09/2018
Title:
MERGE TREE MODIFICATIONS FOR MAINTENANCE OPERATIONS
76
Patent #:
Issue Dt:
07/21/2020
Application #:
15428976
Filing Dt:
02/09/2017
Publication #:
Pub Dt:
08/09/2018
Title:
STREAM SELECTION FOR MULTI-STREAM STORAGE DEVICES
77
Patent #:
Issue Dt:
05/29/2018
Application #:
15429021
Filing Dt:
02/09/2017
Publication #:
Pub Dt:
10/19/2017
Title:
APPARATUSES AND METHODS FOR CONTROLLING WORDLINES AND SENSE AMPLIFIERS
78
Patent #:
Issue Dt:
07/17/2018
Application #:
15431158
Filing Dt:
02/13/2017
Publication #:
Pub Dt:
06/01/2017
Title:
RECESSED TRANSISTORS CONTAINING FERROELECTRIC MATERIAL
79
Patent #:
Issue Dt:
07/18/2017
Application #:
15431364
Filing Dt:
02/13/2017
Publication #:
Pub Dt:
06/01/2017
Title:
APPARATUSES AND METHODS FOR PROVIDING SET AND RESET VOLTAGES AT THE SAME TIME
80
Patent #:
Issue Dt:
06/26/2018
Application #:
15431383
Filing Dt:
02/13/2017
Publication #:
Pub Dt:
06/01/2017
Title:
APPARATUS HAVING DICE TO PERORM REFRESH OPERATIONS
81
Patent #:
Issue Dt:
07/16/2019
Application #:
15431421
Filing Dt:
02/13/2017
Publication #:
Pub Dt:
06/22/2017
Title:
ASYMMETRIC CHIP-TO-CHIP INTERCONNECT
82
Patent #:
Issue Dt:
02/20/2018
Application #:
15431451
Filing Dt:
02/13/2017
Publication #:
Pub Dt:
06/08/2017
Title:
PHASE INTERPOLATORS AND PUSH-PULL BUFFERS
83
Patent #:
Issue Dt:
05/15/2018
Application #:
15431457
Filing Dt:
02/13/2017
Publication #:
Pub Dt:
06/08/2017
Title:
CONTROLLER TO MANAGE NAND MEMORIES
84
Patent #:
Issue Dt:
11/13/2018
Application #:
15431649
Filing Dt:
02/13/2017
Publication #:
Pub Dt:
06/15/2017
Title:
MEMORY DEVICES WITH CONTROLLERS UNDER MEMORY PACKAGES AND ASSOCIATED SYSTEMS AND METHODS
85
Patent #:
Issue Dt:
06/26/2018
Application #:
15432510
Filing Dt:
02/14/2017
Publication #:
Pub Dt:
06/01/2017
Title:
STORAGE DEVICES CONFIGURED TO GENERATE LINKED LISTS
86
Patent #:
Issue Dt:
03/06/2018
Application #:
15432864
Filing Dt:
02/14/2017
Title:
INPUT BUFFER CIRCUIT
87
Patent #:
Issue Dt:
08/14/2018
Application #:
15433881
Filing Dt:
02/15/2017
Publication #:
Pub Dt:
08/17/2017
Title:
MEMORY CELL ARCHITECTURE FOR MULTILEVEL CELL PROGRAMMING
88
Patent #:
Issue Dt:
11/20/2018
Application #:
15434210
Filing Dt:
02/16/2017
Publication #:
Pub Dt:
06/08/2017
Title:
ERROR CORRECTION METHODS AND APPARATUSES USING FIRST AND SECOND DECODERS
89
Patent #:
Issue Dt:
07/09/2019
Application #:
15434395
Filing Dt:
02/16/2017
Publication #:
Pub Dt:
08/16/2018
Title:
EFFICIENT UTILIZATION OF MEMORY DIE AREA
90
Patent #:
Issue Dt:
10/17/2017
Application #:
15434401
Filing Dt:
02/16/2017
Title:
ACTIVE BOUNDARY QUILT ARCHITECTURE MEMORY
91
Patent #:
Issue Dt:
01/28/2020
Application #:
15434503
Filing Dt:
02/16/2017
Publication #:
Pub Dt:
06/08/2017
Title:
SOLID STATE DRIVE CONTROLLER
92
Patent #:
Issue Dt:
02/27/2018
Application #:
15434748
Filing Dt:
02/16/2017
Publication #:
Pub Dt:
06/08/2017
Title:
PROVIDING POWER AVAILABILITY INFORMATION TO MEMORY
93
Patent #:
Issue Dt:
08/11/2020
Application #:
15436249
Filing Dt:
02/17/2017
Publication #:
Pub Dt:
06/08/2017
Title:
REFRESH ADDRESS CONTROLLING SCHEME BASED ON REFRESH COUNTER AND MASK CIRCUIT
94
Patent #:
Issue Dt:
11/20/2018
Application #:
15436289
Filing Dt:
02/17/2017
Publication #:
Pub Dt:
06/08/2017
Title:
APPARATUSES AND METHODS FOR REDUCING READ DISTURB
95
Patent #:
Issue Dt:
02/27/2018
Application #:
15436513
Filing Dt:
02/17/2017
Publication #:
Pub Dt:
06/08/2017
Title:
SYSTEMS, CIRCUITS, AND METHODS FOR CHARGE SHARING
96
Patent #:
Issue Dt:
07/10/2018
Application #:
15436570
Filing Dt:
02/17/2017
Publication #:
Pub Dt:
06/08/2017
Title:
APPARATUSES AND METHODS FOR PRE-FETCHING AND WRITE-BACK FOR A SEGMENTED CACHE MEMORY
97
Patent #:
Issue Dt:
08/15/2017
Application #:
15437141
Filing Dt:
02/20/2017
Publication #:
Pub Dt:
06/08/2017
Title:
APPARATUSES AND METHODS INCLUDING MEMORY ACCESS IN CROSS POINT MEMORY
98
Patent #:
Issue Dt:
09/25/2018
Application #:
15437308
Filing Dt:
02/20/2017
Publication #:
Pub Dt:
06/22/2017
Title:
METHOD AND APPARATUS PROVIDING MULTI-PLANED ARRAY MEMORY DEVICE
99
Patent #:
Issue Dt:
04/24/2018
Application #:
15437584
Filing Dt:
02/21/2017
Publication #:
Pub Dt:
06/22/2017
Title:
PROGRAMMING MEMORY CELLS TO BE PROGRAMMED TO DIFFERENT LEVELS TO AN INTERMEDIATE LEVEL FROM A LOWEST LEVEL
100
Patent #:
Issue Dt:
09/03/2019
Application #:
15437982
Filing Dt:
02/21/2017
Publication #:
Pub Dt:
08/23/2018
Title:
MEMORY ARRAY PAGE TABLE WALK
Assignor
1
Exec Dt:
07/31/2019
Assignees
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
2
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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