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Patent #:
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|
Issue Dt:
|
05/28/2019
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Application #:
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15633595
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Filing Dt:
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06/26/2017
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Publication #:
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|
Pub Dt:
|
12/27/2018
| | | | |
Title:
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APPARATUSES WITH COMPENSATOR LINES LAID OUT ALONG WORDLINES AND SPACED APART FROM WORDLINES BY DIELECTRIC, COMPENSATOR LINES BEING INDEPENDENTLY CONTROLLED RELATIVE TO THE WORDLINES PROVIDING INCREASED ON-CURRENT IN WORDLINES, REDUCED LEAKAGE IN COUPLED TRANSISTORS AND LONGER RETENTION TIME IN COUPLED MEMORY CELLS
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Patent #:
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|
Issue Dt:
|
04/03/2018
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Application #:
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15635071
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Filing Dt:
|
06/27/2017
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Publication #:
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|
Pub Dt:
|
10/26/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR DETECTING FREQUENCY RANGES CORRESPONDING TO SIGNAL DELAYS OF CONDUCTIVE VIAS
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Patent #:
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Issue Dt:
|
07/30/2019
|
Application #:
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15635814
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Filing Dt:
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06/28/2017
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Publication #:
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|
Pub Dt:
|
10/19/2017
| | | | |
Title:
|
RESISTANCE VARIABLE MEMORY SENSING USING PROGRAMMING SIGNALS
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Patent #:
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Issue Dt:
|
05/14/2019
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Application #:
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15635945
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Filing Dt:
|
06/28/2017
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Publication #:
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|
Pub Dt:
|
10/19/2017
| | | | |
Title:
|
MEMORY CELLS HAVING A NUMBER OF CONDUCTIVE DIFFUSION BARRIER MATERIALS AND MANUFACTURING METHODS
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Patent #:
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Issue Dt:
|
06/05/2018
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Application #:
|
15636344
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Filing Dt:
|
06/28/2017
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Publication #:
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Pub Dt:
|
12/07/2017
| | | | |
Title:
|
POWER REDUCTION FOR A SENSING OPERATION OF A MEMORY CELL
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Patent #:
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Issue Dt:
|
02/26/2019
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Application #:
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15636379
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Filing Dt:
|
06/28/2017
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Publication #:
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Pub Dt:
|
10/19/2017
| | | | |
Title:
|
SYSTEM AND METHOD FOR DUTY CYCLE CORRECTION
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|
Patent #:
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|
Issue Dt:
|
02/25/2020
|
Application #:
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15637327
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Filing Dt:
|
06/29/2017
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Publication #:
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|
Pub Dt:
|
10/19/2017
| | | | |
Title:
|
SYSTEMS AND METHODS FOR IMPROVING EFFICIENCIES OF A MEMORY SYSTEM
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|
Patent #:
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Issue Dt:
|
05/21/2019
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Application #:
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15637328
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Filing Dt:
|
06/29/2017
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Publication #:
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|
Pub Dt:
|
10/19/2017
| | | | |
Title:
|
MEMORY DEVICES INCLUDING CAPACITOR STRUCTURES HAVING IMPROVED AREA EFFICIENCY
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|
Patent #:
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Issue Dt:
|
03/27/2018
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Application #:
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15637961
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Filing Dt:
|
06/29/2017
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Publication #:
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|
Pub Dt:
|
10/19/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR PROVIDING DATA TO A CONFIGURABLE STORAGE AREA
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|
Patent #:
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Issue Dt:
|
04/24/2018
|
Application #:
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15638718
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Filing Dt:
|
06/30/2017
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Publication #:
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|
Pub Dt:
|
11/30/2017
| | | | |
Title:
|
METHODS OF OPERATING MEMORY UNDER ERASE CONDITIONS
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Patent #:
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Issue Dt:
|
05/01/2018
|
Application #:
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15640041
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Filing Dt:
|
06/30/2017
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Publication #:
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|
Pub Dt:
|
01/04/2018
| | | | |
Title:
|
APPARATUS PROVIDING SIMPLIFIED ALIGNMENT OF OPTICAL FIBER IN PHOTONIC INTEGRATED CIRCUITS
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|
Patent #:
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|
Issue Dt:
|
12/19/2017
|
Application #:
|
15640959
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Filing Dt:
|
07/03/2017
|
Publication #:
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|
Pub Dt:
|
11/02/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR MIXED CHARGE PUMPS WITH VOLTAGE REGULATOR CIRCUITS
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|
Patent #:
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|
Issue Dt:
|
08/07/2018
|
Application #:
|
15641020
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Filing Dt:
|
07/03/2017
|
Publication #:
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Pub Dt:
|
12/21/2017
| | | | |
Title:
|
ARRAY DATA BIT INVERSION
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|
Patent #:
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|
Issue Dt:
|
06/19/2018
|
Application #:
|
15641071
|
Filing Dt:
|
07/03/2017
|
Publication #:
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|
Pub Dt:
|
11/02/2017
| | | | |
Title:
|
METHOD OF FORMING CONDUCTIVE MATERIAL OF A BURIED TRANSISTOR GATE LINE AND METHOD OF FORMING A BURIED TRANSISTOR GATE LINE
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Patent #:
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Issue Dt:
|
03/26/2019
|
Application #:
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15641118
|
Filing Dt:
|
07/03/2017
|
Publication #:
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|
Pub Dt:
|
10/19/2017
| | | | |
Title:
|
SEMICONDUCTOR DEVICE SUPPRESSING BTI DETERIORATION
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|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
15641475
|
Filing Dt:
|
07/05/2017
|
Publication #:
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|
Pub Dt:
|
01/10/2019
| | | | |
Title:
|
MEMORY CELL STRUCTURES
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|
|
Patent #:
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|
Issue Dt:
|
05/21/2019
|
Application #:
|
15641478
|
Filing Dt:
|
07/05/2017
|
Publication #:
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|
Pub Dt:
|
01/10/2019
| | | | |
Title:
|
TRENCH ISOLATION INTERFACES
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|
Patent #:
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|
Issue Dt:
|
12/11/2018
|
Application #:
|
15641521
|
Filing Dt:
|
07/05/2017
|
Title:
|
MEMORY CELLS HAVING AN ACCESS GATE AND A CONTROL GATE AND DIELECTRIC STACKS ABOVE AND BELOW THE ACCESS GATE
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|
|
Patent #:
|
|
Issue Dt:
|
09/10/2019
|
Application #:
|
15641558
|
Filing Dt:
|
07/05/2017
|
Publication #:
|
|
Pub Dt:
|
01/10/2019
| | | | |
Title:
|
INTEGRATED COMPUTING STRUCTURES FORMED ON SILICON
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|
|
Patent #:
|
|
Issue Dt:
|
12/11/2018
|
Application #:
|
15641597
|
Filing Dt:
|
07/05/2017
|
Title:
|
MEMORY CELLS PROGRAMMED VIA MULTI-MECHANISM CHARGE TRANSPORTS
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|
|
Patent #:
|
|
Issue Dt:
|
12/11/2018
|
Application #:
|
15641628
|
Filing Dt:
|
07/05/2017
|
Title:
|
MEMORY CONFIGURATIONS
|
|
|
Patent #:
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|
Issue Dt:
|
04/16/2019
|
Application #:
|
15641691
|
Filing Dt:
|
07/05/2017
|
Publication #:
|
|
Pub Dt:
|
01/10/2019
| | | | |
Title:
|
MULTIFUNCTIONAL MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2019
|
Application #:
|
15641704
|
Filing Dt:
|
07/05/2017
|
Publication #:
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|
Pub Dt:
|
01/10/2019
| | | | |
Title:
|
MEMORY ARRAYS
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|
|
Patent #:
|
|
Issue Dt:
|
01/08/2019
|
Application #:
|
15641736
|
Filing Dt:
|
07/05/2017
|
Publication #:
|
|
Pub Dt:
|
01/10/2019
| | | | |
Title:
|
MULTIFUNCTIONAL MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2019
|
Application #:
|
15641783
|
Filing Dt:
|
07/05/2017
|
Publication #:
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|
Pub Dt:
|
01/10/2019
| | | | |
Title:
|
SELF-REFERENCE SENSING FOR MEMORY CELLS
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|
Patent #:
|
|
Issue Dt:
|
04/30/2019
|
Application #:
|
15641828
|
Filing Dt:
|
07/05/2017
|
Publication #:
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|
Pub Dt:
|
01/10/2019
| | | | |
Title:
|
GATED DIODE MEMORY CELLS
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|
|
Patent #:
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|
Issue Dt:
|
07/16/2019
|
Application #:
|
15642145
|
Filing Dt:
|
07/05/2017
|
Publication #:
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|
Pub Dt:
|
01/10/2019
| | | | |
Title:
|
APPARATUSES AND METHODS FOR CONTROLLING WORD LINES AND SENSE AMPLIFIERS
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|
Patent #:
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|
Issue Dt:
|
08/27/2019
|
Application #:
|
15642148
|
Filing Dt:
|
07/05/2017
|
Publication #:
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|
Pub Dt:
|
01/10/2019
| | | | |
Title:
|
Memory Cells Having a Controlled-Conductivity Region
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|
Patent #:
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|
Issue Dt:
|
09/17/2019
|
Application #:
|
15642410
|
Filing Dt:
|
07/06/2017
|
Publication #:
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|
Pub Dt:
|
10/19/2017
| | | | |
Title:
|
THRESHOLD VOLTAGE MARGIN ANALYSIS
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|
Patent #:
|
|
Issue Dt:
|
11/06/2018
|
Application #:
|
15642577
|
Filing Dt:
|
07/06/2017
|
Publication #:
|
|
Pub Dt:
|
10/26/2017
| | | | |
Title:
|
MAGNETIC STRUCTURES, SEMICONDUCTOR STRUCTURES, AND SEMICONDUCTOR DEVICES
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|
Patent #:
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|
Issue Dt:
|
01/29/2019
|
Application #:
|
15642673
|
Filing Dt:
|
07/06/2017
|
Publication #:
|
|
Pub Dt:
|
10/26/2017
| | | | |
Title:
|
MEMORY CELLS INCLUDING DIELECTRIC MATERIALS, MEMORY DEVICES INCLUDING THE MEMORY CELLS, AND METHODS OF FORMING SAME
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|
Patent #:
|
|
Issue Dt:
|
04/02/2019
|
Application #:
|
15642723
|
Filing Dt:
|
07/06/2017
|
Publication #:
|
|
Pub Dt:
|
10/19/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR PARITY DETERMINATION USING SENSING CIRCUITRY
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|
Patent #:
|
|
Issue Dt:
|
11/27/2018
|
Application #:
|
15642906
|
Filing Dt:
|
07/06/2017
|
Title:
|
INTERFACE COMPONENTS
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|
Patent #:
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|
Issue Dt:
|
12/25/2018
|
Application #:
|
15643361
|
Filing Dt:
|
07/06/2017
|
Publication #:
|
|
Pub Dt:
|
10/26/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR MEMORY OPERATIONS HAVING VARIABLE LATENCIES
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|
Patent #:
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|
Issue Dt:
|
08/20/2019
|
Application #:
|
15644297
|
Filing Dt:
|
07/07/2017
|
Publication #:
|
|
Pub Dt:
|
10/26/2017
| | | | |
Title:
|
MEMORY CELL MATERIALS AND SEMICONDUCTOR DEVICE STRUCTURES
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|
Patent #:
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|
Issue Dt:
|
10/30/2018
|
Application #:
|
15644383
|
Filing Dt:
|
07/07/2017
|
Title:
|
APPARATUSES COMPRISING SEMICONDUCTOR DIES IN FACE-TO-FACE ARRANGEMENTS
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|
Patent #:
|
|
Issue Dt:
|
12/25/2018
|
Application #:
|
15644401
|
Filing Dt:
|
07/07/2017
|
Publication #:
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|
Pub Dt:
|
10/26/2017
| | | | |
Title:
|
CIRCUITS, APPARATUSES, AND METHODS FOR FREQUENCY DIVISION
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|
Patent #:
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|
Issue Dt:
|
06/25/2019
|
Application #:
|
15645009
|
Filing Dt:
|
07/10/2017
|
Publication #:
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|
Pub Dt:
|
10/26/2017
| | | | |
Title:
|
METHODS OF OPERATING A MEMORY DEVICE COMPARING INPUT DATA TO DATA STORED IN MEMORY CELLS COUPLED TO A DATA LINE
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|
Patent #:
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|
Issue Dt:
|
09/25/2018
|
Application #:
|
15645106
|
Filing Dt:
|
07/10/2017
|
Publication #:
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|
Pub Dt:
|
12/21/2017
| | | | |
Title:
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MEMORY CELL IMPRINT AVOIDANCE
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|
Patent #:
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|
Issue Dt:
|
09/11/2018
|
Application #:
|
15645128
|
Filing Dt:
|
07/10/2017
|
Publication #:
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|
Pub Dt:
|
12/14/2017
| | | | |
Title:
|
BOOSTING A DIGIT LINE VOLTAGE FOR A WRITE OPERATION
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|
Patent #:
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|
Issue Dt:
|
04/03/2018
|
Application #:
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15645130
|
Filing Dt:
|
07/10/2017
|
Publication #:
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|
Pub Dt:
|
12/07/2017
| | | | |
Title:
|
ACCESSING MEMORY CELLS IN PARALLEL IN A CROSS-POINT ARRAY
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|
Patent #:
|
|
Issue Dt:
|
10/15/2019
|
Application #:
|
15645202
|
Filing Dt:
|
07/10/2017
|
Publication #:
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|
Pub Dt:
|
01/10/2019
| | | | |
Title:
|
NAND Memory Arrays, and Devices Comprising Semiconductor Channel Material and Nitrogen
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|
Patent #:
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|
Issue Dt:
|
06/05/2018
|
Application #:
|
15645238
|
Filing Dt:
|
07/10/2017
|
Publication #:
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|
Pub Dt:
|
10/26/2017
| | | | |
Title:
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SIMULATING ACCESS LINES
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|
|
Patent #:
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|
Issue Dt:
|
05/25/2021
|
Application #:
|
15645252
|
Filing Dt:
|
07/10/2017
|
Publication #:
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|
Pub Dt:
|
10/26/2017
| | | | |
Title:
|
OVERFLOW DETECTION AND CORRECTION IN STATE MACHINE ENGINES
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|
Patent #:
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|
Issue Dt:
|
03/03/2020
|
Application #:
|
15645635
|
Filing Dt:
|
07/10/2017
|
Publication #:
|
|
Pub Dt:
|
10/26/2017
| | | | |
Title:
|
SEMICONDUCTOR APPARATUS WITH MULTIPLE TIERS, AND METHODS
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|
Patent #:
|
|
Issue Dt:
|
05/12/2020
|
Application #:
|
15645694
|
Filing Dt:
|
07/10/2017
|
Publication #:
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|
Pub Dt:
|
01/10/2019
| | | | |
Title:
|
SECURE SNAPSHOT MANAGEMENT FOR DATA STORAGE DEVICES
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|
Patent #:
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|
Issue Dt:
|
12/12/2017
|
Application #:
|
15645894
|
Filing Dt:
|
07/10/2017
|
Publication #:
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|
Pub Dt:
|
11/02/2017
| | | | |
Title:
|
SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
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|
Patent #:
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|
Issue Dt:
|
09/04/2018
|
Application #:
|
15646874
|
Filing Dt:
|
07/11/2017
|
Publication #:
|
|
Pub Dt:
|
10/26/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR MEMORY OPERATIONS HAVING VARIABLE LATENCIES
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|
|
Patent #:
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|
Issue Dt:
|
09/24/2019
|
Application #:
|
15646903
|
Filing Dt:
|
07/11/2017
|
Publication #:
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|
Pub Dt:
|
10/26/2017
| | | | |
Title:
|
OPERATIONAL SIGNALS GENERATED FROM STORED CHARGE
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|
Patent #:
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|
Issue Dt:
|
12/24/2019
|
Application #:
|
15647676
|
Filing Dt:
|
07/12/2017
|
Publication #:
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|
Pub Dt:
|
01/17/2019
| | | | |
Title:
|
SYSTEM FOR OPTIMIZING ROUTING OF COMMUNICATION BETWEEN DEVICES AND RESOURCE REALLOCATION IN A NETWORK
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|
|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
15648026
|
Filing Dt:
|
07/12/2017
|
Publication #:
|
|
Pub Dt:
|
10/26/2017
| | | | |
Title:
|
METHOD FOR EMBEDDING SILICON DIE INTO A STACKED PACKAGE
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|
Patent #:
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|
Issue Dt:
|
02/26/2019
|
Application #:
|
15648326
|
Filing Dt:
|
07/12/2017
|
Publication #:
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|
Pub Dt:
|
11/02/2017
| | | | |
Title:
|
METHOD AND STRUCTURE PROVIDING OPTICAL ISOLATION OF A WAVEGUIDE ON A SILICON-ON-INSULATOR SUBSTRATE
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|
Patent #:
|
|
Issue Dt:
|
08/28/2018
|
Application #:
|
15649145
|
Filing Dt:
|
07/13/2017
|
Title:
|
HALF-FREQUENCY COMMAND PATH
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|
Patent #:
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|
Issue Dt:
|
05/04/2021
|
Application #:
|
15650194
|
Filing Dt:
|
07/14/2017
|
Publication #:
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|
Pub Dt:
|
01/17/2019
| | | | |
Title:
|
Semiconductor Constructions Having Fluorocarbon Material
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|
|
Patent #:
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|
Issue Dt:
|
10/16/2018
|
Application #:
|
15650274
|
Filing Dt:
|
07/14/2017
|
Title:
|
Methods of Forming Integrated Circuitry
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|
|
Patent #:
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|
Issue Dt:
|
09/24/2019
|
Application #:
|
15651186
|
Filing Dt:
|
07/17/2017
|
Publication #:
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|
Pub Dt:
|
11/02/2017
| | | | |
Title:
|
PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
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|
Patent #:
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|
Issue Dt:
|
05/14/2019
|
Application #:
|
15651464
|
Filing Dt:
|
07/17/2017
|
Publication #:
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|
Pub Dt:
|
11/02/2017
| | | | |
Title:
|
PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
|
|
|
Patent #:
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|
Issue Dt:
|
04/09/2019
|
Application #:
|
15651719
|
Filing Dt:
|
07/17/2017
|
Publication #:
|
|
Pub Dt:
|
11/02/2017
| | | | |
Title:
|
INTEGRATED STRUCTURES
|
|
|
Patent #:
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|
Issue Dt:
|
05/01/2018
|
Application #:
|
15651895
|
Filing Dt:
|
07/17/2017
|
Publication #:
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|
Pub Dt:
|
11/02/2017
| | | | |
Title:
|
DEVICE HAVING INTERNAL VOLTAGE GENERATING CIRCUIT
|
|
|
Patent #:
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|
Issue Dt:
|
04/10/2018
|
Application #:
|
15651916
|
Filing Dt:
|
07/17/2017
|
Publication #:
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|
Pub Dt:
|
11/02/2017
| | | | |
Title:
|
Methods of Forming Integrated Structures Comprising Vertical Channel Material and Having Conductively-Doped Semiconductor Material Directly Against Lower Sidewalls of the Channel Material
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|
|
Patent #:
|
|
Issue Dt:
|
01/09/2018
|
Application #:
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15651969
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Filing Dt:
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07/17/2017
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Publication #:
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Pub Dt:
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11/02/2017
| | | | |
Title:
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SEMICONDUCTOR DEVICE INCLUDING FUSE CIRCUIT
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Patent #:
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Issue Dt:
|
04/23/2019
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Application #:
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15651985
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Filing Dt:
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07/17/2017
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Publication #:
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Pub Dt:
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11/02/2017
| | | | |
Title:
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APPARATUS AND METHODS INCLUDING A BIPOLAR JUNCTION TRANSISTOR COUPLED TO A STRING OF MEMORY CELLS
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Patent #:
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Issue Dt:
|
09/03/2019
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Application #:
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15652632
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Filing Dt:
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07/18/2017
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Publication #:
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Pub Dt:
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11/02/2017
| | | | |
Title:
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LIGHT EMITTING DIODES WITH ENHANCED THERMAL SINKING AND ASSOCIATED METHODS OF OPERATION
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Patent #:
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Issue Dt:
|
11/20/2018
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Application #:
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15652724
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Filing Dt:
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07/18/2017
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Publication #:
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Pub Dt:
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01/18/2018
| | | | |
Title:
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Methods Of Forming An Elevationally Extending Conductor Laterally Between A Pair Of Conductive Lines
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Patent #:
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Issue Dt:
|
10/08/2019
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Application #:
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15652768
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Filing Dt:
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07/18/2017
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Publication #:
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Pub Dt:
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09/12/2019
| | | | |
Title:
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Method of Forming A Semiconductor Device Including A Pitch Multiplication
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Patent #:
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Issue Dt:
|
12/18/2018
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Application #:
|
15652986
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Filing Dt:
|
07/18/2017
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Title:
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DATA OUTPUT FOR HIGH FREQUENCY DOMAIN
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Patent #:
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Issue Dt:
|
10/22/2019
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Application #:
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15653181
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Filing Dt:
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07/18/2017
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Publication #:
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Pub Dt:
|
07/05/2018
| | | | |
Title:
|
Magnetic Memory Device with a Common Source having an Array of Openings, System, and Method of Fabrication
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Patent #:
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|
Issue Dt:
|
11/12/2019
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Application #:
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15653276
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Filing Dt:
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07/18/2017
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Publication #:
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Pub Dt:
|
01/24/2019
| | | | |
Title:
|
SELF-BOOST, SOURCE FOLLOWING, AND SAMPLE-AND-HOLD FOR ACCESSING MEMORY CELLS
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|
Patent #:
|
|
Issue Dt:
|
08/06/2019
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Application #:
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15653281
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Filing Dt:
|
07/18/2017
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Publication #:
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Pub Dt:
|
11/02/2017
| | | | |
Title:
|
SEMICONDUCTOR DEVICES AND METHODS FOR FORMING PATTERNED RADIATION BLOCKING ON A SEMICONDUCTOR DEVICE
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Patent #:
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|
Issue Dt:
|
03/20/2018
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Application #:
|
15653365
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Filing Dt:
|
07/18/2017
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Publication #:
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Pub Dt:
|
11/02/2017
| | | | |
Title:
|
CONDUCTIVE INTERCONNECT STRUCTURES INCORPORATING NEGATIVE THERMAL EXPANSION MATERIALS AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS
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|
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Patent #:
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|
Issue Dt:
|
11/13/2018
|
Application #:
|
15654331
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Filing Dt:
|
07/19/2017
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Publication #:
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|
Pub Dt:
|
11/02/2017
| | | | |
Title:
|
SEMICONDUCTOR DEVICE INCLUDING AMPLIFIER
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|
|
Patent #:
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|
Issue Dt:
|
04/03/2018
|
Application #:
|
15654499
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Filing Dt:
|
07/19/2017
|
Title:
|
METHODS AND SYSTEMS FOR AVERAGING IMPEDANCE CALIBRATION
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|
Patent #:
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|
Issue Dt:
|
12/25/2018
|
Application #:
|
15655644
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Filing Dt:
|
07/20/2017
|
Title:
|
OFFSET CANCELLATION FOR LATCHING IN A MEMORY DEVICE
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|
|
Patent #:
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|
Issue Dt:
|
09/17/2019
|
Application #:
|
15655675
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Filing Dt:
|
07/20/2017
|
Publication #:
|
|
Pub Dt:
|
01/24/2019
| | | | |
Title:
|
MEMORY PLATE SEGMENTATION TO REDUCE OPERATING POWER
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|
Patent #:
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|
Issue Dt:
|
12/04/2018
|
Application #:
|
15656084
|
Filing Dt:
|
07/21/2017
|
Publication #:
|
|
Pub Dt:
|
11/09/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR TARGETED REFRESHING OF MEMORY
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|
Patent #:
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|
Issue Dt:
|
08/14/2018
|
Application #:
|
15656690
|
Filing Dt:
|
07/21/2017
|
Publication #:
|
|
Pub Dt:
|
11/09/2017
| | | | |
Title:
|
MEMORIES HAVING SELECT DEVICES BETWEEN ACCESS LINES AND IN MEMORY CELLS FORMED OF A SAME TYPE OF CIRCUIT ELEMENT
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|
|
Patent #:
|
|
Issue Dt:
|
12/04/2018
|
Application #:
|
15656895
|
Filing Dt:
|
07/21/2017
|
Title:
|
MEMORY DEVICE WITH A MULTIPLEXED COMMAND/ADDRESS BUS
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|
|
Patent #:
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|
Issue Dt:
|
01/08/2019
|
Application #:
|
15656999
|
Filing Dt:
|
07/21/2017
|
Publication #:
|
|
Pub Dt:
|
01/24/2019
| | | | |
Title:
|
Integrated Assemblies Comprising Stud-Type Capacitors
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|
|
Patent #:
|
|
Issue Dt:
|
08/28/2018
|
Application #:
|
15657298
|
Filing Dt:
|
07/24/2017
|
Publication #:
|
|
Pub Dt:
|
12/07/2017
| | | | |
Title:
|
SYSTEMS AND METHODS FOR WAFER ALIGNMENT
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|
|
Patent #:
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|
Issue Dt:
|
01/21/2020
|
Application #:
|
15657388
|
Filing Dt:
|
07/24/2017
|
Publication #:
|
|
Pub Dt:
|
11/09/2017
| | | | |
Title:
|
MICROFEATURE WORKPIECES HAVING ALLOYED CONDUCTIVE STRUCTURES, AND ASSOCIATED METHODS
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|
Patent #:
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|
Issue Dt:
|
10/03/2017
|
Application #:
|
15657451
|
Filing Dt:
|
07/24/2017
|
Title:
|
MEMORY DEVICES FOR READING MEMORY CELLS OF DIFFERENT MEMORY PLANES
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|
|
Patent #:
|
|
Issue Dt:
|
11/20/2018
|
Application #:
|
15658202
|
Filing Dt:
|
07/24/2017
|
Publication #:
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|
Pub Dt:
|
11/09/2017
| | | | |
Title:
|
VERTICAL SOLID-STATE TRANSDUCERS AND HIGH VOLTAGE SOLID-STATE TRANSDUCERS HAVING BURIED CONTACTS AND ASSOCIATED SYSTEMS AND METHODS
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|
|
Patent #:
|
|
Issue Dt:
|
12/04/2018
|
Application #:
|
15658276
|
Filing Dt:
|
07/24/2017
|
Title:
|
DYNAMIC TERMINATION EDGE CONTROL
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|
|
Patent #:
|
|
Issue Dt:
|
02/27/2018
|
Application #:
|
15659482
|
Filing Dt:
|
07/25/2017
|
Publication #:
|
|
Pub Dt:
|
12/07/2017
| | | | |
Title:
|
Integrated Structures Comprising Charge-Storage Regions Along Outer Portions of Vertically-Extending Channel Material
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|
Patent #:
|
|
Issue Dt:
|
12/18/2018
|
Application #:
|
15659728
|
Filing Dt:
|
07/26/2017
|
Title:
|
PROGRAM OPERATIONS IN MEMORY
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|
|
Patent #:
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|
Issue Dt:
|
11/13/2018
|
Application #:
|
15659994
|
Filing Dt:
|
07/26/2017
|
Publication #:
|
|
Pub Dt:
|
12/07/2017
| | | | |
Title:
|
CHARGE SHARING BETWEEN MEMORY CELL PLATES USING A CONDUCTIVE PATH
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|
Patent #:
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|
Issue Dt:
|
01/07/2020
|
Application #:
|
15660210
|
Filing Dt:
|
07/26/2017
|
Publication #:
|
|
Pub Dt:
|
11/09/2017
| | | | |
Title:
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SEMICONDUCTOR PACKAGE WITH MULTIPLE COPLANAR INTERPOSERS
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|
Patent #:
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|
Issue Dt:
|
11/13/2018
|
Application #:
|
15660387
|
Filing Dt:
|
07/26/2017
|
Publication #:
|
|
Pub Dt:
|
11/23/2017
| | | | |
Title:
|
METHODS OF TESTING SEMICONDUCTOR DEVICES COMPRISING A DIE STACK HAVING PROTRUDING CONDUCTIVE ELEMENTS
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|
Patent #:
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|
Issue Dt:
|
03/05/2019
|
Application #:
|
15660405
|
Filing Dt:
|
07/26/2017
|
Publication #:
|
|
Pub Dt:
|
01/31/2019
| | | | |
Title:
|
APPARATUSES AND METHODS FOR INDIRECTLY DETECTING PHASE VARIATIONS
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|
|
Patent #:
|
|
Issue Dt:
|
07/09/2019
|
Application #:
|
15660417
|
Filing Dt:
|
07/26/2017
|
Publication #:
|
|
Pub Dt:
|
11/09/2017
| | | | |
Title:
|
MAGNETIC DEVICES WITH MAGNETIC AND GETTER REGIONS AND METHODS OF FORMATION
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|
|
Patent #:
|
|
Issue Dt:
|
01/29/2019
|
Application #:
|
15660442
|
Filing Dt:
|
07/26/2017
|
Publication #:
|
|
Pub Dt:
|
01/31/2019
| | | | |
Title:
|
METHODS OF MAKING SEMICONDUCTOR DEVICE MODULES WITH INCREASED YIELD
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|
|
Patent #:
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|
Issue Dt:
|
06/02/2020
|
Application #:
|
15660491
|
Filing Dt:
|
07/26/2017
|
Publication #:
|
|
Pub Dt:
|
01/31/2019
| | | | |
Title:
|
SEMICONDUCTOR DEVICES INCLUDING A PASSIVE MATERIAL BETWEEN MEMORY CELLS AND CONDUCTIVE ACCESS LINES, AND RELATED ELECTRONIC DEVICES
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|
Patent #:
|
|
Issue Dt:
|
12/17/2019
|
Application #:
|
15660829
|
Filing Dt:
|
07/26/2017
|
Publication #:
|
|
Pub Dt:
|
01/31/2019
| | | | |
Title:
|
SELF-ALIGNED MEMORY DECKS IN CROSS-POINT MEMORY ARRAYS
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|
|
Patent #:
|
|
Issue Dt:
|
12/11/2018
|
Application #:
|
15661351
|
Filing Dt:
|
07/27/2017
|
Publication #:
|
|
Pub Dt:
|
11/09/2017
| | | | |
Title:
|
RESISTIVE MEMORY HAVING CONFINED FILAMENT FORMATION
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|
|
Patent #:
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|
Issue Dt:
|
07/23/2019
|
Application #:
|
15661460
|
Filing Dt:
|
07/27/2017
|
Publication #:
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|
Pub Dt:
|
11/09/2017
| | | | |
Title:
|
DYNAMIC ARRAYS AND OVERLAYS WITH BOUNDS POLICIES
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|
|
Patent #:
|
|
Issue Dt:
|
07/10/2018
|
Application #:
|
15661846
|
Filing Dt:
|
07/27/2017
|
Publication #:
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|
Pub Dt:
|
01/04/2018
| | | | |
Title:
|
LAYOUT OF TRANSMISSION VIAS FOR MEMORY DEVICE
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|
|
Patent #:
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|
Issue Dt:
|
12/25/2018
|
Application #:
|
15662002
|
Filing Dt:
|
07/27/2017
|
Title:
|
PERIPHERY FILL AND LOCALIZED CAPACITANCE
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|
|
Patent #:
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|
Issue Dt:
|
06/04/2019
|
Application #:
|
15662059
|
Filing Dt:
|
07/27/2017
|
Publication #:
|
|
Pub Dt:
|
01/31/2019
| | | | |
Title:
|
APPARATUSES AND METHODS FOR CALIBRATING SENSE AMPLIFIERS IN A SEMICONDUCTOR MEMORY
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|
|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
15662204
|
Filing Dt:
|
07/27/2017
|
Publication #:
|
|
Pub Dt:
|
11/09/2017
| | | | |
Title:
|
MICROFEATURE WORKPIECES AND METHODS FOR FORMING INTERCONNECTS IN MICROFEATURE WORKPIECES
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|
|
Patent #:
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|
Issue Dt:
|
07/24/2018
|
Application #:
|
15662218
|
Filing Dt:
|
07/27/2017
|
Title:
|
VARIABLE FILTER CAPACITANCE
|
|