|
|
Patent #:
|
|
Issue Dt:
|
07/02/2019
|
Application #:
|
15689114
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
12/14/2017
| | | | |
Title:
|
STRIPE MAPPING IN MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/29/2019
|
Application #:
|
15689155
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
THREE DIMENSIONAL MEMORY ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2018
|
Application #:
|
15689211
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
01/04/2018
| | | | |
Title:
|
FERROELECTRIC MEMORY CELL APPARATUSES AND METHODS OF OPERATING FERROELECTRIC MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2019
|
Application #:
|
15689256
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
01/04/2018
| | | | |
Title:
|
CROSS-POINT MEMORY AND METHODS FOR FORMING OF THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/2019
|
Application #:
|
15689453
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
SCALABLE, PARAMETERIZABLE, AND SCRIPT-GENERATABLE BUFFER MANAGER ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2019
|
Application #:
|
15689459
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
METHODS OF OPERATING A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2019
|
Application #:
|
15689626
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
DATA DEDUPLICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2018
|
Application #:
|
15689721
|
Filing Dt:
|
08/29/2017
|
Title:
|
CHARACTERIZATION OF DECISION FEEDBACK EQUALIZER TAPS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2022
|
Application #:
|
15689735
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
CAPACITORS HAVING VERTICAL CONTACTS EXTENDING THROUGH CONDUCTIVE TIERS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2019
|
Application #:
|
15689747
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
READ VOLTAGE CALIBRATION BASED ON HOST IO OPERATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2018
|
Application #:
|
15689922
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
03/22/2018
| | | | |
Title:
|
COMPENSATION FOR THRESHOLD VOLTAGE VARIATION OF MEMORY CELL COMPONENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2018
|
Application #:
|
15689940
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
03/08/2018
| | | | |
Title:
|
REDUNDANCY ARRAY COLUMN DECODER FOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2018
|
Application #:
|
15689955
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
12/14/2017
| | | | |
Title:
|
INFERRING THRESHOLD VOLTAGE DISTRIBUTIONS ASSOCIATED WITH MEMORY CELLS VIA INTERPOLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/09/2019
|
Application #:
|
15689989
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
REFLOW PROTECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2018
|
Application #:
|
15690013
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
12/14/2017
| | | | |
Title:
|
SEMICONDUCTOR DEVICES WITH MAGNETIC AND ATTRACTER MATERIALS AND METHODS OF FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2020
|
Application #:
|
15690081
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
01/04/2018
| | | | |
Title:
|
SOLID STATE TRANSDUCER DEVICES WITH SEPARATELY CONTROLLED REGIONS, AND ASSOCIATED SYSTEMS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2018
|
Application #:
|
15690085
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
12/14/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR TIMING DOMAIN CROSSING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2019
|
Application #:
|
15690200
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
Integrated Assemblies Having Structures Along a First Pitch Coupled with Structures Along a Second Pitch Different from the First Pitch, and Methods of Forming Integrated Assemblies
|
|
|
Patent #:
|
|
Issue Dt:
|
08/13/2019
|
Application #:
|
15690209
|
Filing Dt:
|
08/29/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
Integrated Assemblies Having Structures Along a First Pitch Coupled with Structures Along a Second Pitch Different from the First Pitch, and Methods of Forming Integrated Assemblies
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2019
|
Application #:
|
15690320
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
MEMORY DEVICES HAVING DISTRIBUTED CONTROLLER SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2018
|
Application #:
|
15690359
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
MEMORY AS A PROGRAMMABLE LOGIC DEVICE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
15690442
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
CACHE BUFFER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/26/2019
|
Application #:
|
15690497
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/22/2018
| | | | |
Title:
|
SEGMENTED MEMORY AND OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2021
|
Application #:
|
15690503
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
CACHE LINE DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2019
|
Application #:
|
15690708
|
Filing Dt:
|
08/30/2017
|
Title:
|
INCREASED NAND PERFORMANCE UNDER HIGH THERMAL CONDITIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2019
|
Application #:
|
15690744
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
MEMORY PROGRAMMING METHODS AND MEMORY SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2019
|
Application #:
|
15690800
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
METHODS OF OPERATING A MEMORY SYSTEM INCLUDING DATA COLLECTION AND COMPRESSION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2018
|
Application #:
|
15690862
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
BOOSTING CHANNELS OF MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2020
|
Application #:
|
15690869
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
SLC CACHE MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2018
|
Application #:
|
15690873
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
FERROELECTRIC MEMORY CELL SENSING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2021
|
Application #:
|
15690889
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
LOG DATA STORAGE FOR FLASH MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/18/2018
|
Application #:
|
15690895
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
08/16/2018
| | | | |
Title:
|
ACTIVE BOUNDARY QUILT ARCHITECTURE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2019
|
Application #:
|
15690903
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
FLASH MEMORY BLOCK RETIREMENT POLICY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2019
|
Application #:
|
15690920
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
NAND TEMPERATURE DATA MANAGEMENT
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
15690933
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
RANDOM ACCESS MEMORY POWER SAVINGS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2019
|
Application #:
|
15690962
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
VLSI EFFICIENT HUFFMAN ENCODING APPARATUS AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2018
|
Application #:
|
15690968
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
APPARATUS AND METHOD FOR STANDBY CURRENT CONTROL OF SIGNAL PATH
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2020
|
Application #:
|
15690992
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
EFFICIENT ALLOCATION OF STORAGE CONNECTION RESOURCES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2019
|
Application #:
|
15691055
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
APPARATUSES AND METHODS FOR SHIELDED MEMORY ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/25/2020
|
Application #:
|
15691147
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
MANAGED NVM ADAPTIVE CACHE MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2018
|
Application #:
|
15691217
|
Filing Dt:
|
08/30/2017
|
Title:
|
DISTRIBUTED MODE REGISTERS IN MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2019
|
Application #:
|
15691303
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DICE INCLUDING ELECTRICALLY CONDUCTIVE INTERCONNECTS BETWEEN DIE RINGS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2019
|
Application #:
|
15691394
|
Filing Dt:
|
08/30/2017
|
Title:
|
ADJUSTING INSTRUCTION DELAYS TO THE LATCH PATH IN DDR5 DRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/2020
|
Application #:
|
15691442
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
CHARGE STORAGE APPARATUS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2021
|
Application #:
|
15691447
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
COMMAND ADDRESS INPUT BUFFER BIAS CURRENT REDUCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2019
|
Application #:
|
15691454
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
WEAR LEVELING FOR RANDOM ACCESS AND FERROELECTRIC MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2019
|
Application #:
|
15691465
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
APPARATUSES AND/OR METHODS FOR OPERATING A MEMORY CELL AS AN ANTI-FUSE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2018
|
Application #:
|
15691477
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
FLOATING GATE MEMORY CELLS IN VERTICAL MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2018
|
Application #:
|
15691482
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
MEMORY DEVICE WITH REDUCED NEIGHBOR MEMORY CELL DISTURBANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/14/2020
|
Application #:
|
15691484
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
MEMORY ARRAY ACCESSIBILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2021
|
Application #:
|
15691541
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
Method Used In Forming An Electronic Device Comprising Conductive Material And Ferroelectric Material
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
15691576
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
01/04/2018
| | | | |
Title:
|
METHOD FOR BASE CONTACT LAYOUT, SUCH AS FOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2019
|
Application #:
|
15691584
|
Filing Dt:
|
08/30/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
SECURE ERASE FOR DATA CORRUPTION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/31/2019
|
Application #:
|
15691794
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
SYSTEMS INCLUDING MEMORY CELLS ON OPPOSING SIDES OF A PILLAR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2020
|
Application #:
|
15691806
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
01/04/2018
| | | | |
Title:
|
FERROELECTRIC MEMORY AND METHODS OF FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2018
|
Application #:
|
15691813
|
Filing Dt:
|
08/31/2017
|
Title:
|
VOLTAGE DEGRADATION AWARE NAND ARRAY MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2019
|
Application #:
|
15691824
|
Filing Dt:
|
08/31/2017
|
Title:
|
RESPONDING TO POWER LOSS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2019
|
Application #:
|
15691840
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
RESPONDING TO POWER LOSS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2019
|
Application #:
|
15691859
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
CACHE ARCHITECTURE FOR COMPARING DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2020
|
Application #:
|
15691888
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
HETEROGENOUS KEY-VALUE SETS IN TREE DATABASE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2020
|
Application #:
|
15691998
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
REDUCING PROBABILISTIC FILTER QUERY LATENCY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2019
|
Application #:
|
15692003
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2018
|
Application #:
|
15692073
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
METHODS OF OPERATING A MEMORY DURING A PROGRAMMING OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2018
|
Application #:
|
15692154
|
Filing Dt:
|
08/31/2017
|
Title:
|
DETERMINING DATA STATES OF MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/11/2019
|
Application #:
|
15692225
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
MANAGED MULTIPLE DIE MEMORY QOS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2019
|
Application #:
|
15692274
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
DATA STORAGE LAYOUT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2020
|
Application #:
|
15692299
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
PRIORITIZED SECURITY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2018
|
Application #:
|
15692376
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR PERFORMING COMPARE OPERATIONS USING SENSING CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2018
|
Application #:
|
15692387
|
Filing Dt:
|
08/31/2017
|
Title:
|
SEMICONDUCTOR STRUCTURES INCLUDING MEMORY MATERIALS SUBSTANTIALLY ENCAPSULATED WITH DIELECTRIC MATERIALS, AND RELATED SYSTEMS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2019
|
Application #:
|
15692407
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
OPTIMIZED SCAN INTERVAL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2019
|
Application #:
|
15692508
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
NAND CELL ENCODING TO IMPROVE DATA INTEGRITY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2018
|
Application #:
|
15692512
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
INTERCONNECTIONS FOR 3D MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/2020
|
Application #:
|
15692553
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
MEMORY DEVICE WITH POWER MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2018
|
Application #:
|
15692565
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
12/28/2017
| | | | |
Title:
|
CONNECTING MEMORY CELLS TO A DATA LINE SEQUENTIALLY WHILE APPLYING A PROGRAM VOLTAGE TO THE MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2018
|
Application #:
|
15692599
|
Filing Dt:
|
08/31/2017
|
Title:
|
SEMICONDUCTOR DEVICES AND ELECTRONIC SYSTEMS HAVING MEMORY STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2019
|
Application #:
|
15692622
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
MEMORY CONSTRAINED TRANSLATION TABLE MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2019
|
Application #:
|
15692712
|
Filing Dt:
|
08/31/2017
|
Title:
|
ASYMMETRICAL MULTI-GATE STRING DRIVER FOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2019
|
Application #:
|
15692779
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
MULTI-COMPONENT CONDUCTIVE STRUCTURES FOR SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2018
|
Application #:
|
15692783
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
DATA GATHERING IN MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2020
|
Application #:
|
15692802
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
09/27/2018
| | | | |
Title:
|
SECURE MEMORY ARRANGEMENTS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
15692803
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
Method for Solder Bridging Elimination for Bulk Solder C2S Interconnects
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2019
|
Application #:
|
15692804
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
SYSTEMS AND METHODS FOR REFRESHING A MEMORY BANK WHILE ACCESSING ANOTHER MEMORY BANK USING A SHARED ADDRESS PATH
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2018
|
Application #:
|
15692852
|
Filing Dt:
|
08/31/2017
|
Title:
|
SYSTEMS AND METHODS FOR FREQUENCY MODE DETECTION AND IMPLEMENTATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2019
|
Application #:
|
15692937
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
APPARATUSES AND METHODS FOR DATA TRANSMISSION OFFSET VALUES IN BURST TRANSMISSIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2018
|
Application #:
|
15692959
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
COMPARISON OPERATIONS IN MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2018
|
Application #:
|
15692962
|
Filing Dt:
|
08/31/2017
|
Title:
|
ERASE PAGE CHECK
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
15692972
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
04/26/2018
| | | | |
Title:
|
GRAPH TRAVERSAL USING AUTOMATA PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/2021
|
Application #:
|
15692985
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
04/26/2018
| | | | |
Title:
|
BOOLEAN SATISFIABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/2019
|
Application #:
|
15692993
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
APPARATUSES AND METHODS FOR PROVIDING ACTIVE AND INACTIVE CLOCK SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2019
|
Application #:
|
15692994
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
CELL-SPECIFIC REFERENCE GENERATION AND SENSING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2018
|
Application #:
|
15693002
|
Filing Dt:
|
08/31/2017
|
Title:
|
DETECTING POWER LOSS IN NAND MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/02/2019
|
Application #:
|
15693027
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
CLOCK TREE STRUCTURE IN A MEMORY SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2018
|
Application #:
|
15693032
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
01/04/2018
| | | | |
Title:
|
CELL PERFORMANCE RECOVERY USING CYCLING TECHNIQUES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/26/2019
|
Application #:
|
15693039
|
Filing Dt:
|
08/31/2017
|
Title:
|
STACKED SEMICONDUCTOR DIES INCLUDING INDUCTORS AND ASSOCIATED METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2018
|
Application #:
|
15693064
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
01/25/2018
| | | | |
Title:
|
APPARATUSES AND METHODS FOR STORING A DATA VALUE IN A SENSING CIRCUITRY ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2021
|
Application #:
|
15693071
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
10/25/2018
| | | | |
Title:
|
SECURE MEMORY DEVICE WITH UNIQUE IDENTIFIER FOR AUTHENTICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2019
|
Application #:
|
15693095
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
MEMORY DEVICES WITH PROGRAMMABLE LATENCIES AND METHODS FOR OPERATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2020
|
Application #:
|
15693102
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
12/21/2017
| | | | |
Title:
|
CROSS-POINT MEMORY AND METHODS FOR FABRICATION OF SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2019
|
Application #:
|
15693114
|
Filing Dt:
|
08/31/2017
|
Publication #:
|
|
Pub Dt:
|
02/28/2019
| | | | |
Title:
|
MEMORY LOOPBACK SYSTEMS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2019
|
Application #:
|
15693118
|
Filing Dt:
|
08/31/2017
|
Title:
|
3D MEMORY DEVICE INCLUDING SHARED SELECT GATE CONNECTIONS BETWEEN MEMORY BLOCKS
|
|