|
|
Patent #:
|
|
Issue Dt:
|
09/23/1997
|
Application #:
|
08568390
|
Filing Dt:
|
12/06/1995
|
Title:
|
METHOD OF MAKING THIN FILM TRANSISTOR WITH OFFSET DRAIN
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/1998
|
Application #:
|
08572020
|
Filing Dt:
|
12/14/1995
|
Title:
|
METHOD TO CONTROL THRESHOLD VOLTAGE BY MODIFYING IMPLANT DOSAGE USING VARIABLE APERTURE DOPANT IMPLANTS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/1997
|
Application #:
|
08573430
|
Filing Dt:
|
12/15/1995
|
Title:
|
APPARATUS FOR SEPARATING WAFERS FROM POLISHING PADS USED IN CHEMICAL-MECHANICAL PLANARIZATION OF SEMICONDUCTOR WAFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/1997
|
Application #:
|
08573897
|
Filing Dt:
|
12/18/1995
|
Title:
|
AN ELECTRICALLY PROGRAMMABLE MEMORY WITH IMPROVED RETENTION OF DATA AND A METHOD OF WRITING DATA IN SAID MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/1997
|
Application #:
|
08575953
|
Filing Dt:
|
12/21/1995
|
Title:
|
METHOD AND CIRCUIT FOR TESTING MEMORIES IN INTEGRATED CIRCUIT FORM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/1997
|
Application #:
|
08576781
|
Filing Dt:
|
12/21/1995
|
Title:
|
QUALITY CONTROL METHOD FOR DETECTING DEFECTIVE POLISHING PADS USED IN CHEMICAL-MECHANICAL PLANARIZATION OF SEMICONDUCTOR WAFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/1998
|
Application #:
|
08576881
|
Filing Dt:
|
12/21/1995
|
Title:
|
RESISTANCE REFERENCE CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/1997
|
Application #:
|
08580613
|
Filing Dt:
|
12/29/1995
|
Title:
|
TECHNIQUE TO IMPROVE UNIFORMITY OF LARGE AREA FIELD EMISSION DISPLAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/1997
|
Application #:
|
08581472
|
Filing Dt:
|
12/18/1995
|
Title:
|
METHOD AND APPARATUS FOR TIMING CONTROL IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/1998
|
Application #:
|
08583565
|
Filing Dt:
|
01/05/1996
|
Title:
|
CAPACITIVE CHARGE DRIVER CIRCUIT FOR FLAT PANEL DISPLAY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/1998
|
Application #:
|
08584672
|
Filing Dt:
|
01/11/1996
|
Title:
|
BONDING SUPPORT FOR LEADS-OVER-CHIP PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/1998
|
Application #:
|
08588648
|
Filing Dt:
|
01/19/1996
|
Title:
|
SWITCHING MASTER SLAVE CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/28/1998
|
Application #:
|
08589141
|
Filing Dt:
|
01/19/1996
|
Title:
|
WRITE DRIVER HAVING A TEST FUNCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/1998
|
Application #:
|
08589924
|
Filing Dt:
|
01/23/1996
|
Title:
|
METHOD FOR DEPOSITING A FILM OF TITANIUM NITRIDE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/1998
|
Application #:
|
08590541
|
Filing Dt:
|
01/24/1996
|
Title:
|
APPARATUS AND METHOD FOR PLANAR END-POINT DETECTION DURING CHEMICAL-MECHANICAL POLISHING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/1998
|
Application #:
|
08592122
|
Filing Dt:
|
01/26/1996
|
Title:
|
PROGRAMMABLE MULTIBIT REGISTER FOR COINCIDENCE AND JUMP OPERATIONS AND COINCIDENCE FUSE CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/1998
|
Application #:
|
08592204
|
Filing Dt:
|
01/26/1996
|
Title:
|
METHOD AND APPARATUS FOR ASSEMBLING A TEMPORARY PACKAGE FOR A SEMICONDUCTOR DIE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/1998
|
Application #:
|
08594842
|
Filing Dt:
|
01/31/1996
|
Title:
|
FACET ETCH FOR IMPROVED STEP COVERAGE OF INTEGRATED CIRCUIT CONTACTS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/1999
|
Application #:
|
08598236
|
Filing Dt:
|
02/07/1996
|
Title:
|
PHOTOLITHOGRAPHIC TECHNIQUE OF EMITTER TIP EXPOSURE IN FEDS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2003
|
Application #:
|
08603943
|
Filing Dt:
|
02/20/1996
|
Title:
|
CIRCUIT AND METHOD FOR VARYING A PULSE WIDTH OF AN INTERNAL CONTROL SIGNAL DURING A TEST MODE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/1998
|
Application #:
|
08615727
|
Filing Dt:
|
03/13/1996
|
Title:
|
VOLTAGE REGULATOR FOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/04/1998
|
Application #:
|
08617283
|
Filing Dt:
|
03/18/1996
|
Title:
|
METHOD FOR FABRICATING MICROBUMP INTERCONNECT FOR BARE SEMICONDUCTOR DICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/1998
|
Application #:
|
08644232
|
Filing Dt:
|
05/10/1996
|
Title:
|
SEMICONDUCTOR JUNCTION ANTIFUSE CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/1998
|
Application #:
|
08645059
|
Filing Dt:
|
05/13/1996
|
Title:
|
LOW TEMPERATURE METHOD FOR EVACUATING AND SEALING FIELD EMISSION DISPLAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/1998
|
Application #:
|
08647704
|
Filing Dt:
|
05/14/1996
|
Title:
|
METHOD FOR TESTING SEMICONDUCTOR PACKAGES USING DECOUPLING CAPACITORS TO REDUCE NOISE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/1998
|
Application #:
|
08647749
|
Filing Dt:
|
05/15/1996
|
Title:
|
MICROBUMP INTERCONNECT FOR BARE SEMICONDUCTOR DICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/1998
|
Application #:
|
08649857
|
Filing Dt:
|
05/03/1996
|
Title:
|
NONVOLATILE MEMORY DEVICE HAVING SECTORS OF SELECTABLE SIZE AND NUMBER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/1998
|
Application #:
|
08650286
|
Filing Dt:
|
05/20/1996
|
Title:
|
LOCAL GROUND AND VCC CONNECTION IN AN SRAM CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/1998
|
Application #:
|
08650470
|
Filing Dt:
|
05/20/1996
|
Title:
|
DATA ORDERING FOR CACHE DATA TRANSFER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/1998
|
Application #:
|
08653624
|
Filing Dt:
|
05/24/1996
|
Title:
|
CLAMPING DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/1998
|
Application #:
|
08659145
|
Filing Dt:
|
06/05/1996
|
Title:
|
METHOD OF WAFER CLEANING, AND SYSTEM AND CLEANING SOLUTION REGARDING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/1997
|
Application #:
|
08660204
|
Filing Dt:
|
06/03/1996
|
Title:
|
CIRCUIT FOR GENERATING A DELAYED STANDBY SIGNAL IN RESPONSE TO AN EXTERNAL STANDBY COMMAND
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/1996
|
Application #:
|
08665621
|
Filing Dt:
|
06/18/1996
|
Title:
|
RAM ROW DECODE CIRCUITRY THAT UTILIZES A PRECHARGE CIRCUIT THAT IS DEACTIVATED BY A FEEDBACK FROM AN ACTIVATED WORD LINE DRIVER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/1997
|
Application #:
|
08667907
|
Filing Dt:
|
06/12/1996
|
Title:
|
METHOD OF DEPOSITING TUNGSTEN NITRIDE USING A SOURCE GAS COMPRISING SILICON
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/1997
|
Application #:
|
08671717
|
Filing Dt:
|
06/28/1996
|
Title:
|
METHOD AND APPARATUS FOR MONITORING ILLEGAL CONDITIONS IN A NONVOLATILE MEMORY CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/1997
|
Application #:
|
08683701
|
Filing Dt:
|
07/18/1996
|
Title:
|
VCCP PUMP FOR LOW VOLTAGE OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/1997
|
Application #:
|
08686386
|
Filing Dt:
|
07/25/1996
|
Title:
|
CAPACITOR CONSTRUCTION WITH OXIDATION BARRIER BLOCKS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/1998
|
Application #:
|
08687248
|
Filing Dt:
|
07/25/1996
|
Title:
|
A CAPACITOR CONSTRUCTION WITH OXIDATION BARRIER BLOCK
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/1998
|
Application #:
|
08688098
|
Filing Dt:
|
07/29/1996
|
Title:
|
HIGH RESISTANCE RESISTORS FOR LIMITING CATHODE CURRENT IN FIELD EMISSION DISPLAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/1998
|
Application #:
|
08695407
|
Filing Dt:
|
08/12/1996
|
Title:
|
METHOD OF FORMING A FIELD EFFECT TRANSISTOR AND METHOD OF FORMING CMOS INTEGRATED CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/1997
|
Application #:
|
08702380
|
Filing Dt:
|
08/22/1996
|
Title:
|
SELF-TIMING POWER-UP CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/1997
|
Application #:
|
08707867
|
Filing Dt:
|
09/09/1996
|
Title:
|
SINGLE-ENDED SENSING USING GLOBAL BIT LINES FOR DRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/1997
|
Application #:
|
08710786
|
Filing Dt:
|
09/20/1996
|
Title:
|
THIN FILM TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/1998
|
Application #:
|
08710917
|
Filing Dt:
|
09/24/1996
|
Title:
|
NONVOLATILE MEMORY HAVING TRANSISTOR REDUNDANCY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/1999
|
Application #:
|
08712373
|
Filing Dt:
|
09/11/1996
|
Title:
|
METHOD OF MAKING ASYMNETRIC NONVOLABILE MEMRORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/1998
|
Application #:
|
08716987
|
Filing Dt:
|
09/20/1996
|
Title:
|
TIMER CIRCUIT WITH PROGRAMMABLE DECODE CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/1999
|
Application #:
|
08717014
|
Filing Dt:
|
09/20/1996
|
Title:
|
METHOD OF FORMING A FIELD EFFECT TRANSISTOR AND METHOD OF FORMING CMOS INTEGRATED CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/1998
|
Application #:
|
08717702
|
Filing Dt:
|
09/23/1996
|
Title:
|
LEVEL DETECTION CIRCUIT AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/1998
|
Application #:
|
08721474
|
Filing Dt:
|
09/27/1996
|
Title:
|
USE OF CONDUCTIVE LINES ON THE BACK SIDE OF WAFERS AND DIE FOR SEMICONDUCTOR INTERCONNECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/1997
|
Application #:
|
08724270
|
Filing Dt:
|
09/18/1996
|
Title:
|
PIPELINED READ ARCHITECTURE FOR MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/1998
|
Application #:
|
08724625
|
Filing Dt:
|
09/30/1996
|
Title:
|
HI-JACK HINGED CONNECTION ADAPTER FOR INPUT/OUTPUT CARDS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/1997
|
Application #:
|
08725008
|
Filing Dt:
|
10/01/1996
|
Title:
|
METHOD AND APPARATUS FOR PERFORMING MEMORY CELL VERIFICATION ON A NONVOLATILE MEMORY CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/1998
|
Application #:
|
08729729
|
Filing Dt:
|
10/07/1996
|
Title:
|
METHOD AND APPARATUS FOR ENHANCED BOOTING AND DC CONDITIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/1997
|
Application #:
|
08738541
|
Filing Dt:
|
10/28/1996
|
Title:
|
ADDRESS TRANSITION DETECTION (ATD) CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/1997
|
Application #:
|
08740756
|
Filing Dt:
|
11/01/1996
|
Title:
|
THIN FILM TRANSISTOR HAVING A DRAIN OFFSET REGION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/1997
|
Application #:
|
08779478
|
Filing Dt:
|
01/07/1997
|
Title:
|
VOLTAGE REGULATOR CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/1998
|
Application #:
|
08799575
|
Filing Dt:
|
02/12/1997
|
Title:
|
HIGHLY SELECTIVE NITRIDE SPACER ETCH
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/1998
|
Application #:
|
08800553
|
Filing Dt:
|
02/18/1997
|
Title:
|
SEMICONDUCTOR PROCESSING METHOD OF FORMING A STATIC RANDOM ACCESS MEMORY CELL AND STATIC RANDOM ACCESS MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/1998
|
Application #:
|
08802724
|
Filing Dt:
|
02/20/1997
|
Title:
|
EXPANDABLE DATA WIDTH SAM FOR A MULTIPORT RAM
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/1997
|
Application #:
|
08804945
|
Filing Dt:
|
02/24/1997
|
Title:
|
VOLTAGE REGULATOR CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2002
|
Application #:
|
08807418
|
Filing Dt:
|
02/28/1997
|
Title:
|
MULTILEVEL LEADFRAME FOR A PACKAGED INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/06/1999
|
Application #:
|
08807562
|
Filing Dt:
|
02/28/1997
|
Title:
|
METHOD OF FORMING A CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/1998
|
Application #:
|
08810416
|
Filing Dt:
|
03/04/1997
|
Title:
|
METHOD OF FORMING CMOS CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/1998
|
Application #:
|
08814218
|
Filing Dt:
|
03/11/1997
|
Title:
|
INTEGRATED CIRCUIT OPERABLE IN A MODE HAVING EXTREMELY LOW POWER CONSUMPTION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/04/1998
|
Application #:
|
08814778
|
Filing Dt:
|
03/10/1997
|
Title:
|
ON-CHIP MOBILE ION CONTAMINATION TEST CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/1999
|
Application #:
|
08820267
|
Filing Dt:
|
03/17/1997
|
Title:
|
METHOD OF FORMING A CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2004
|
Application #:
|
08824110
|
Filing Dt:
|
03/25/1997
|
Title:
|
ELECTRONIC TOY USING PRERECORDED MESSAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/1998
|
Application #:
|
08832039
|
Filing Dt:
|
04/03/1997
|
Title:
|
CIRCUIT AND METHOD FOR GENERATING A CONTROL SIGNAL FOR A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/1999
|
Application #:
|
08835763
|
Filing Dt:
|
04/08/1997
|
Title:
|
SWITCH FOR MINIMIZING TRANSISTOR EXPOSURE TO HIGH VOLTAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/1999
|
Application #:
|
08840599
|
Filing Dt:
|
04/22/1997
|
Title:
|
LOW VOLTAGE DYNAMIC MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2003
|
Application #:
|
08841908
|
Filing Dt:
|
04/17/1997
|
Title:
|
METHOD FOR IMPROVING THICKNESS UNIFORMITY OF DEPOSITED OZONE-TEOS SILICATE GLASS LAYERS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/1999
|
Application #:
|
08843283
|
Filing Dt:
|
04/14/1997
|
Title:
|
LEADS BETWEEN CHIPS ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/1998
|
Application #:
|
08844384
|
Filing Dt:
|
04/18/1997
|
Title:
|
METHOD OF FORMING A CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/1999
|
Application #:
|
08846105
|
Filing Dt:
|
04/25/1997
|
Title:
|
PROCESSOR TO MEMORY INTERFACE LOGIC FOR USE IN A COMPUTER SYSTEM USING A MULTIPLEXED MEMORY ADDRESS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/1998
|
Application #:
|
08846954
|
Filing Dt:
|
04/30/1997
|
Title:
|
CONDUCTIVE LINES ON THE BACK SIDE OF WAFERS AND DICE FOR SEMICONDUCTOR INTERCONNECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/1998
|
Application #:
|
08850278
|
Filing Dt:
|
05/05/1997
|
Title:
|
STAGGERED CONTACT PLACEMENT ON CMOS CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/1998
|
Application #:
|
08850950
|
Filing Dt:
|
05/05/1997
|
Title:
|
SEMICONDUCTOR DEVICE WITH VT IMPLANT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/1998
|
Application #:
|
08855941
|
Filing Dt:
|
05/14/1997
|
Title:
|
APPARATUS AND METHOD FOR CONDITIONING A PLANARIZING SUBSTRATE USED IN CHEMICAL-MECHANICAL PLANARIZATION OF SEMICONDUCTOR WAFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/1998
|
Application #:
|
08858945
|
Filing Dt:
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05/20/1997
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Title:
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ANTIFUSE PROGRAMMING METHOD AND APPARATUS
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Patent #:
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Issue Dt:
|
01/12/1999
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Application #:
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08873968
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Filing Dt:
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06/12/1997
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Title:
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CIRCUIT FOR ON-BOARD PROGRAMMING OF PRD SERIAL EEPROMS
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Patent #:
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Issue Dt:
|
12/31/2002
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Application #:
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08887547
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Filing Dt:
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07/03/1997
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Title:
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METHOD FOR IMPROVING A STEPPER SIGNAL IN A PLANARIZED SURFACE OVER ALIGNMENT TOPOGRAPHY
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Patent #:
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Issue Dt:
|
04/23/2002
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Application #:
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08888501
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Filing Dt:
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07/07/1997
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Title:
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SYSTEM AND METHOD FOR INVALIDATING CACHE MEMORY
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Patent #:
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Issue Dt:
|
02/24/1998
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Application #:
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08888857
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Filing Dt:
|
07/07/1997
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Title:
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METHOD AND APPARATUS FOR LEAK CHECKING UNPACKAGED SEMICONDUCTOR DICE
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Patent #:
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Issue Dt:
|
11/10/1998
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Application #:
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08914469
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Filing Dt:
|
08/19/1997
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Title:
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METHOD FOR FABRICATING MICROBUMP INTERCONNECT FOR BARE SEMICONDUCTOR DICE
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Patent #:
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|
Issue Dt:
|
02/16/1999
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Application #:
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08914571
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Filing Dt:
|
08/19/1997
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Title:
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MASK FOR FORMING FEATURES ON A SEMICONDUCTOR SUBSTRATE AND A METHOD FOR FORMING THE MASK
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|
Patent #:
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|
Issue Dt:
|
04/20/2010
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Application #:
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08915658
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Filing Dt:
|
08/21/1997
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Title:
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LOW RESISTANCE METAL SILICIDE LOCAL INTERCONNECTS AND A METHOD OF MAKING
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|
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Patent #:
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|
Issue Dt:
|
09/03/2002
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Application #:
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08915885
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Filing Dt:
|
08/21/1997
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Title:
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METHOD AND SYSTEM FOR TRACKING MANUFACTURING DATA FOR INTEGRATED CIRCUIT PARTS
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|
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Patent #:
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|
Issue Dt:
|
11/16/1999
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Application #:
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08915987
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Filing Dt:
|
08/21/1997
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Title:
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METHOD OF DEPOSITING SILICON OXIDES
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|
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Patent #:
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Issue Dt:
|
01/05/1999
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Application #:
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08917667
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Filing Dt:
|
08/21/1997
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Title:
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METHOD AND APPARATUS FOR FORMING FEATURES IN HOLES, TRENCHES AND OTHER VOIDS IN THE MANUFACTURING OF MICROELECTRONIC DEVICES
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|
|
Patent #:
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|
Issue Dt:
|
01/19/1999
|
Application #:
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08918623
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Filing Dt:
|
08/22/1997
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Title:
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THRESHOLD VOLTAGE SCALABLE BUFFER WITH REFERENCE LEVEL
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|
|
Patent #:
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|
Issue Dt:
|
03/21/2000
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Application #:
|
08920535
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Filing Dt:
|
08/29/1997
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Title:
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ANGLED ION IMPLANTATION FOR SELECTIVE DOPING
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|
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Patent #:
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|
Issue Dt:
|
05/28/2002
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Application #:
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08923218
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Filing Dt:
|
09/04/1997
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Title:
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STRESS REDUCTION FEATURE FOR LOC LEAD FRAME
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|
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Patent #:
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|
Issue Dt:
|
08/23/2005
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Application #:
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08925703
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Filing Dt:
|
09/09/1997
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Title:
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METHOD AND APPARATUS FOR INSTALLING AN OPERATING SYSTEM
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|
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Patent #:
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|
Issue Dt:
|
04/04/2000
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Application #:
|
08925885
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Filing Dt:
|
09/08/1997
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Title:
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VARIABLE SPEED CONTROLLER
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|
|
Patent #:
|
|
Issue Dt:
|
11/03/1998
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Application #:
|
08926275
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Filing Dt:
|
09/05/1997
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Title:
|
METHOD OF PRODUCING AN HGS STRUCTURE USING AN AMORPHOUS SILICON DISORDERED LAYER AS A SUBSTRATE
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|
|
Patent #:
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|
Issue Dt:
|
05/20/2003
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Application #:
|
08948179
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Filing Dt:
|
10/09/1997
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Title:
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USE OF HEAVY HALOGENS FOR ENHANCED FACET ETCHING
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|
|
Patent #:
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|
Issue Dt:
|
05/11/1999
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Application #:
|
08949072
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Filing Dt:
|
10/10/1997
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Title:
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METHOD AND APPARATUS FOR IMPROVED COATING OF A SEMICONDUCTOR WAFER
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|
|
Patent #:
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|
Issue Dt:
|
09/22/1998
|
Application #:
|
08950012
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Filing Dt:
|
10/14/1997
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Title:
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PROGRAMMABLE DEVICE FOR REDUNDANT ELEMENT CANCEL IN A MEMORY
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Patent #:
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|
Issue Dt:
|
03/30/1999
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Application #:
|
08956759
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Filing Dt:
|
10/22/1997
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Title:
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ARCHITECTURE FOR STATE MACHINE FOR CONTROLLING INTERNAL OPERATIONS OF FLASH MEMORY
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|
|
Patent #:
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|
Issue Dt:
|
10/17/2006
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Application #:
|
08984562
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Filing Dt:
|
12/03/1997
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Title:
|
MEMORY DEVICE FOR BURST OR PIPELINED OPERTION WITH MODE SELECTION CIRCUTRY
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|