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Reel/Frame:	051028/0001			Pages:	834
		Recorded:	11/12/2019
Attorney Dkt #:	4816.244
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 16529
Page 24 of 166
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Patent #:	6650007	Issue Dt:	11/18/2003	Application #:	09924635	Filing Dt:	08/08/2001
Publication #:	US20010048152	Pub Dt:	12/06/2001
Title:	STACKABLE CERAMIC FBGA FOR HIGH THERMAL APPLICATIONS

Patent #:	6545560	Issue Dt:	04/08/2003	Application #:	09924658	Filing Dt:	08/08/2001
Title:	METHOD TO FIND A VALUE WITHIN A RANGE USING WEIGHTED SUBRANGES

Patent #:	6514842	Issue Dt:	02/04/2003	Application #:	09924740	Filing Dt:	08/08/2001
Title:	LOW RESISTANCE GATE FLASH MEMORY

Patent #:	6710756	Issue Dt:	03/23/2004	Application #:	09925116	Filing Dt:	08/08/2001
Publication #:	US20010045922	Pub Dt:	11/29/2001
Title:	MATRIX ADDRESSABLE DISPLAY HAVING PULSE NUMBER MODULATION

Patent #:	6549048	Issue Dt:	04/15/2003	Application #:	09925979	Filing Dt:	08/09/2001
Publication #:	US20020075052	Pub Dt:	06/20/2002
Title:	THRESHOLD AMPLIFIER

Patent #:	6593218	Issue Dt:	07/15/2003	Application #:	09927275	Filing Dt:	08/09/2001
Publication #:	US20020028522	Pub Dt:	03/07/2002
Title:	ELECTROSTATIC DISCHARGE PROTECTION DEVICE HAVING A GRADED JUNCTION AND METHOD FOR FORMING THE SAME

Patent #:	6490220	Issue Dt:	12/03/2002	Application #:	09927373	Filing Dt:	08/13/2001
Title:	METHOD FOR RELIABLY SHUTTING OFF OSCILLATOR PULSES TO A CHARGE-PUMP

Patent #:	6542953	Issue Dt:	04/01/2003	Application #:	09927407	Filing Dt:	08/10/2001
Publication #:	US20020016862	Pub Dt:	02/07/2002
Title:	METHOD FOR CONFIGURING PEER-TO-PEER BUS BRIDGES IN A COMPUTER SYSTEM USING SHADOW CONFIGURATION REGISTERS

Patent #:	6552596	Issue Dt:	04/22/2003	Application #:	09927587	Filing Dt:	08/10/2001
Publication #:	US20030030476	Pub Dt:	02/13/2003
Title:	CURRENT SAVING MODE FOR INPUT BUFFERS

Patent #:	7064447	Issue Dt:	06/20/2006	Application #:	09927675	Filing Dt:	08/10/2001
Publication #:	US20030030153	Pub Dt:	02/13/2003
Title:	BOND PAD STRUCTURE COMPRISING MULTIPLE BOND PADS WITH METAL OVERLAP

Patent #:	6452678	Issue Dt:	09/17/2002	Application #:	09928286	Filing Dt:	08/10/2001
Publication #:	US20020003622	Pub Dt:	01/10/2002
Title:	REFLECTANCE METHOD FOR EVALUATING THE SURFACE CHARACTERISTICS OF OPAQUE MATERIALS

Patent #:	6614689	Issue Dt:	09/02/2003	Application #:	09928580	Filing Dt:	08/13/2001
Publication #:	US20030031056	Pub Dt:	02/13/2003
Title:	NON-VOLATILE MEMORY HAVING A CONTROL MINI-ARRAY

Patent #:	6501176	Issue Dt:	12/31/2002	Application #:	09929455	Filing Dt:	08/14/2001
Publication #:	US20020027277	Pub Dt:	03/07/2002
Title:	DEFLECTABLE INTERCONNECT

Patent #:	6545561	Issue Dt:	04/08/2003	Application #:	09929571	Filing Dt:	08/14/2001
Publication #:	US20020017965	Pub Dt:	02/14/2002
Title:	METHOD TO FIND A VALUE WITHIN A RANGE USING WEIGHTED SUBRANGES

Patent #:	6445259	Issue Dt:	09/03/2002	Application #:	09929605	Filing Dt:	08/14/2001
Title:	METHOD TO FIND A VALUE WITHIN A RANGE USING WEIGHTED SUBRANGES

Patent #:	6503777	Issue Dt:	01/07/2003	Application #:	09929616	Filing Dt:	08/14/2001
Publication #:	US20020028534	Pub Dt:	03/07/2002
Title:	DEFLECTABLE INTERCONNECT

Patent #:	6556095	Issue Dt:	04/29/2003	Application #:	09929648	Filing Dt:	08/14/2001
Publication #:	US20020027480	Pub Dt:	03/07/2002
Title:	METHOD TO FIND A VALUE WITHIN A RANGE USING WEIGHTED SUBRANGES

Patent #:	6646493	Issue Dt:	11/11/2003	Application #:	09929776	Filing Dt:	08/14/2001
Publication #:	US20030034826	Pub Dt:	02/20/2003
Title:	VOLTAGE CHARGE PUMP WITH CIRCUIT TO PREVENT PASS DEVICE LATCH-UP

Patent #:	6587868	Issue Dt:	07/01/2003	Application #:	09930055	Filing Dt:	08/14/2001
Publication #:	US20020016877	Pub Dt:	02/07/2002
Title:	COMPUTER SYSTEM HAVING PEER-TO-PEER BUS BRIDGES AND SHADOW CONFIGURATION REGISTERS

Patent #:	6472322	Issue Dt:	10/29/2002	Application #:	09930268	Filing Dt:	08/16/2001
Publication #:	US20020025665	Pub Dt:	02/28/2002
Title:	METHOD OF FORMING A METAL TO POLYSILICON CONTACT IN OXYGEN ENVIRONMENT

Patent #:	6462987	Issue Dt:	10/08/2002	Application #:	09930875	Filing Dt:	08/15/2001
Publication #:	US20020031011	Pub Dt:	03/14/2002
Title:	DIRECT-COMPARISON READING CIRCUIT FOR A NONVOLATILE MEMORY ARRAY

Patent #:	6744093	Issue Dt:	06/01/2004	Application #:	09930958	Filing Dt:	08/17/2001
Publication #:	US20010052608	Pub Dt:	12/20/2001
Title:	MULTILAYER ELECTRODE FOR A FERROELECTRIC CAPACITOR

Patent #:	7461139	Issue Dt:	12/02/2008	Application #:	09932241	Filing Dt:	08/17/2001
Publication #:	US20030037120	Pub Dt:	02/20/2003
Title:	NETWORK COMPUTER PROVIDING MASS STORAGE, BROADBAND ACCESS, AND OTHER ENHANCED FUNCTIONALITY

Patent #:	6444586	Issue Dt:	09/03/2002	Application #:	09932601	Filing Dt:	08/17/2001
Publication #:	US20010053609	Pub Dt:	12/20/2001
Title:	METHOD OF ETCHING DOPED SILICON DIOXIDE WITH SELECTIVITY TO UNDOPED SILICON DIOXIDE WITH A HIGH DENSITY PLASMA ETCHER

Patent #:	6433413	Issue Dt:	08/13/2002	Application #:	09932859	Filing Dt:	08/17/2001
Title:	THREE-DIMENSIONAL MULTICHIP MODULE

Patent #:	6967125	Issue Dt:	11/22/2005	Application #:	09933297	Filing Dt:	08/20/2001
Publication #:	US20030164554	Pub Dt:	09/04/2003
Title:	QUAD FLAT NO LEAD (QFN) GRID ARRAY PACKAGE, METHOD OF MAKING AND MEMORY MODULE AND COMPUTER SYSTEM INCLUDING SAME

Patent #:	6526497	Issue Dt:	02/25/2003	Application #:	09933318	Filing Dt:	08/20/2001
Title:	MEMORY CACHE WITH SEQUENTIAL PAGE INDICATORS

Patent #:	6538467	Issue Dt:	03/25/2003	Application #:	09933988	Filing Dt:	08/20/2001
Publication #:	US20030034797	Pub Dt:	02/20/2003
Title:	MULTI-ACCESS FIFO QUEUE

Patent #:	7045889	Issue Dt:	05/16/2006	Application #:	09934175	Filing Dt:	08/21/2001
Publication #:	US20030040139	Pub Dt:	02/27/2003
Title:	DEVICE FOR ESTABLISHING NON-PERMANENT ELECTRICAL CONNECTION BETWEEN AN INTEGRATED CIRCUIT DEVICE LEAD ELEMENT AND A SUBSTRATE

Patent #:	6573592	Issue Dt:	06/03/2003	Application #:	09934278	Filing Dt:	08/21/2001
Publication #:	US20030038381	Pub Dt:	02/27/2003
Title:	INTERPOSER UTILIZING A PERIMETER WALL TO UNDERFILL THE AREA BETWEEN A FLIP CHIP AND THE INTERPOSER

Patent #:	6556503	Issue Dt:	04/29/2003	Application #:	09934344	Filing Dt:	08/21/2001
Publication #:	US20030039167	Pub Dt:	02/27/2003
Title:	METHODS AND APPARATUS FOR REDUCING DECODER AREA

Patent #:	6544864	Issue Dt:	04/08/2003	Application #:	09934910	Filing Dt:	08/22/2001
Publication #:	US20020028599	Pub Dt:	03/07/2002
Title:	METHODS EMPLOYING HYBRID ADHESIVE MATERIALS TO SECURE COMPONENTS OF SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES TO ONE ANOTHER AND ASSEMBLIES AND PACKAGES INCLUDING COMPONENTS SECURED TO ONE ANOTHER WITH SUCH HYBRID ADHESIVE MATERIALS

Patent #:	6548897	Issue Dt:	04/15/2003	Application #:	09934917	Filing Dt:	08/22/2001
Publication #:	US20020024136	Pub Dt:	02/28/2002
Title:	RING POSITIONABLE ABOUT A PERIPHERY OF A CONTACT PAD, SEMICONDUCTOR DEVICE COMPONENTS INCLUDING SAME, AND METHODS FOR POSITIONING THE RING AROUND A CONTACT PAD

Patent #:	6570807	Issue Dt:	05/27/2003	Application #:	09934969	Filing Dt:	08/22/2001
Publication #:	US20030039164	Pub Dt:	02/27/2003
Title:	INTERMEDIATE BOOSTED ARRAY VOLTAGE

Patent #:	6547640	Issue Dt:	04/15/2003	Application #:	09935067	Filing Dt:	08/21/2001
Publication #:	US20020119731	Pub Dt:	08/29/2002
Title:	DEVICES AND METHODS FOR IN-SITU CONTROL OF MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC-DEVICE SUBSTRATE ASSEMBLIES

Patent #:	6380596	Issue Dt:	04/30/2002	Application #:	09935469	Filing Dt:	08/21/2001
Title:	METHOD OF FORMING A LOCAL INTERCONNECT, METHOD OF FABRICATING INTEGRATED CIRCUITRY COMPRISING AN SRAM CELL HAVING A LOCAL INTERCONNECT AND HAVING CIRCUITRY PERIPHERAL TO THE SRAM CELL, AND METHOD OF FORMING CONTACT PLUGS

Patent #:	6423620	Issue Dt:	07/23/2002	Application #:	09935474	Filing Dt:	08/21/2001
Publication #:	US20010055860	Pub Dt:	12/27/2001
Title:	SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS, METHODS OF FORMING MEMORY CIRCUITRY, METHODS OF FORMING ELECTRICAL CONNECTIONS, AND METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY

Patent #:	6613662	Issue Dt:	09/02/2003	Application #:	09935494	Filing Dt:	08/23/2001
Publication #:	US20010054771	Pub Dt:	12/27/2001
Title:	METHOD FOR MAKING PROJECTED CONTACT STRUCTURES FOR ENGAGING BUMPED SEMICONDUCTOR DEVICES

Patent #:	6501114	Issue Dt:	12/31/2002	Application #:	09938463	Filing Dt:	08/23/2001
Publication #:	US20020025644	Pub Dt:	02/28/2002
Title:	STRUCTURES COMPRISING TRANSISTOR GATES

Patent #:	6495994	Issue Dt:	12/17/2002	Application #:	09938615	Filing Dt:	08/27/2001
Title:	REGULATOR CIRCUIT FOR INDEPENDENT ADJUSTMENT OF PUMPS IN MULTIPLE MODES OF OPERATION

Patent #:	7033514	Issue Dt:	04/25/2006	Application #:	09938644	Filing Dt:	08/27/2001
Publication #:	US20030040178	Pub Dt:	02/27/2003
Title:	METHOD AND APPARATUS FOR MICROMACHINING USING A MAGNETIC FIELD AND PLASMA ETCHING

Patent #:	6723219	Issue Dt:	04/20/2004	Application #:	09938645	Filing Dt:	08/27/2001
Publication #:	US20030038036	Pub Dt:	02/27/2003
Title:	METHOD OF DIRECT ELECTROPLATING ON A LOW CONDUCTIVITY MATERIAL, AND ELECTROPLATED METAL DEPOSITED THEREWITH

Patent #:	6556643	Issue Dt:	04/29/2003	Application #:	09938646	Filing Dt:	08/27/2001
Publication #:	US20030038662	Pub Dt:	02/27/2003
Title:	MAJORITY FILTER COUNTER CIRCUIT

Patent #:	6597600	Issue Dt:	07/22/2003	Application #:	09938722	Filing Dt:	08/27/2001
Publication #:	US20030039162	Pub Dt:	02/27/2003
Title:	OFFSET COMPENSATED SENSING FOR MAGNETIC RANDOM ACCESS MEMORY

Patent #:	6948026	Issue Dt:	09/20/2005	Application #:	09938782	Filing Dt:	08/24/2001
Publication #:	US20030041210	Pub Dt:	02/27/2003
Title:	ERASE BLOCK MANAGEMENT

Patent #:	7518223	Issue Dt:	04/14/2009	Application #:	09939253	Filing Dt:	08/24/2001
Publication #:	US20030038355	Pub Dt:	02/27/2003
Title:	SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING A NONCONFLUENT SPACER LAYER

Patent #:	6614695	Issue Dt:	09/02/2003	Application #:	09939394	Filing Dt:	08/24/2001
Publication #:	US20030039145	Pub Dt:	02/27/2003
Title:	NON-VOLATILE MEMORY WITH BLOCK ERASE

Patent #:	6541843	Issue Dt:	04/01/2003	Application #:	09939409	Filing Dt:	08/24/2001
Publication #:	US20020022358	Pub Dt:	02/21/2002
Title:	ANTI-REFLECTIVE COATINGS AND METHODS FOR FORMING AND USING SAME

Patent #:	6673713	Issue Dt:	01/06/2004	Application #:	09939415	Filing Dt:	08/24/2001
Publication #:	US20020022359	Pub Dt:	02/21/2002
Title:	ANTI-REFLECTIVE COATINGS AND METHODS FOR FORMING AND USING SAME

Patent #:	6744094	Issue Dt:	06/01/2004	Application #:	09939417	Filing Dt:	08/24/2001
Publication #:	US20030038318	Pub Dt:	02/27/2003
Title:	FLOATING GATE TRANSISTOR WITH HORIZONTAL GATE LAYERS STACKED NEXT TO VERTICAL BODY

Patent #:	6612668	Issue Dt:	09/02/2003	Application #:	09939429	Filing Dt:	08/24/2001
Publication #:	US20030038567	Pub Dt:	02/27/2003
Title:	PORTABLE COMPUTER WITH ARTICULATE BASE

Patent #:	6722943	Issue Dt:	04/20/2004	Application #:	09939430	Filing Dt:	08/24/2001
Publication #:	US20030143927	Pub Dt:	07/31/2003
Title:	PLANARIZING MACHINES AND METHODS FOR DISPENSING PLANARIZING SOLUTIONS IN THE PROCESSING OF MICROELECTRONIC WORKPIECES

Patent #:	6753264	Issue Dt:	06/22/2004	Application #:	09939651	Filing Dt:	08/28/2001
Publication #:	US20020019140	Pub Dt:	02/14/2002
Title:	METHOD OF CONTROLLING STRIATIONS AND CD LOSS IN CONTACT OXIDE ETCH

Patent #:	6429044	Issue Dt:	08/06/2002	Application #:	09939652	Filing Dt:	08/28/2001
Publication #:	US20020024116	Pub Dt:	02/28/2002
Title:	METHOD AND APPARATUS FOR MAGNETIC SHIELDING OF AN INTEGRATED CIRCUIT

Patent #:	6577525	Issue Dt:	06/10/2003	Application #:	09939655	Filing Dt:	08/28/2001
Publication #:	US20030043616	Pub Dt:	03/06/2003
Title:	SENSING METHOD AND APPARATUS FOR RESISTANCE MEMORY DEVICE

Patent #:	6546512	Issue Dt:	04/08/2003	Application #:	09940010	Filing Dt:	08/27/2001
Title:	SEMICONDUCTOR INTEGRATED CIRCUIT HAVING COMPRESSION CIRCUITRY FOR COMPRESSING TEST DATA, AND THE TEST SYSTEM AND METHOD FOR UTILIZING THE SEMICONDUCTOR INTEGRATED CIRCUIT

Patent #:	6439450	Issue Dt:	08/27/2002	Application #:	09940203	Filing Dt:	08/27/2001
Publication #:	US20020023943	Pub Dt:	02/28/2002
Title:	CONCAVE FACE WIRE BOND CAPILLARY

Patent #:	6667554	Issue Dt:	12/23/2003	Application #:	09940229	Filing Dt:	08/27/2001
Publication #:	US20020009879	Pub Dt:	01/24/2002
Title:	EXPANDED IMPLANTATION OF CONTACT HOLES

Patent #:	6509245	Issue Dt:	01/21/2003	Application #:	09940328	Filing Dt:	08/27/2001
Publication #:	US20020155677	Pub Dt:	10/24/2002
Title:	ELECTRONIC DEVICE WITH INTERLEAVED PORTIONS FOR USE IN INTEGRATED CIRCUITS

Patent #:	7164188	Issue Dt:	01/16/2007	Application #:	09940792	Filing Dt:	08/29/2001
Publication #:	US20020070419	Pub Dt:	06/13/2002
Title:	BURIED CONDUCTOR PATTERNS FORMED BY SURFACE TRANSFORMATION OF EMPTY SPACES IN SOLID STATE MATERIALS

Patent #:	6452867	Issue Dt:	09/17/2002	Application #:	09940915	Filing Dt:	08/28/2001
Publication #:	US20020024872	Pub Dt:	02/28/2002
Title:	FULL PAGE INCREMENT/DECREMENT BURST FOR DDR SDRAM/SGRAM

Patent #:	6529421	Issue Dt:	03/04/2003	Application #:	09940968	Filing Dt:	08/28/2001
Publication #:	US20030043640	Pub Dt:	03/06/2003
Title:	SRAM ARRAY WITH TEMPERATURE-COMPENSATED THRESHOLD VOLTAGE

Patent #:	6510080	Issue Dt:	01/21/2003	Application #:	09940976	Filing Dt:	08/28/2001
Title:	THREE TERMINAL MAGNETIC RANDOM ACCESS MEMORY

Patent #:	7117139	Issue Dt:	10/03/2006	Application #:	09941068	Filing Dt:	08/28/2001
Publication #:	US20030093584	Pub Dt:	05/15/2003
Title:	CO-SIMULATION OF VERILOG/PLI AND SYSTEM C MODULES USING REMOTE PROCEDURE CALL

Patent #:	6584030	Issue Dt:	06/24/2003	Application #:	09941130	Filing Dt:	08/28/2001
Publication #:	US20030043677	Pub Dt:	03/06/2003
Title:	MEMORY CIRCUIT REGULATION SYSTEM AND METHOD

Patent #:	6456518	Issue Dt:	09/24/2002	Application #:	09941201	Filing Dt:	08/28/2001
Publication #:	US20020024144	Pub Dt:	02/28/2002
Title:	BI-LEVEL DIGIT LINE ARCHITECTURE FOR HIGH DENSITY DRAMS

Patent #:	6620648	Issue Dt:	09/16/2003	Application #:	09941315	Filing Dt:	08/29/2001
Publication #:	US20020024151	Pub Dt:	02/28/2002
Title:	MULTI-CHIP MODULE WITH EXTENSION

Patent #:	6512302	Issue Dt:	01/28/2003	Application #:	09941317	Filing Dt:	08/28/2001
Publication #:	US20020043658	Pub Dt:	04/18/2002
Title:	APPARATUS AND METHODS OF PACKAGING AND TESTING DIE

Patent #:	7941056	Issue Dt:	05/10/2011	Application #:	09941557	Filing Dt:	08/30/2001
Publication #:	US20030043426	Pub Dt:	03/06/2003
Title:	OPTICAL INTERCONNECT IN HIGH-SPEED MEMORY SYSTEMS

Patent #:	6628561	Issue Dt:	09/30/2003	Application #:	09941602	Filing Dt:	08/30/2001
Publication #:	US20030043676	Pub Dt:	03/06/2003
Title:	SMALL ANTI-FUSE CIRCUIT TO FACILITATE PARALLEL FUSE BLOWING

Patent #:	6441628	Issue Dt:	08/27/2002	Application #:	09941749	Filing Dt:	08/29/2001
Publication #:	US20020047720	Pub Dt:	04/25/2002
Title:	CSP BGA TEST SOCKET WITH INSERT AND METHOD

Patent #:	7250247	Issue Dt:	07/31/2007	Application #:	09941760	Filing Dt:	08/30/2001
Publication #:	US20020039820	Pub Dt:	04/04/2002
Title:	PHOTOLITHOGRAPHIC STRUCTURES USING MULTIPLE ANTI-REFLECTING COATINGS

Patent #:	6931480	Issue Dt:	08/16/2005	Application #:	09941763	Filing Dt:	08/30/2001
Publication #:	US20030046487	Pub Dt:	03/06/2003
Title:	METHOD AND APPARATUS FOR REFRESHING MEMORY TO PRESERVE DATA INTEGRITY

Patent #:	7049693	Issue Dt:	05/23/2006	Application #:	09941853	Filing Dt:	08/29/2001
Publication #:	US20030042595	Pub Dt:	03/06/2003
Title:	ELECTRICAL CONTACT ARRAY FOR SUBSTRATE ASSEMBLIES

Patent #:	6746952	Issue Dt:	06/08/2004	Application #:	09942108	Filing Dt:	08/29/2001
Publication #:	US20030042607	Pub Dt:	03/06/2003
Title:	DIFFUSION BARRIER LAYER FOR SEMICONDUCTOR WAFER FABRICATION

Patent #:	6518098	Issue Dt:	02/11/2003	Application #:	09942178	Filing Dt:	08/29/2001
Publication #:	US20020024133	Pub Dt:	02/28/2002
Title:	IC PACKAGE WITH DUAL HEAT SPREADERS

Patent #:	6500697	Issue Dt:	12/31/2002	Application #:	09942182	Filing Dt:	08/29/2001
Publication #:	US20020048852	Pub Dt:	04/25/2002
Title:	LEADFRAMES INCLUDING OFFSETS EXTENDING FROM A MAJOR PLANE THEREOF, PACKAGED SEMICONDUCTOR DEVICES INCLUDING SAME, AND METHODS OF DESIGNING AND FABRICATING SUCH LEADFRAMES

Patent #:	6613673	Issue Dt:	09/02/2003	Application #:	09942191	Filing Dt:	08/29/2001
Publication #:	US20020004304	Pub Dt:	01/10/2002
Title:	TECHNIQUE FOR ELIMINATION OF PITTING ON SILICON SUBSTRATE DURING GATE STACK ETCH

Patent #:	6556467	Issue Dt:	04/29/2003	Application #:	09942207	Filing Dt:	08/29/2001
Publication #:	US20020118585	Pub Dt:	08/29/2002
Title:	GATE VOLTAGE TESTKEY FOR ISOLATION TRANSISTOR

Patent #:	6426484	Issue Dt:	07/30/2002	Application #:	09942221	Filing Dt:	08/29/2001
Publication #:	US20020108940	Pub Dt:	08/15/2002
Title:	CIRCUIT AND METHOD FOR HEATING AN ADHESIVE TO PACKAGE OR REWORK A SEMICONDUCTOR DIE

Patent #:	6612027	Issue Dt:	09/02/2003	Application #:	09942246	Filing Dt:	08/29/2001
Publication #:	US20020004981	Pub Dt:	01/17/2002
Title:	METHOD AND APPARATUS FOR FORMING METAL CONTACTS ON A SUBSTRATE

Patent #:	6525943	Issue Dt:	02/25/2003	Application #:	09942247	Filing Dt:	08/29/2001
Publication #:	US20020024798	Pub Dt:	02/28/2002
Title:	HEAT SINK WITH ALIGNMENT AND RETAINING FEATURES

Patent #:	6789155	Issue Dt:	09/07/2004	Application #:	09942389	Filing Dt:	08/29/2001
Publication #:	US20030046477	Pub Dt:	03/06/2003
Title:	SYSTEM AND METHOD FOR CONTROLLING MULTI-BANK EMBEDDED DRAM

Patent #:	6639424	Issue Dt:	10/28/2003	Application #:	09942681	Filing Dt:	08/31/2001
Publication #:	US20030042932	Pub Dt:	03/06/2003
Title:	COMBINED DYNAMIC LOGIC GATE AND LEVEL SHIFTER AND METHOD EMPLOYING SAME

Patent #:	7042043	Issue Dt:	05/09/2006	Application #:	09943134	Filing Dt:	08/30/2001
Publication #:	US20030042527	Pub Dt:	03/06/2003
Title:	PROGRAMMABLE ARRAY LOGIC OR MEMORY DEVICES WITH ASYMMETRICAL TUNNEL BARRIERS

Patent #:	6444041	Issue Dt:	09/03/2002	Application #:	09943146	Filing Dt:	08/30/2001
Publication #:	US20020151159	Pub Dt:	10/17/2002
Title:	METHODS, COMPLEXES, AND SYSTEM FOR FORMING METAL-CONTAINING FILMS

Patent #:	6784018	Issue Dt:	08/31/2004	Application #:	09943187	Filing Dt:	08/29/2001
Publication #:	US20030049912	Pub Dt:	03/13/2003
Title:	METHOD OF FORMING CHALCOGENIDE COMPRISING DEVICES AND METHOD OF FORMING A PROGRAMMABLE MEMORY CELL OF MEMORY CIRCUITRY

Patent #:	6881623	Issue Dt:	04/19/2005	Application #:	09943190	Filing Dt:	08/29/2001
Publication #:	US20030045054	Pub Dt:	03/06/2003
Title:	METHOD OF FORMING CHALCOGENIDE COMPRISING DEVICES, METHOD OF FORMING A PROGRAMMABLE MEMORY CELL OF MEMORY CIRCUITRY, AND A CHALCOGENIDE COMPRISING DEVICE

Patent #:	6955940	Issue Dt:	10/18/2005	Application #:	09943199	Filing Dt:	08/29/2001
Publication #:	US20030045049	Pub Dt:	03/06/2003
Title:	METHOD OF FORMING CHALCOGENIDE COMPRISING DEVICES

Patent #:	6794709	Issue Dt:	09/21/2004	Application #:	09943324	Filing Dt:	08/30/2001
Publication #:	US20020004276	Pub Dt:	01/10/2002
Title:	STRUCTURE AND METHOD FOR DUAL GATE OXIDE THICKNESSES

Patent #:	6621755	Issue Dt:	09/16/2003	Application #:	09943367	Filing Dt:	08/30/2001
Publication #:	US20030048685	Pub Dt:	03/13/2003
Title:	TESTMODE TO INCREASE ACCLERATION IN BURN-IN

Patent #:	6511906	Issue Dt:	01/28/2003	Application #:	09943381	Filing Dt:	08/30/2001
Title:	SELECTIVE CMP SCHEME

Patent #:	6833308	Issue Dt:	12/21/2004	Application #:	09943393	Filing Dt:	08/30/2001
Publication #:	US20020004277	Pub Dt:	01/10/2002
Title:	STRUCTURE AND METHOD FOR DUAL GATE OXIDE THICKNESSES

Patent #:	6720221	Issue Dt:	04/13/2004	Application #:	09943398	Filing Dt:	08/30/2001
Title:	STRUCTURE AND METHOD FOR DUAL GATE OXIDE THICKNESSES

Patent #:	6709958	Issue Dt:	03/23/2004	Application #:	09943426	Filing Dt:	08/30/2001
Publication #:	US20030186504	Pub Dt:	10/02/2003
Title:	INTEGRATED CIRCUIT DEVICE AND FABRICATION USING METAL-DOPED CHALCOGENIDE MATERIALS

Patent #:	6560161	Issue Dt:	05/06/2003	Application #:	09943473	Filing Dt:	08/30/2001
Publication #:	US20030076733	Pub Dt:	04/24/2003
Title:	SYNCHRONOUS FLASH MEMORY COMMAND SEQUENCE

Patent #:	6549468	Issue Dt:	04/15/2003	Application #:	09943474	Filing Dt:	08/30/2001
Publication #:	US20030043636	Pub Dt:	03/06/2003
Title:	NON-VOLATILE MEMORY WITH ADDRESS DESCRAMBLING

Patent #:	6444818	Issue Dt:	09/03/2002	Application #:	09943478	Filing Dt:	08/30/2001
Publication #:	US20020016065	Pub Dt:	02/07/2002
Title:	METAL COMPLEXES WITH CHELATING C-, N-DONOR LIGANDS FOR FORMING METAL-CONTAINING FILMS

Patent #:	7057935	Issue Dt:	06/06/2006	Application #:	09943479	Filing Dt:	08/30/2001
Publication #:	US20030048664	Pub Dt:	03/13/2003
Title:	ERASE VERIFY FOR NON-VOLATILE MEMORY

100

Patent #:	6597609	Issue Dt:	07/22/2003	Application #:	09943480	Filing Dt:	08/30/2001
Publication #:	US20030043661	Pub Dt:	03/06/2003
Title:	NON-VOLATILE MEMORY WITH TEST ROWS FOR DISTURB DETECTION

Assignor

JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT

Exec Dt:

07/31/2019

Assignees

MICRON TECHNOLOGY, INC.

8000 S FEDERAL WAY

BOISE, IDAHO 83707

MICRON SEMICONDUCTOR PRODUCTS, INC.

8000 S FEDERAL WAY

BOISE, IDAHO 83707

Correspondence name and address
	WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
	ONE MARKET, SPEAR TOWER, SUITE 3300
	SAN FRANCISCO, CA 94105

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