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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:051028/0001   Pages: 834
Recorded: 11/12/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 16529
Page 26 of 166
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1
Patent #:
6699777
Issue Dt:
03/02/2004
Application #:
09971250
Filing Dt:
10/04/2001
Publication #:
US20030068876
Pub Dt:
04/10/2003
Title:
ETCH STOP LAYER IN POLY-METAL STRUCTURES
2
Patent #:
6656372
Issue Dt:
12/02/2003
Application #:
09971758
Filing Dt:
10/04/2001
Publication #:
US20030068897
Pub Dt:
04/10/2003
Title:
METHODS OF MAKING MAGNETORESISTIVE MEMORY DEVICES
3
Patent #:
6789169
Issue Dt:
09/07/2004
Application #:
09971841
Filing Dt:
10/04/2001
Publication #:
US20030070044
Pub Dt:
04/10/2003
Title:
EMBEDDED DRAM CACHE MEMORY AND METHOD HAVING REDUCED LATENCY
4
Patent #:
6779258
Issue Dt:
08/24/2004
Application #:
09971851
Filing Dt:
10/04/2001
Publication #:
US20020030575
Pub Dt:
03/14/2002
Title:
SEMICONDUCTOR PACKAGES AND METHODS FOR MAKING THE SAME
5
Patent #:
6660535
Issue Dt:
12/09/2003
Application #:
09971945
Filing Dt:
10/04/2001
Publication #:
US20020019093
Pub Dt:
02/14/2002
Title:
METHOD OF FORMING HAZE- FREE BST FILMS
6
Patent #:
6529026
Issue Dt:
03/04/2003
Application #:
09972266
Filing Dt:
10/09/2001
Title:
METHOD FOR FABRICATING AN INTERCONNECT FOR MAKING TEMPORARY ELECTRICAL CONNECTIONS TO SEMICONDUCTOR COMPONENTS
7
Patent #:
6515909
Issue Dt:
02/04/2003
Application #:
09972426
Filing Dt:
10/05/2001
Title:
FLASH MEMORY DEVICE WITH A VARIABLE ERASE PULSE
8
Patent #:
6542404
Issue Dt:
04/01/2003
Application #:
09972726
Filing Dt:
10/04/2001
Publication #:
US20020048187
Pub Dt:
04/25/2002
Title:
SMALL SIZE, LOW CONSUMPTION, MULTILEVEL NONVOLATILE MEMORY
9
Patent #:
6549485
Issue Dt:
04/15/2003
Application #:
09972753
Filing Dt:
10/05/2001
Publication #:
US20020067655
Pub Dt:
06/06/2002
Title:
CONTROL AND TIMING STRUCTURE FOR A MEMORY
10
Patent #:
6580637
Issue Dt:
06/17/2003
Application #:
09972769
Filing Dt:
10/05/2001
Publication #:
US20020067640
Pub Dt:
06/06/2002
Title:
SEMICONDUCTOR MEMORY ARCHITECTURE
11
Patent #:
6684173
Issue Dt:
01/27/2004
Application #:
09973527
Filing Dt:
10/09/2001
Publication #:
US20030074152
Pub Dt:
04/17/2003
Title:
SYSTEM AND METHOD OF TESTING NON-VOLATILE MEMORY CELLS
12
Patent #:
6667911
Issue Dt:
12/23/2003
Application #:
09973860
Filing Dt:
10/11/2001
Publication #:
US20030072183
Pub Dt:
04/17/2003
Title:
HIGH SPEED MEMORY ARCHITECTURE
13
Patent #:
6514795
Issue Dt:
02/04/2003
Application #:
09974192
Filing Dt:
10/10/2001
Title:
PACKAGED STACKED SEMICONDUCTOR DIE AND METHOD OF PREPARING SAME
14
Patent #:
6741253
Issue Dt:
05/25/2004
Application #:
09974364
Filing Dt:
10/09/2001
Publication #:
US20030067472
Pub Dt:
04/10/2003
Title:
EMBEDDED MEMORY SYSTEM AND METHOD INCLUDING DATA ERROR CORRECTION
15
Patent #:
6930524
Issue Dt:
08/16/2005
Application #:
09974386
Filing Dt:
10/09/2001
Publication #:
US20030067331
Pub Dt:
04/10/2003
Title:
DUAL-PHASE DELAY-LOCKED LOOP CIRCUIT AND METHOD
16
Patent #:
6501700
Issue Dt:
12/31/2002
Application #:
09974737
Filing Dt:
10/09/2001
Publication #:
US20020054537
Pub Dt:
05/09/2002
Title:
INTERNAL ADDRESSING STRUCTURE OF A SEMICONDUCTOR MEMORY
17
Patent #:
6774486
Issue Dt:
08/10/2004
Application #:
09974947
Filing Dt:
10/10/2001
Publication #:
US20030067074
Pub Dt:
04/10/2003
Title:
CIRCUIT BOARDS CONTAINING VIAS AND METHODS FOR PRODUCING SAME
18
Patent #:
7264456
Issue Dt:
09/04/2007
Application #:
09974958
Filing Dt:
10/10/2001
Publication #:
US20030067061
Pub Dt:
04/10/2003
Title:
LEADFRAME AND METHOD FOR REDUCING MOLD COMPOUND ADHESION PROBLEMS
19
Patent #:
6498063
Issue Dt:
12/24/2002
Application #:
09975879
Filing Dt:
10/12/2001
Title:
EVEN NUCLEATION BETWEEN SILICON AND OXIDE SURFACES FOR THIN SILICON NITRIDE FILM GROWTH
20
Patent #:
6646298
Issue Dt:
11/11/2003
Application #:
09975884
Filing Dt:
10/11/2001
Publication #:
US20030011012
Pub Dt:
01/16/2003
Title:
CAPACITOR WITH OXYGENATED METAL ELECTRODES AND HIGH DIELECTRIC CONSTANT MATERIALS
21
Patent #:
6614072
Issue Dt:
09/02/2003
Application #:
09976000
Filing Dt:
10/15/2001
Publication #:
US20020072174
Pub Dt:
06/13/2002
Title:
HIGH COUPLING SPLIT-GATE TRANSISTOR
22
Patent #:
6646913
Issue Dt:
11/11/2003
Application #:
09976473
Filing Dt:
10/11/2001
Publication #:
US20020054505
Pub Dt:
05/09/2002
Title:
METHOD FOR STORING AND READING DATA IN A MULTILEVEL NONVOLATILE MEMORY
23
Patent #:
7081398
Issue Dt:
07/25/2006
Application #:
09976635
Filing Dt:
10/12/2001
Publication #:
US20030071356
Pub Dt:
04/17/2003
Title:
METHODS OF FORMING A CONDUCTIVE LINE
24
Patent #:
6606264
Issue Dt:
08/12/2003
Application #:
09977288
Filing Dt:
10/16/2001
Publication #:
US20020018362
Pub Dt:
02/14/2002
Title:
PROGRAMMABLE CIRCUIT AND ITS METHOD OF OPERATION
25
Patent #:
6701419
Issue Dt:
03/02/2004
Application #:
09977561
Filing Dt:
10/15/2001
Publication #:
US20020087817
Pub Dt:
07/04/2002
Title:
INTERLACED MEMORY DEVICE WITH RANDOM OR SEQUENTIAL ACCESS
26
Patent #:
6433593
Issue Dt:
08/13/2002
Application #:
09977661
Filing Dt:
10/15/2001
Publication #:
US20020024365
Pub Dt:
02/28/2002
Title:
GATE COUPLED VOLTAGE SUPPORT FOR AN OUTPUT DRIVER CIRCUIT
27
Patent #:
6475899
Issue Dt:
11/05/2002
Application #:
09978071
Filing Dt:
10/17/2001
Publication #:
US20020063333
Pub Dt:
05/30/2002
Title:
LOW CAPACITANCE WIRING LAYOUT AND METHOD FOR MAKING SAME
28
Patent #:
6528429
Issue Dt:
03/04/2003
Application #:
09978489
Filing Dt:
10/15/2001
Publication #:
US20020025680
Pub Dt:
02/28/2002
Title:
METHODS OF ETCHING INSULATIVE MATERIALS, OF FORMING ELECTRICAL DEVICES, AND OF FORMING CAPACITORS
29
Patent #:
6831301
Issue Dt:
12/14/2004
Application #:
09978983
Filing Dt:
10/15/2001
Publication #:
US20030071334
Pub Dt:
04/17/2003
Title:
METHOD AND SYSTEM FOR ELECTRICALLY COUPLING A CHIP TO CHIP PACKAGE
30
Patent #:
6747348
Issue Dt:
06/08/2004
Application #:
09981948
Filing Dt:
10/16/2001
Publication #:
US20030071335
Pub Dt:
04/17/2003
Title:
APPARATUS AND METHOD FOR LEADLESS PACKAGING OF SEMICONDUCTOR DEVICES
31
Patent #:
6574141
Issue Dt:
06/03/2003
Application #:
09982246
Filing Dt:
10/16/2001
Publication #:
US20020085415
Pub Dt:
07/04/2002
Title:
DIFFERENTIAL REDUNDANCY MULTIPLEXOR FOR FLASH MEMORY DEVICES
32
Patent #:
6493280
Issue Dt:
12/10/2002
Application #:
09982682
Filing Dt:
10/22/2001
Publication #:
US20020121653
Pub Dt:
09/05/2002
Title:
METHOD OF REDUCING TRAPPED HOLES INDUCED BY ERASE OPERATIONS IN THE TUNNEL OXIDE OF FLASH MEMORY CELLS
33
Patent #:
7205223
Issue Dt:
04/17/2007
Application #:
09982953
Filing Dt:
10/22/2001
Publication #:
US20070042596
Pub Dt:
02/22/2007
Title:
Method of forming an interconnect structure for a semiconductor device
34
Patent #:
6656813
Issue Dt:
12/02/2003
Application #:
09982959
Filing Dt:
10/22/2001
Publication #:
US20020020895
Pub Dt:
02/21/2002
Title:
LOW LOSS HIGH Q INDUCTOR
35
Patent #:
6933572
Issue Dt:
08/23/2005
Application #:
09984778
Filing Dt:
10/31/2001
Publication #:
US20040077151
Pub Dt:
04/22/2004
Title:
FIELD-SHIELDED SOI-MOS STRUCTURE FREE FROM FLOATING BODY EFFECT, AND METHOD OF FABRICATION THEREFOR
36
Patent #:
6794238
Issue Dt:
09/21/2004
Application #:
09986167
Filing Dt:
11/07/2001
Publication #:
US20030087499
Pub Dt:
05/08/2003
Title:
PROCESS FOR FORMING METALLIZED CONTACTS TO PERIPHERY TRANSISTORS
37
Patent #:
6594172
Issue Dt:
07/15/2003
Application #:
09988960
Filing Dt:
11/19/2001
Publication #:
US20020114180
Pub Dt:
08/22/2002
Title:
METHOD OF SELECTIVELY FORMING LOCAL INTERCONNECTS USING DESIGN RULES
38
Patent #:
6815818
Issue Dt:
11/09/2004
Application #:
09988984
Filing Dt:
11/19/2001
Publication #:
US20030096497
Pub Dt:
05/22/2003
Title:
ELECTRODE STRUCTURE FOR USE IN AN INTEGRATED CIRCUIT
39
Patent #:
6759911
Issue Dt:
07/06/2004
Application #:
09989209
Filing Dt:
11/19/2001
Publication #:
US20030095009
Pub Dt:
05/22/2003
Title:
DELAY-LOCKED LOOP CIRCUIT AND METHOD USING A RING OSCILLATOR AND COUNTER-BASED DELAY
40
Patent #:
6911723
Issue Dt:
06/28/2005
Application #:
09989326
Filing Dt:
11/20/2001
Publication #:
US20020030262
Pub Dt:
03/14/2002
Title:
MULTIPLE DIE STACK APPARATUS EMPLOYING T-SHAPED INTERPOSER ELEMENTS
41
Patent #:
6512705
Issue Dt:
01/28/2003
Application #:
09989964
Filing Dt:
11/21/2001
Title:
METHOD AND APPARATUS FOR STANDBY POWER REDUCTION IN SEMICONDUCTOR DEVICES
42
Patent #:
6525399
Issue Dt:
02/25/2003
Application #:
09990022
Filing Dt:
11/21/2001
Publication #:
US20020050625
Pub Dt:
05/02/2002
Title:
APPARATUS FOR ROTATING A SUBTRATE DURING SEMICONDUCTOR PROCESSING HAVING PERMANENT MAGNETS AND ELECTROMAGNETS AND METHOD OF USING SAME
43
Patent #:
6451214
Issue Dt:
09/17/2002
Application #:
09990481
Filing Dt:
11/16/2001
Publication #:
US20020056697
Pub Dt:
05/16/2002
Title:
RUTHENIUM AND RUTHENIUM DIOXIDE REMOVAL METHOD AND MATERIAL
44
Patent #:
6454957
Issue Dt:
09/24/2002
Application #:
09990486
Filing Dt:
11/16/2001
Publication #:
US20020056701
Pub Dt:
05/16/2002
Title:
RUTHENIUM AND RUTHENIUM DIOXIDE REMOVAL METHOD AND MATERIAL
45
Patent #:
6904504
Issue Dt:
06/07/2005
Application #:
09991128
Filing Dt:
11/14/2001
Publication #:
US20030093641
Pub Dt:
05/15/2003
Title:
METHOD AND APPARATUS FOR SOFTWARE SELECTION OF PROTECTED REGISTER SETTINGS
46
Patent #:
6567318
Issue Dt:
05/20/2003
Application #:
09991493
Filing Dt:
11/21/2001
Publication #:
US20020093374
Pub Dt:
07/18/2002
Title:
CONTROL CIRCUIT FOR AN OUTPUT DRIVING STAGE OF AN INTEGRATED CIRCUIT
47
Patent #:
6522008
Issue Dt:
02/18/2003
Application #:
09991666
Filing Dt:
11/26/2001
Publication #:
US20020033538
Pub Dt:
03/21/2002
Title:
SUBTRACTIVE METALLIZATION STRUCTURE WITH LOW DIELECTRIC CONSTANT INSULATING LAYERS
48
Patent #:
6716763
Issue Dt:
04/06/2004
Application #:
09991982
Filing Dt:
11/26/2001
Publication #:
US20030096506
Pub Dt:
05/22/2003
Title:
METHOD OF CONTROLLING STRIATIONS AND CD LOSS IN CONTACT OXIDE ETCH
49
Patent #:
6665207
Issue Dt:
12/16/2003
Application #:
09992203
Filing Dt:
11/14/2001
Publication #:
US20030090923
Pub Dt:
05/15/2003
Title:
ROM EMBEDDED DRAM WITH DIELECTRIC REMOVAL/SHORT
50
Patent #:
6522576
Issue Dt:
02/18/2003
Application #:
09992213
Filing Dt:
11/14/2001
Publication #:
US20020034095
Pub Dt:
03/21/2002
Title:
MAGNETO-RESISTIVE MEMORY ARRAY
51
Patent #:
6884658
Issue Dt:
04/26/2005
Application #:
09992580
Filing Dt:
11/16/2001
Publication #:
US20020137258
Pub Dt:
09/26/2002
Title:
DIE STACKING SCHEME
52
Patent #:
6577379
Issue Dt:
06/10/2003
Application #:
09993053
Filing Dt:
11/05/2001
Title:
METHOD AND APPARATUS FOR SHAPING AND/OR ORIENTING RADIATION IRRADIATING A MICROLITHOGRAPHIC SUBSTRATE
53
Patent #:
6937948
Issue Dt:
08/30/2005
Application #:
09993336
Filing Dt:
11/13/2001
Publication #:
US20030093233
Pub Dt:
05/15/2003
Title:
FLASH MEMORY PROGRAM AND ERASE OPERATIONS
54
Patent #:
6489226
Issue Dt:
12/03/2002
Application #:
09995373
Filing Dt:
11/26/2001
Publication #:
US20020033490
Pub Dt:
03/21/2002
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS, METHODS OF FORMING MEMORY CIRCUITRY, METHODS OF FORMING ELECTRICAL CONNECTIONS, AND METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY
55
Patent #:
6418034
Issue Dt:
07/09/2002
Application #:
09995936
Filing Dt:
11/27/2001
Publication #:
US20020034068
Pub Dt:
03/21/2002
Title:
STACKED PRINTED CIRCUIT BOARD MEMORY MODULE AND METHOD OF AUGMENTING MEMORY THEREIN
56
Patent #:
6577010
Issue Dt:
06/10/2003
Application #:
09996253
Filing Dt:
11/28/2001
Publication #:
US20020111030
Pub Dt:
08/15/2002
Title:
STEPPED PHOTORESIST PROFILE AND OPENING FORMED USING THE PROFILE
57
Patent #:
7162028
Issue Dt:
01/09/2007
Application #:
09996255
Filing Dt:
11/28/2001
Publication #:
US20030043998
Pub Dt:
03/06/2003
Title:
UNIVERSAL TELEPHONY INTERFACE POLARITY DETECTOR
58
Patent #:
6690148
Issue Dt:
02/10/2004
Application #:
09996452
Filing Dt:
11/28/2001
Publication #:
US20030098675
Pub Dt:
05/29/2003
Title:
METHOD AND CIRCUIT FOR LIMITING A PUMPED VOLTAGE
59
Patent #:
6576988
Issue Dt:
06/10/2003
Application #:
09996595
Filing Dt:
11/30/2001
Publication #:
US20020053736
Pub Dt:
05/09/2002
Title:
SEMICONDUCTOR PACKAGE
60
Patent #:
6568510
Issue Dt:
05/27/2003
Application #:
09997214
Filing Dt:
11/15/2001
Publication #:
US20020119625
Pub Dt:
08/29/2002
Title:
FLASH MEMORY INCLUDING MEANS OF CHECKING MEMORY CELL THRESHOLD VOLTAGES
61
Patent #:
6586313
Issue Dt:
07/01/2003
Application #:
09997227
Filing Dt:
11/29/2001
Publication #:
US20030100166
Pub Dt:
05/29/2003
Title:
METHOD FOR AVOIDING THE EFFECTS OF LACK OF UNIFORMITY IN TRENCH ISOLATED INTEGRATED CIRCUITS
62
Patent #:
6934953
Issue Dt:
08/23/2005
Application #:
09997669
Filing Dt:
11/28/2001
Publication #:
US20030101293
Pub Dt:
05/29/2003
Title:
DEFERRED PROCEDURE CALL IN INTERFACE DESCRIPTON LANGUAGE
63
Patent #:
6455406
Issue Dt:
09/24/2002
Application #:
09997735
Filing Dt:
11/28/2001
Title:
SEMICONDUCTOR PROCESSING METHOD OF FORMING A CONDUCTIVE CONNECTION
64
Patent #:
6501140
Issue Dt:
12/31/2002
Application #:
09997737
Filing Dt:
11/28/2001
Publication #:
US20020033512
Pub Dt:
03/21/2002
Title:
TRANSISTOR STRUCTURES
65
Patent #:
7189602
Issue Dt:
03/13/2007
Application #:
09998165
Filing Dt:
12/03/2001
Publication #:
US20020055246
Pub Dt:
05/09/2002
Title:
METHOD AND APPARATUS FOR REDUCING SUBSTRATE BIAS VOLTAGE DROP
66
Patent #:
6552394
Issue Dt:
04/22/2003
Application #:
09998420
Filing Dt:
11/29/2001
Publication #:
US20020074597
Pub Dt:
06/20/2002
Title:
SEMICONDUCTOR TRANSISTOR DEVICES AND STRUCTURES WITH HALO REGIONS
67
Patent #:
6720822
Issue Dt:
04/13/2004
Application #:
09998902
Filing Dt:
10/31/2001
Publication #:
US20030080804
Pub Dt:
05/01/2003
Title:
NEGATIVE CHARGE PUMP ARCHITECTURE WITH SELF-GENERATED BOOSTED PHASES
68
Patent #:
6549486
Issue Dt:
04/15/2003
Application #:
09998903
Filing Dt:
10/31/2001
Title:
CIRCUIT FOR GENERATING A PULSE SIGNAL INDEPENDENT OF VOLTAGE AND TEMPERATURE VARIATIONS
69
Patent #:
6466047
Issue Dt:
10/15/2002
Application #:
09999502
Filing Dt:
12/04/2001
Title:
SYSTEM FOR TESTING BUMPED SEMICONDUCTOR COMPONENTS WITH ON-BOARD MULTIPLEX CIRCUIT FOR EXPANDING TESTER RESOURCES
70
Patent #:
6645846
Issue Dt:
11/11/2003
Application #:
09999513
Filing Dt:
10/24/2001
Publication #:
US20030074787
Pub Dt:
04/24/2003
Title:
METHODS OF FORMING CONDUCTIVE CONTACTS TO CONDUCTIVE STRUCTURES
71
Patent #:
6570232
Issue Dt:
05/27/2003
Application #:
09999557
Filing Dt:
10/19/2001
Publication #:
US20020047205
Pub Dt:
04/25/2002
Title:
LOCAL INTERCONNECT STRUCTURE FOR INTEGRATED CIRCUIT DEVICES, SOURCE STRUCTURE FOR THE SAME, AND METHOD FOR FABRICATING THE SAME
72
Patent #:
6717194
Issue Dt:
04/06/2004
Application #:
09999684
Filing Dt:
10/30/2001
Publication #:
US20030081462
Pub Dt:
05/01/2003
Title:
MAGNETO-RESISTIVE BIT STRUCTURE AND METHOD OF MANUFACTURE THEREFOR
73
Patent #:
6649444
Issue Dt:
11/18/2003
Application #:
10000438
Filing Dt:
10/24/2001
Publication #:
US20020068417
Pub Dt:
06/06/2002
Title:
STEREOLITHOGRAPHIC METHOD AND APPARATUS FOR FABRICATING SPACERS FOR SEMICONDUCTOR DEVICES AND RESULTING STRUCTURES
74
Patent #:
6727168
Issue Dt:
04/27/2004
Application #:
10001758
Filing Dt:
10/24/2001
Publication #:
US20030077855
Pub Dt:
04/24/2003
Title:
METHODS OF FORMING LOCAL INTERCONNECTS
75
Patent #:
6487111
Issue Dt:
11/26/2002
Application #:
10002071
Filing Dt:
10/31/2001
Publication #:
US20020039309
Pub Dt:
04/04/2002
Title:
MAGNETO-RESISTIVE MEMORY HAVING SENSE AMPLIFIER WITH OFFSET CONTROL
76
Patent #:
6673715
Issue Dt:
01/06/2004
Application #:
10002335
Filing Dt:
10/24/2001
Publication #:
US20030077890
Pub Dt:
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Title:
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Assignor
1
JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Exec Dt:
07/31/2019
Assignees
1
MICRON TECHNOLOGY, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
2
MICRON SEMICONDUCTOR PRODUCTS, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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