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Reel/Frame:	051028/0001			Pages:	834
		Recorded:	11/12/2019
Attorney Dkt #:	4816.244
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 16529
Page 29 of 166
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Patent #:	6737715	Issue Dt:	05/18/2004	Application #:	10090978	Filing Dt:	03/04/2002
Publication #:	US20020089006	Pub Dt:	07/11/2002
Title:	FIELD-EFFECT TRANSISTOR AND CORRESPONDING MANUFACTURING METHOD

Patent #:	7114084	Issue Dt:	09/26/2006	Application #:	10091031	Filing Dt:	03/06/2002
Publication #:	US20030172309	Pub Dt:	09/11/2003
Title:	DATA CONTROLLED PROGRAMMABLE POWER SUPPLY

Patent #:	7131889	Issue Dt:	11/07/2006	Application #:	10091052	Filing Dt:	03/04/2002
Title:	A METHOD FOR PLANARIZING MICROELECTRONIC WORKPIECES

Patent #:	6602778	Issue Dt:	08/05/2003	Application #:	10091649	Filing Dt:	03/05/2002
Publication #:	US20020089070	Pub Dt:	07/11/2002
Title:	APPARATUS AND METHODS FOR COUPLING CONDUCTIVE LEADS OF SEMICONDUCTOR ASSEMBLIES

Patent #:	6730367	Issue Dt:	05/04/2004	Application #:	10091938	Filing Dt:	03/05/2002
Publication #:	US20030170389	Pub Dt:	09/11/2003
Title:	ATOMIC LAYER DEPOSITION METHOD WITH POINT OF USE GENERATED REACTIVE GAS SPECIES

Patent #:	6744137	Issue Dt:	06/01/2004	Application #:	10092276	Filing Dt:	03/05/2002
Publication #:	US20020171143	Pub Dt:	11/21/2002
Title:	BUMPED DIE AND WIRE BONDED BOARD-ON-CHIP PACKAGE

Patent #:	6713404	Issue Dt:	03/30/2004	Application #:	10092874	Filing Dt:	03/05/2002
Publication #:	US20030168655	Pub Dt:	09/11/2003
Title:	SEMICONDUCTOR CONSTRUCTIONS; AND METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS

Patent #:	6952117	Issue Dt:	10/04/2005	Application #:	10093861	Filing Dt:	03/08/2002
Publication #:	US20030169087	Pub Dt:	09/11/2003
Title:	DISTRIBUTED CLOCK GENERATOR FOR SEMICONDUCTOR DEVICES AND RELATED METHOD OF OPERATING SEMICONDUCTOR DEVICES

Patent #:	6586285	Issue Dt:	07/01/2003	Application #:	10094017	Filing Dt:	03/06/2002
Title:	PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION METHOD OF FORMING TIANIUM SILICIDE COMPRISING LAYERS

Patent #:	6908784	Issue Dt:	06/21/2005	Application #:	10094161	Filing Dt:	03/06/2002
Title:	METHOD FOR FABRICATING ENCAPUSLATED SEMICONDUCTOR COMPONENTS

Patent #:	6900106	Issue Dt:	05/31/2005	Application #:	10094581	Filing Dt:	03/06/2002
Publication #:	US20030168689	Pub Dt:	09/11/2003
Title:	METHODS OF FORMING CAPACITOR CONSTRUCTIONS

Patent #:	6628158	Issue Dt:	09/30/2003	Application #:	10094804	Filing Dt:	03/12/2002
Publication #:	US20020118057	Pub Dt:	08/29/2002
Title:	INTEGRATED CIRCUIT AND METHOD FOR MINIMIZING CLOCK SKEWS

Patent #:	6570783	Issue Dt:	05/27/2003	Application #:	10094971	Filing Dt:	03/12/2002
Publication #:	US20030090932	Pub Dt:	05/15/2003
Title:	ASYMMETRIC MRAM CELL AND BIT DESIGN FOR IMPROVING BIT YIELD

Patent #:	6774687	Issue Dt:	08/10/2004	Application #:	10095149	Filing Dt:	03/11/2002
Publication #:	US20030169084	Pub Dt:	09/11/2003
Title:	METHOD AND APPARATUS FOR CHARACTERIZING A DELAY LOCKED LOOP

Patent #:	7294567	Issue Dt:	11/13/2007	Application #:	10095274	Filing Dt:	03/11/2002
Publication #:	US20030170954	Pub Dt:	09/11/2003
Title:	SEMICONDUCTOR CONTACT DEVICE AND METHOD

Patent #:	6671182	Issue Dt:	12/30/2003	Application #:	10095329	Filing Dt:	03/11/2002
Publication #:	US20020093801	Pub Dt:	07/18/2002
Title:	SOLDERMASK OPENING TO PREVENT DELAMINATION

Patent #:	6624515	Issue Dt:	09/23/2003	Application #:	10095362	Filing Dt:	03/11/2002
Publication #:	US20030168742	Pub Dt:	09/11/2003
Title:	MICROELECTRONIC DIE INCLUDING LOW RC UNDER-LAYER INTERCONNECTS

Patent #:	6576960	Issue Dt:	06/10/2003	Application #:	10095640	Filing Dt:	03/11/2002
Publication #:	US20020094627	Pub Dt:	07/18/2002
Title:	ELECTROSTATIC DISCHARGE PROTECTION DEVICE HAVING A GRADED JUNCTION AND METHOD FOR FORMING THE SAME

Patent #:	6621737	Issue Dt:	09/16/2003	Application #:	10096531	Filing Dt:	03/11/2002
Publication #:	US20020126534	Pub Dt:	09/12/2002
Title:	CIRCUIT AND ASSOCIATED METHOD FOR THE ERASURE OR PROGRAMMING OF A MEMORY CELL

Patent #:	6687989	Issue Dt:	02/10/2004	Application #:	10096649	Filing Dt:	03/12/2002
Title:	METHOD FOR FABRICATING INTERCONNECT HAVING SUPPORT MEMBERS FOR PREVENTING COMPONENT FLEXURE

Patent #:	6590819	Issue Dt:	07/08/2003	Application #:	10096928	Filing Dt:	03/14/2002
Title:	DIGIT LINE EQUILIBRATION USING TIME-MULTIPLEXED ISOLATION

Patent #:	6893506	Issue Dt:	05/17/2005	Application #:	10097025	Filing Dt:	03/11/2002
Publication #:	US20030170403	Pub Dt:	09/11/2003
Title:	ATOMIC LAYER DEPOSITION APPARATUS AND METHOD

Patent #:	7212021	Issue Dt:	05/01/2007	Application #:	10097136	Filing Dt:	03/12/2002
Publication #:	US20030176982	Pub Dt:	09/18/2003
Title:	MANUFACTURING INTEGRATED CIRCUITS AND TESTING ON-DIE POWER SUPPLIES USING DISTRIBUTED PROGRAMMABLE DIGITAL CURRENT SINKS

Patent #:	6586820	Issue Dt:	07/01/2003	Application #:	10097169	Filing Dt:	03/13/2002
Publication #:	US20020140056	Pub Dt:	10/03/2002
Title:	TREATMENT FOR FILM SURFACE TO REDUCE PHOTO FOOTING

Patent #:	6790663	Issue Dt:	09/14/2004	Application #:	10098659	Filing Dt:	03/12/2002
Publication #:	US20020094675	Pub Dt:	07/18/2002
Title:	METHODS OF CONTACTING LINES AND METHODS OF FORMING AN ELECTRICAL CONTACT IN A SEMICONDUCTOR DEVICE

Patent #:	6653241	Issue Dt:	11/25/2003	Application #:	10098680	Filing Dt:	03/12/2002
Publication #:	US20030176076	Pub Dt:	09/18/2003
Title:	METHODS OF FORMING PROTECTIVE SEGMENTS OF MATERIAL, AND ETCH STOPS

Patent #:	6677209	Issue Dt:	01/13/2004	Application #:	10099169	Filing Dt:	03/13/2002
Publication #:	US20020094651	Pub Dt:	07/18/2002
Title:	LOW DIELECTRIC CONSTANT STI WITH SOI DEVICES

Patent #:	6812100	Issue Dt:	11/02/2004	Application #:	10099194	Filing Dt:	03/13/2002
Publication #:	US20030176040	Pub Dt:	09/18/2003
Title:	EVAPORATION OF Y-SI-O FILMS FOR MEDIUM-K DIELECTRICS

Patent #:	7220312	Issue Dt:	05/22/2007	Application #:	10099216	Filing Dt:	03/13/2002
Publication #:	US20030186515	Pub Dt:	10/02/2003
Title:	METHODS FOR TREATING SEMICONDUCTOR SUBSTRATES

Patent #:	7235457	Issue Dt:	06/26/2007	Application #:	10099217	Filing Dt:	03/13/2002
Publication #:	US20030174529	Pub Dt:	09/18/2003
Title:	HIGH PERMEABILITY LAYERED FILMS TO REDUCE NOISE IN HIGH SPEED INTERCONNECTS

Patent #:	6730163	Issue Dt:	05/04/2004	Application #:	10099624	Filing Dt:	03/14/2002
Publication #:	US20030176065	Pub Dt:	09/18/2003
Title:	ALUMINUM-CONTAINING MATERIAL AND ATOMIC LAYER DEPOSITION METHODS

Patent #:	6716754	Issue Dt:	04/06/2004	Application #:	10099840	Filing Dt:	03/12/2002
Publication #:	US20030176014	Pub Dt:	09/18/2003
Title:	METHODS OF FORMING PATTERNS AND MOLDS FOR SEMICONDUCTOR CONSTRUCTIONS

Patent #:	7399424	Issue Dt:	07/15/2008	Application #:	10100319	Filing Dt:	03/07/2002
Publication #:	US20020139387	Pub Dt:	10/03/2002
Title:	COMPOSITIONS FOR DISSOLUTION OF LOW-K DIELECTRIC FILMS, AND METHODS OF USE

Patent #:	6617262	Issue Dt:	09/09/2003	Application #:	10100397	Filing Dt:	03/18/2002
Publication #:	US20020102863	Pub Dt:	08/01/2002
Title:	SPUTTERED INSULATING LAYER FOR WORDLINE STACKS

Patent #:	6976300	Issue Dt:	12/20/2005	Application #:	10100702	Filing Dt:	03/18/2002
Publication #:	US20020095768	Pub Dt:	07/25/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	6817087	Issue Dt:	11/16/2004	Application #:	10100706	Filing Dt:	03/18/2002
Publication #:	US20020095769	Pub Dt:	07/25/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	7388462	Issue Dt:	06/17/2008	Application #:	10100709	Filing Dt:	03/18/2002
Publication #:	US20020095770	Pub Dt:	07/25/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	6825747	Issue Dt:	11/30/2004	Application #:	10100710	Filing Dt:	03/18/2002
Publication #:	US20020095771	Pub Dt:	07/25/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	6910260	Issue Dt:	06/28/2005	Application #:	10100715	Filing Dt:	03/18/2002
Publication #:	US20020095772	Pub Dt:	07/25/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	7158004	Issue Dt:	01/02/2007	Application #:	10100720	Filing Dt:	03/18/2002
Publication #:	US20020095773	Pub Dt:	07/25/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	6779250	Issue Dt:	08/24/2004	Application #:	10100789	Filing Dt:	03/19/2002
Publication #:	US20020095774	Pub Dt:	07/25/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	6900716	Issue Dt:	05/31/2005	Application #:	10101142	Filing Dt:	03/18/2002
Publication #:	US20020097132	Pub Dt:	07/25/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	6850141	Issue Dt:	02/01/2005	Application #:	10101403	Filing Dt:	03/18/2002
Publication #:	US20020095775	Pub Dt:	07/25/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	6822545	Issue Dt:	11/23/2004	Application #:	10101404	Filing Dt:	03/18/2002
Publication #:	US20020095776	Pub Dt:	07/25/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	6646534	Issue Dt:	11/11/2003	Application #:	10101419	Filing Dt:	03/18/2002
Publication #:	US20020101320	Pub Dt:	08/01/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	6701607	Issue Dt:	03/09/2004	Application #:	10102070	Filing Dt:	03/19/2002
Publication #:	US20020095777	Pub Dt:	07/25/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	6760967	Issue Dt:	07/13/2004	Application #:	10102071	Filing Dt:	03/19/2002
Publication #:	US20020100161	Pub Dt:	08/01/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	6690606	Issue Dt:	02/10/2004	Application #:	10102221	Filing Dt:	03/19/2002
Publication #:	US20030179612	Pub Dt:	09/25/2003
Title:	ASYNCHRONOUS INTERFACE CIRCUIT AND METHOD FOR A PSEUDO-STATIC MEMORY DEVICE

Patent #:	6881277	Issue Dt:	04/19/2005	Application #:	10102304	Filing Dt:	03/19/2002
Publication #:	US20020096194	Pub Dt:	07/25/2002
Title:	METHOD OF PROCESSING SELECTED SURFACES IN A SEMICONDUCTOR PROCESS CHAMBER BASED ON A TEMPERATURE DIFFERENTIAL BETWEEN SURFACES

Patent #:	6948230	Issue Dt:	09/27/2005	Application #:	10102420	Filing Dt:	03/19/2002
Publication #:	US20020095778	Pub Dt:	07/25/2002
Title:	INTEGRATED CIRCUIT INDUCTORS

Patent #:	6777770	Issue Dt:	08/17/2004	Application #:	10105672	Filing Dt:	03/25/2002
Publication #:	US20030178729	Pub Dt:	09/25/2003
Title:	FILMS DEPOSITED AT GLANCING INCIDENCE FOR MULTILEVEL METALLIZATION

Patent #:	6926190	Issue Dt:	08/09/2005	Application #:	10106009	Filing Dt:	03/25/2002
Publication #:	US20030178474	Pub Dt:	09/25/2003
Title:	INTEGRATED CIRCUIT ASSEMBLIES AND ASSEMBLY METHODS

Patent #:	7132348	Issue Dt:	11/07/2006	Application #:	10106915	Filing Dt:	03/25/2002
Publication #:	US20030181018	Pub Dt:	09/25/2003
Title:	LOW K INTERCONNECT DIELECTRIC USING SURFACE TRANSFORMATION

Patent #:	6943065	Issue Dt:	09/13/2005	Application #:	10106916	Filing Dt:	03/25/2002
Publication #:	US20030178693	Pub Dt:	09/25/2003
Title:	SCALABLE HIGH PERFORMANCE ANTIFUSE STRUCTURE AND PROCESS

Patent #:	6683806	Issue Dt:	01/27/2004	Application #:	10107605	Filing Dt:	03/26/2002
Publication #:	US20030185045	Pub Dt:	10/02/2003
Title:	METHODS OF OPERATING MRAM DEVICES

Patent #:	6534408	Issue Dt:	03/18/2003	Application #:	10107764	Filing Dt:	03/27/2002
Publication #:	US20020102854	Pub Dt:	08/01/2002
Title:	UTILIZATION OF DISAPPEARING SILICON HARD MASK FOR FABRICATION OF SEMICONDUCTOR STRUCTURES

Patent #:	6600171	Issue Dt:	07/29/2003	Application #:	10107884	Filing Dt:	03/28/2002
Title:	Semiconductor component and system for fabricating contacts on semiconductor components

Patent #:	7066790	Issue Dt:	06/27/2006	Application #:	10108067	Filing Dt:	03/26/2002
Publication #:	US20020164927	Pub Dt:	11/07/2002
Title:	CHEMICAL-MECHANICAL POLISHING METHODS

Patent #:	6660136	Issue Dt:	12/09/2003	Application #:	10109421	Filing Dt:	03/27/2002
Publication #:	US20030183507	Pub Dt:	10/02/2003
Title:	METHOD OF FORMING A NON-VOLATILE RESISTANCE VARIABLE DEVICE AND METHOD OF FORMING A METAL LAYER COMPRISING SILVER AND TUNGSTEN

Patent #:	6611475	Issue Dt:	08/26/2003	Application #:	10112173	Filing Dt:	03/29/2002
Publication #:	US20030043685	Pub Dt:	03/06/2003
Title:	SYSTEM AND METHOD FOR SKEW COMPENSATING A CLOCK SIGNAL AND FOR CAPTURING A DIGITAL SIGNAL USING THE SKEW COMPENSATED CLOCK SIGNAL

Patent #:	6768617	Issue Dt:	07/27/2004	Application #:	10112774	Filing Dt:	04/02/2002
Publication #:	US20020109950	Pub Dt:	08/15/2002
Title:	SETPOINT SILICON CONTROLLED RECTIFIER (SCR) ELECTROSTATIC DISCHARGE (ESD) CORE CLAMP

Patent #:	6570400	Issue Dt:	05/27/2003	Application #:	10113995	Filing Dt:	03/29/2002
Publication #:	US20020140449	Pub Dt:	10/03/2002
Title:	METHOD FOR DISABLING AND RE-ENABLING ACCESS TO IC TEST FUNCTIONS

Patent #:	6790684	Issue Dt:	09/14/2004	Application #:	10114134	Filing Dt:	04/02/2002
Publication #:	US20020110953	Pub Dt:	08/15/2002
Title:	WAFER ON WAFER PACKAGING AND METHOD OF FABRICATION FOR FULL-WAFER BURN-IN AND TESTING

Patent #:	6653208	Issue Dt:	11/25/2003	Application #:	10114558	Filing Dt:	04/02/2002
Publication #:	US20020098619	Pub Dt:	07/25/2002
Title:	WAFER ON WAFER PACKAGING AND METHOD OF FABRICATION FOR FULL-WAFER BURN-IN AND TESTING

Patent #:	7041595	Issue Dt:	05/09/2006	Application #:	10114759	Filing Dt:	04/02/2002
Publication #:	US20020142583	Pub Dt:	10/03/2002
Title:	METHOD OF FORMING A BARRIER SEED LAYER WITH GRADED NITROGEN COMPOSITION

Patent #:	6917994	Issue Dt:	07/12/2005	Application #:	10115888	Filing Dt:	04/03/2002
Publication #:	US20020184420	Pub Dt:	12/05/2002
Title:	DEVICE AND METHOD FOR AUTOMATICALLY GENERATING AN APPROPRIATE NUMBER OF WAIT CYCLES WHILE READING A NONVOLATILE MEMORY

Patent #:	6559521	Issue Dt:	05/06/2003	Application #:	10115960	Filing Dt:	04/05/2002
Publication #:	US20020105058	Pub Dt:	08/08/2002
Title:	CHIP CARRIER WITH MAGNETIC SHIELDING

Patent #:	6548405	Issue Dt:	04/15/2003	Application #:	10116385	Filing Dt:	04/02/2002
Publication #:	US20020106896	Pub Dt:	08/08/2002
Title:	BATCH PROCESSING FOR SEMICONDUCTOR WAFERS TO FORM ALUMINUM NITRIDE AND TITANIUM ALUMINUM NITRIDE

Patent #:	6521953	Issue Dt:	02/18/2003	Application #:	10116809	Filing Dt:	04/04/2002
Publication #:	US20020190339	Pub Dt:	12/19/2002
Title:	SEMICONDUCTOR CMOS STRUCTURES WITH AN UNDOPED REGION

Patent #:	6558979	Issue Dt:	05/06/2003	Application #:	10116962	Filing Dt:	04/05/2002
Publication #:	US20020115279	Pub Dt:	08/22/2002
Title:	USE OF PALLADIUM IN IC MANUFACTURING WITH CONDUCTIVE POLYMER BUMP

Patent #:	6599799	Issue Dt:	07/29/2003	Application #:	10117036	Filing Dt:	04/08/2002
Publication #:	US20020109170	Pub Dt:	08/15/2002
Title:	DOUBLE SIDED CONTAINER CAPACITOR FOR DRAM CELL ARRAY AND METHOD OF FORMING SAME

Patent #:	7105914	Issue Dt:	09/12/2006	Application #:	10117041	Filing Dt:	04/05/2002
Publication #:	US20020109233	Pub Dt:	08/15/2002
Title:	INTEGRATED CIRCUIT AND SEED LAYERS

Patent #:	7157761	Issue Dt:	01/02/2007	Application #:	10117101	Filing Dt:	04/08/2002
Publication #:	US20020115231	Pub Dt:	08/22/2002
Title:	A CAPACITOR WITH NOBLE METAL PATTERN

Patent #:	6722957	Issue Dt:	04/20/2004	Application #:	10117145	Filing Dt:	04/05/2002
Publication #:	US20020187732	Pub Dt:	12/12/2002
Title:	METHOD AND APPARATUS FOR PLANARIZING A MICROELECTRONIC SUBSTRATE WITH A TILTED PLANARIZING SURFACE

Patent #:	6844618	Issue Dt:	01/18/2005	Application #:	10117551	Filing Dt:	04/04/2002
Publication #:	US20030189243	Pub Dt:	10/09/2003
Title:	MICROELECTRONIC PACKAGE WITH REDUCED UNDERFILL AND METHODS FOR FORMING SUCH PACKAGES

Patent #:	6739952	Issue Dt:	05/25/2004	Application #:	10117738	Filing Dt:	04/05/2002
Publication #:	US20020137438	Pub Dt:	09/26/2002
Title:	METHOD AND APPARATUS FOR PLANARIZING A MICROELECTRONIC SUBSTRATE WITH A TILTED PLANARIZING SURFACE

Patent #:	6678201	Issue Dt:	01/13/2004	Application #:	10118281	Filing Dt:	04/08/2002
Publication #:	US20030189867	Pub Dt:	10/09/2003
Title:	DISTRIBUTED FIFO IN SYNCHRONOUS MEMORY

Patent #:	7272623	Issue Dt:	09/18/2007	Application #:	10118349	Filing Dt:	04/08/2002
Publication #:	US20030191787	Pub Dt:	10/09/2003
Title:	METHODS AND APPARATUS FOR DETERMINING A FLOATING-POINT EXPONENT ASSOCIATED WITH AN UNDERFLOW CONDITION OR AN OVERFLOW CONDITION

Patent #:	7022604	Issue Dt:	04/04/2006	Application #:	10118350	Filing Dt:	04/09/2002
Publication #:	US20030190796	Pub Dt:	10/09/2003
Title:	METHOD OF FORMING SPATIAL REGIONS OF A SECOND MATERIAL IN A FIRST MATERIAL

Patent #:	6531342	Issue Dt:	03/11/2003	Application #:	10118365	Filing Dt:	04/08/2002
Publication #:	US20020115277	Pub Dt:	08/22/2002
Title:	METHODS FOR TRANSVERSE HYBRID LOC PACKAGE

Patent #:	7494901	Issue Dt:	02/24/2009	Application #:	10118393	Filing Dt:	04/05/2002
Publication #:	US20030189229	Pub Dt:	10/09/2003
Title:	METHODS OF FORMING SEMICONDUCTOR-ON-INSULATOR CONSTRUCTIONS

Patent #:	6784076	Issue Dt:	08/31/2004	Application #:	10118569	Filing Dt:	04/08/2002
Publication #:	US20030190766	Pub Dt:	10/09/2003
Title:	PROCESS FOR MAKING A SILICON-ON-INSULATOR LEDGE BY IMPLANTING IONS FROM SILICON SOURCE

Patent #:	7161236	Issue Dt:	01/09/2007	Application #:	10118580	Filing Dt:	04/08/2002
Publication #:	US20030047797	Pub Dt:	03/13/2003
Title:	BOW CONTROL IN AN ELECTRONIC PACKAGE

Patent #:	6590765	Issue Dt:	07/08/2003	Application #:	10118582	Filing Dt:	04/08/2002
Publication #:	US20020109966	Pub Dt:	08/15/2002
Title:	COMPUTER HOUSING WITH EXPANSION BAY COVER AND METHODS FOR OPERATING EXPANSION BAY COVERS

Patent #:	6657895	Issue Dt:	12/02/2003	Application #:	10118660	Filing Dt:	04/08/2002
Publication #:	US20020186592	Pub Dt:	12/12/2002
Title:	READING CIRCUIT AND METHOD FOR A MULTILEVEL NON-VOLATILE MEMORY

Patent #:	6567770	Issue Dt:	05/20/2003	Application #:	10118844	Filing Dt:	04/09/2002
Publication #:	US20020111775	Pub Dt:	08/15/2002
Title:	REMOTE SEMICONDUCTOR MICROSCOPY

Patent #:	6809981	Issue Dt:	10/26/2004	Application #:	10118891	Filing Dt:	04/10/2002
Publication #:	US20030193830	Pub Dt:	10/16/2003
Title:	WORDLINE DRIVEN METHOD FOR SENSING DATA IN A RESISTIVE MEMORY ARRAY

Patent #:	6677632	Issue Dt:	01/13/2004	Application #:	10118947	Filing Dt:	04/10/2002
Publication #:	US20020110987	Pub Dt:	08/15/2002
Title:	METHOD OF FORMING A METAL TO POLYSILICON CONTACT IN OXYGEN ENVIRONMENT

Patent #:	6788579	Issue Dt:	09/07/2004	Application #:	10119523	Filing Dt:	04/09/2002
Publication #:	US20020191444	Pub Dt:	12/19/2002
Title:	METHOD FOR PROGRAMMING NONVOLATILE MEMORY CELLS WITH PROGRAM AND VERIFY ALGORITHM USING A STAIRCASE VOLTAGE WITH VARYING STEP AMPLITUDE

Patent #:	6838331	Issue Dt:	01/04/2005	Application #:	10119550	Filing Dt:	04/09/2002
Publication #:	US20030191888	Pub Dt:	10/09/2003
Title:	METHOD AND SYSTEM FOR DYNAMICALLY OPERATING MEMORY IN A POWER-SAVING ERROR CORRECTION MODE

Patent #:	6787923	Issue Dt:	09/07/2004	Application #:	10120169	Filing Dt:	04/10/2002
Publication #:	US20030193092	Pub Dt:	10/16/2003
Title:	SOLDER MASKS FOR USE ON CARRIER SUBSTRATES, CARRIER SUBSTRATES AND SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING SUCH SOLDER MASKS, AND METHODS

Patent #:	6687179	Issue Dt:	02/03/2004	Application #:	10121085	Filing Dt:	04/10/2002
Publication #:	US20030193831	Pub Dt:	10/16/2003
Title:	METHOD AND SYSTEM FOR WRITING DATA IN AN MRAM MEMORY DEVICE

Patent #:	6717259	Issue Dt:	04/06/2004	Application #:	10121265	Filing Dt:	04/11/2002
Publication #:	US20020140086	Pub Dt:	10/03/2002
Title:	METHODS EMPLOYING HYBRID ADHESIVE MATERIALS TO SECURE COMPONENTS OF SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES TO ONE ANOTHER AND ASSEMBLIES AND PACKAGES INCLUDING COMPONENTS SECURED TO ONE ANOTHER WITH SUCH HYBRID ADHESIVE MATERIALS

Patent #:	6627932	Issue Dt:	09/30/2003	Application #:	10121298	Filing Dt:	04/11/2002
Publication #:	US20030194819	Pub Dt:	10/16/2003
Title:	SEMICONDUCTOR CONSTRUCTIONS AND METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS

Patent #:	6613587	Issue Dt:	09/02/2003	Application #:	10121302	Filing Dt:	04/11/2002
Title:	A METHOD OF REPLACING AT LEAST A PORTION OF A SEMICONDUCTOR SUBSTRATE DEPOSITION CHAMBER LINER

Patent #:	6743736	Issue Dt:	06/01/2004	Application #:	10121341	Filing Dt:	04/11/2002
Publication #:	US20030194861	Pub Dt:	10/16/2003
Title:	REACTIVE GASEOUS DEPOSITION PRECURSOR FEED APPARATUS

Patent #:	6670284	Issue Dt:	12/30/2003	Application #:	10121645	Filing Dt:	04/12/2002
Publication #:	US20020108632	Pub Dt:	08/15/2002
Title:	METHOD OF DECONTAMINATING PROCESS CHAMBERS, METHODS OF REDUCING DEFECTS IN ANTI-REFLECTIVE COATINGS, AND RESULTING SEMICONDUCTOR STRUCTURES

Patent #:	6647542	Issue Dt:	11/11/2003	Application #:	10121694	Filing Dt:	04/15/2002
Publication #:	US20020137272	Pub Dt:	09/26/2002
Title:	EFFICIENT FABRICATION PROCESS FOR DUAL WELL TYPE STRUCTURES

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Publication #:	US20030194865	Pub Dt:	10/16/2003
Title:	METHOD OF MANUFACTURE OF PROGRAMMABLE CONDUCTOR MEMORY

100

Patent #:	6652363	Issue Dt:	11/25/2003	Application #:	10121826	Filing Dt:	04/11/2002
Publication #:	US20020111123	Pub Dt:	08/15/2002
Title:	METHOD AND APPARATUS FOR UNIFORMLY PLANARIZING A MICROELECTRONIC SUBSTRATE

Assignor

JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT

Exec Dt:

07/31/2019

Assignees

MICRON TECHNOLOGY, INC.

8000 S FEDERAL WAY

BOISE, IDAHO 83707

MICRON SEMICONDUCTOR PRODUCTS, INC.

8000 S FEDERAL WAY

BOISE, IDAHO 83707

Correspondence name and address
	WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
	ONE MARKET, SPEAR TOWER, SUITE 3300
	SAN FRANCISCO, CA 94105

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