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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:051028/0001   Pages: 834
Recorded: 11/12/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
01/24/2006
Application #:
10634212
Filing Dt:
08/05/2003
Title:
MRAM SENSE LAYER ISOLATION
2
Patent #:
Issue Dt:
05/22/2007
Application #:
10634274
Filing Dt:
08/05/2003
Publication #:
Pub Dt:
02/10/2005
Title:
H2 PLASMA TREATMENT
3
Patent #:
Issue Dt:
03/20/2007
Application #:
10634352
Filing Dt:
08/05/2003
Publication #:
Pub Dt:
02/12/2004
Title:
USE OF LINEAR INJECTORS TO DEPOSIT UNIFORM SELECTIVE OZONE TEOS OXIDE FILM BY PULSING REACTANTS ON AND OFF
4
Patent #:
Issue Dt:
09/21/2004
Application #:
10634594
Filing Dt:
08/04/2003
Publication #:
Pub Dt:
02/26/2004
Title:
GLASS ATTACHMENT OVER MICRO-LENS ARRAYS
5
Patent #:
Issue Dt:
11/02/2004
Application #:
10634897
Filing Dt:
08/06/2003
Publication #:
Pub Dt:
02/12/2004
Title:
METHODS OF FORMING NON-VOLATILE RESISTANCE VARIABLE DEVICES AND METHODS OF FORMING SILVER SELENIDE COMPRISING STRUCTURES
6
Patent #:
Issue Dt:
06/05/2007
Application #:
10635947
Filing Dt:
08/06/2003
Publication #:
Pub Dt:
02/10/2005
Title:
WIRE BONDERS AND METHODS OF WIRE-BONDING
7
Patent #:
Issue Dt:
07/27/2010
Application #:
10636021
Filing Dt:
08/06/2003
Publication #:
Pub Dt:
02/10/2005
Title:
MICROFEATURE WORKPIECE PROCESSING SYSTEM FOR, E.G., SEMICONDUCTOR WAFER ANALYSIS
8
Patent #:
Issue Dt:
08/21/2007
Application #:
10636038
Filing Dt:
08/06/2003
Publication #:
Pub Dt:
02/10/2005
Title:
METHODS OF FORMING MATERIAL ON A SUBSTRATE, AND A METHOD OF FORMING A FIELD EFFECT TRANSISTOR GATE OXIDE ON A SUBSTRATE
9
Patent #:
Issue Dt:
03/29/2005
Application #:
10636173
Filing Dt:
08/07/2003
Publication #:
Pub Dt:
02/10/2005
Title:
METHOD FOR PROGRAMMING AND ERASING AN NROM CELL
10
Patent #:
Issue Dt:
10/03/2006
Application #:
10636179
Filing Dt:
08/07/2003
Publication #:
Pub Dt:
02/10/2005
Title:
MULTIPLE ERASE BLOCK TAGGING IN A FLASH MEMORY DEVICE
11
Patent #:
Issue Dt:
01/04/2005
Application #:
10636180
Filing Dt:
08/07/2003
Publication #:
Pub Dt:
02/12/2004
Title:
BURIED DIGIT LINE STACK AND PROCESS FOR MAKING SAME
12
Patent #:
Issue Dt:
08/01/2006
Application #:
10636181
Filing Dt:
08/07/2003
Publication #:
Pub Dt:
02/10/2005
Title:
METHOD FOR ERASING AN NROM CELL
13
Patent #:
Issue Dt:
02/15/2005
Application #:
10636332
Filing Dt:
08/06/2003
Publication #:
Pub Dt:
02/26/2004
Title:
STRESS BALANCED SEMICONDUCTOR PACKAGES, METHOD OF FABRICATION AND MODIFIED MOLD SEGMENT
14
Patent #:
Issue Dt:
01/25/2005
Application #:
10636535
Filing Dt:
08/08/2003
Publication #:
Pub Dt:
02/12/2004
Title:
CURRENT SWITCHING SENSOR DETECTOR
15
Patent #:
Issue Dt:
08/14/2007
Application #:
10637031
Filing Dt:
08/06/2003
Publication #:
Pub Dt:
02/12/2004
Title:
DESCRIPTOR FOR IDENTIFYING A DEFECTIVE DIE SITE
16
Patent #:
Issue Dt:
12/11/2007
Application #:
10637096
Filing Dt:
08/08/2003
Publication #:
Pub Dt:
02/12/2004
Title:
PROCESS FLOW FOR BUILDING MRAM STRUCTURES
17
Patent #:
Issue Dt:
12/06/2005
Application #:
10637145
Filing Dt:
08/08/2003
Title:
STATE SAVE-ON-POWER-DOWN USING GMR NON-VOLATILE ELEMENTS
18
Patent #:
Issue Dt:
08/09/2005
Application #:
10637529
Filing Dt:
08/11/2003
Publication #:
Pub Dt:
03/11/2004
Title:
METHOD FOR FORMING A CONTACT LINE AND BURIED CONTACT LINE IN A CMOS IMAGER
19
Patent #:
Issue Dt:
06/07/2005
Application #:
10637727
Filing Dt:
08/08/2003
Publication #:
Pub Dt:
02/19/2004
Title:
PROGRAMMABLE MEMORY ADDRESS AND DECODE CIRCUITS WITH VERTICAL BODY TRANSISTORS
20
Patent #:
Issue Dt:
04/08/2008
Application #:
10639240
Filing Dt:
08/11/2003
Publication #:
Pub Dt:
07/08/2004
Title:
NONVOLATILE STORAGE DEVICE AND SELF-REDUNDANCY METHOD FOR THE SAME
21
Patent #:
Issue Dt:
11/07/2006
Application #:
10639348
Filing Dt:
08/12/2003
Publication #:
Pub Dt:
02/19/2004
Title:
METHOD FOR FORMING METAL CONTACTS ON A SUBSTRATE
22
Patent #:
Issue Dt:
09/20/2005
Application #:
10640387
Filing Dt:
08/14/2003
Publication #:
Pub Dt:
03/11/2004
Title:
TRENCH DRAM CELL WITH VERTICAL DEVICE AND BURIED WORD LINES
23
Patent #:
Issue Dt:
11/09/2004
Application #:
10640860
Filing Dt:
08/14/2003
Publication #:
Pub Dt:
04/08/2004
Title:
SPUTTERED INSULATING LAYER FOR WORDLINE STACKS
24
Patent #:
Issue Dt:
05/24/2005
Application #:
10641337
Filing Dt:
08/14/2003
Publication #:
Pub Dt:
04/15/2004
Title:
PROGRAMMABLE POR CIRCUIT WITH TWO SWITCHING THRESHOLDS
25
Patent #:
Issue Dt:
11/13/2007
Application #:
10641473
Filing Dt:
08/14/2003
Publication #:
Pub Dt:
06/10/2004
Title:
METHOD AND APPARATUS FOR SUPPORTING A MICROELECTRONIC SUBSTRATE RELATIVE TO A PLANARIZATION PAD
26
Patent #:
Issue Dt:
11/22/2005
Application #:
10642612
Filing Dt:
08/19/2003
Publication #:
Pub Dt:
03/18/2004
Title:
BURIED CHANNEL CMOS IMAGER AND METHOD OF FORMING SAME
27
Patent #:
Issue Dt:
10/19/2004
Application #:
10642958
Filing Dt:
08/18/2003
Publication #:
Pub Dt:
02/26/2004
Title:
VOLTAGE AND TEMPERATURE COMPENSATED PULSE GENERATOR
28
Patent #:
Issue Dt:
01/18/2005
Application #:
10642959
Filing Dt:
08/18/2003
Publication #:
Pub Dt:
02/26/2004
Title:
FLASH CELL FUSE CIRCUIT
29
Patent #:
Issue Dt:
02/21/2006
Application #:
10642961
Filing Dt:
08/18/2003
Publication #:
Pub Dt:
03/18/2004
Title:
FLASH CELL FUSE CIRCUIT
30
Patent #:
Issue Dt:
08/03/2004
Application #:
10643268
Filing Dt:
08/18/2003
Publication #:
Pub Dt:
03/18/2004
Title:
PREDECODE COLUMN ARCHITECTURE AND METHOD
31
Patent #:
Issue Dt:
05/27/2008
Application #:
10643680
Filing Dt:
08/18/2003
Publication #:
Pub Dt:
02/24/2005
Title:
ATOMIC LAYER DEPOSITION METHODS OF FORMING CONDUCTIVE METAL NITRIDE COMPRISING LAYERS
32
Patent #:
Issue Dt:
10/05/2004
Application #:
10644107
Filing Dt:
08/20/2003
Publication #:
Pub Dt:
02/26/2004
Title:
METHOD OF PROVIDING VOLTAGE TO A CIRCUIT
33
Patent #:
Issue Dt:
04/04/2006
Application #:
10644278
Filing Dt:
08/19/2003
Publication #:
Pub Dt:
07/01/2004
Title:
SEMICONDUCTOR DEVICE WITH ELECTRICALLY COUPLED SPIRAL INDUCTORS
34
Patent #:
Issue Dt:
08/01/2006
Application #:
10644324
Filing Dt:
08/20/2003
Publication #:
Pub Dt:
02/26/2004
Title:
METHOD AND APPARATUS FOR ADDRESS FIFO FOR HIGH-BANDWIDTH COMMAND/ADDRESS BUSSES IN DIGITAL STORAGE SYSTEM
35
Patent #:
Issue Dt:
01/18/2005
Application #:
10644560
Filing Dt:
08/19/2003
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
36
Patent #:
Issue Dt:
06/07/2005
Application #:
10644882
Filing Dt:
08/21/2003
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD FOR MANUFACTURE OF MRAM MEMORY ELEMENTS
37
Patent #:
Issue Dt:
11/25/2008
Application #:
10645575
Filing Dt:
08/22/2003
Publication #:
Pub Dt:
02/24/2005
Title:
PER COLUMN ONE-BIT ADC FOR IMAGE SENSORS
38
Patent #:
Issue Dt:
10/18/2011
Application #:
10645645
Filing Dt:
08/22/2003
Publication #:
Pub Dt:
02/24/2005
Title:
HIGH GAIN, LOW NOISE PHOTODIODE FOR IMAGE SENSORS AND METHOD OF FORMATION
39
Patent #:
Issue Dt:
04/25/2006
Application #:
10645981
Filing Dt:
08/22/2003
Publication #:
Pub Dt:
02/24/2005
Title:
MRAM LAYER HAVING DOMAIN WALL TRAPS
40
Patent #:
Issue Dt:
09/23/2008
Application #:
10646103
Filing Dt:
08/22/2003
Publication #:
Pub Dt:
05/13/2004
Title:
PASSIVATED MAGNETO-RESISTIVE BIT STRUCTURE AND PASSIVATION METHOD THEREFOR
41
Patent #:
Issue Dt:
03/18/2008
Application #:
10646673
Filing Dt:
08/21/2003
Publication #:
Pub Dt:
02/24/2005
Title:
METHODS AND APPARATUS FOR PROCESSING MICROFEATURE WORKPIECES; METHODS FOR CONDITIONING ALD REACTION CHAMBERS
42
Patent #:
Issue Dt:
09/19/2006
Application #:
10647084
Filing Dt:
08/21/2003
Publication #:
Pub Dt:
02/26/2004
Title:
FLASH MEMORY CARD WITH ENHANCED OPERATING MODE DETECTION AND USER-FRIENDLY INTERFACING SYSTEM
43
Patent #:
Issue Dt:
08/23/2005
Application #:
10648076
Filing Dt:
08/26/2003
Publication #:
Pub Dt:
03/03/2005
Title:
BANDGAP REFERENCE CIRCUIT
44
Patent #:
Issue Dt:
08/22/2006
Application #:
10648163
Filing Dt:
08/26/2003
Publication #:
Pub Dt:
02/26/2004
Title:
METHOD FOR FABRICATING AN INTERPOSER
45
Patent #:
Issue Dt:
10/17/2006
Application #:
10648245
Filing Dt:
08/27/2003
Publication #:
Pub Dt:
12/16/2004
Title:
PHOTODIODE WITH ULTRA-SHALLOW JUNCTION FOR HIGH QUANTUM EFFICIENCY CMOS IMAGE SENSOR AND METHOD OF FORMATION
46
Patent #:
Issue Dt:
05/24/2005
Application #:
10648378
Filing Dt:
08/27/2003
Publication #:
Pub Dt:
12/16/2004
Title:
METHOD OF FORMING WELL FOR CMOS IMAGER
47
Patent #:
Issue Dt:
03/04/2008
Application #:
10649050
Filing Dt:
08/27/2003
Publication #:
Pub Dt:
04/14/2005
Title:
DOUBLE-DOPED POLYSILICON FLOATING GATE
48
Patent #:
Issue Dt:
03/07/2006
Application #:
10649147
Filing Dt:
08/27/2003
Publication #:
Pub Dt:
11/18/2004
Title:
METHOD FOR FABRICATING SEMICONDUCTOR COMPONENT HAVING STACKED, ENCAPSULATED DICE
49
Patent #:
Issue Dt:
09/05/2006
Application #:
10649311
Filing Dt:
08/25/2003
Publication #:
Pub Dt:
03/03/2005
Title:
METHODS OF FORMING CAPACITORS
50
Patent #:
Issue Dt:
02/22/2005
Application #:
10650563
Filing Dt:
08/28/2003
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD OF MANUFACTURING A MULTILAYERED DOPED CONDUCTOR FOR A CONTACT IN AN INTEGRATED DEVICE
51
Patent #:
Issue Dt:
02/22/2005
Application #:
10650827
Filing Dt:
08/29/2003
Publication #:
Pub Dt:
03/04/2004
Title:
ELIMINATION OF DENDRITE FORMATION DURING METAL/CHALCOGENIDE GLASS DEPOSITION
52
Patent #:
Issue Dt:
11/22/2005
Application #:
10651019
Filing Dt:
08/28/2003
Publication #:
Pub Dt:
03/31/2005
Title:
METHOD FOR CONTROLLING PROGRAMMING VOLTAGE LEVELS OF NON-VOLATILE MEMORY CELLS, THE METHOD TRACKING THE CELL FEATURES, AND CORRESPONDING VOLTAGE REGULATOR
53
Patent #:
Issue Dt:
08/23/2005
Application #:
10651021
Filing Dt:
08/27/2003
Title:
SYSTEM AND METHOD FOR CACHING DATA BASED ON IDENTITY OF REQUESTOR
54
Patent #:
Issue Dt:
01/01/2008
Application #:
10651314
Filing Dt:
08/28/2003
Publication #:
Pub Dt:
03/03/2005
Title:
METHOD FOR REDUCING THE EFFECTIVE THICKNESS OF GATE OXIDES BY NITROGEN IMPLANTATION AND ANNEAL
55
Patent #:
Issue Dt:
08/30/2005
Application #:
10651594
Filing Dt:
08/29/2003
Publication #:
Pub Dt:
02/26/2004
Title:
METHOD AND SYSTEM FOR ELECTRICALLY COUPLING A CHIP TO CHIP PACKAGE
56
Patent #:
Issue Dt:
02/26/2008
Application #:
10651601
Filing Dt:
08/29/2003
Publication #:
Pub Dt:
02/26/2004
Title:
METHOD AND SYSTEM FOR ELECTRICALLY COUPLING A CHIP TO CHIP PACKAGE
57
Patent #:
Issue Dt:
03/28/2006
Application #:
10651619
Filing Dt:
08/29/2003
Title:
DOUBLE DENSITY MRAM WITH PLANAR PROCESSING
58
Patent #:
Issue Dt:
08/31/2004
Application #:
10651760
Filing Dt:
08/29/2003
Title:
PERMEABLE CAPACITOR ELECTRODE
59
Patent #:
Issue Dt:
03/20/2007
Application #:
10651765
Filing Dt:
08/29/2003
Title:
INTERMEDIATE ANNEAL FOR METAL DEPOSITION
60
Patent #:
Issue Dt:
07/04/2006
Application #:
10651912
Filing Dt:
08/29/2003
Publication #:
Pub Dt:
03/03/2005
Title:
STACKED MICROFEATURE DEVICES AND ASSOCIATED METHODS
61
Patent #:
Issue Dt:
05/06/2008
Application #:
10651913
Filing Dt:
08/29/2003
Publication #:
Pub Dt:
03/03/2005
Title:
INVERTIBLE MICROFEATURE DEVICE PACKAGES
62
Patent #:
Issue Dt:
04/19/2005
Application #:
10651914
Filing Dt:
08/29/2003
Publication #:
Pub Dt:
12/02/2004
Title:
PACKAGED IMAGE SENSING MICROELECTRONIC DEVICES INCLUDING A LEAD AND METHODS OF PACKAGING IMAGE SENSING MICROELECTRONIC DEVICES INCLUDING A LEAD
63
Patent #:
Issue Dt:
12/15/2009
Application #:
10652160
Filing Dt:
08/29/2003
Publication #:
Pub Dt:
03/03/2005
Title:
METHOD AND APPARATUS FOR SELF-TIMED DATA ORDERING FOR MULTI-DATA RATE MEMORIES AND SYSTEM INCORPORATING SAME
64
Patent #:
Issue Dt:
05/06/2008
Application #:
10652163
Filing Dt:
08/29/2003
Publication #:
Pub Dt:
03/03/2005
Title:
METHOD OF FABRICATING A TWO DIE SEMICONDUCTOR ASSEMBLY
65
Patent #:
Issue Dt:
09/12/2006
Application #:
10652174
Filing Dt:
08/22/2003
Publication #:
Pub Dt:
02/24/2005
Title:
MASKING METHODS
66
Patent #:
Issue Dt:
01/11/2005
Application #:
10652944
Filing Dt:
08/29/2003
Publication #:
Pub Dt:
05/13/2004
Title:
ANNULAR GATE AND TECHNIQUE FOR FABRICATING AN ANNULAR GATE
67
Patent #:
Issue Dt:
09/20/2005
Application #:
10653008
Filing Dt:
08/28/2003
Publication #:
Pub Dt:
09/16/2004
Title:
METHODS FOR PACKAGING MICROELECTRONIC DEVICES
68
Patent #:
Issue Dt:
08/09/2005
Application #:
10653459
Filing Dt:
09/02/2003
Publication #:
Pub Dt:
05/12/2005
Title:
MEMORY DEVICE ACCESSIBLE WITH DIFFERENT COMMUNICATION PROTOCOLS
69
Patent #:
Issue Dt:
10/17/2006
Application #:
10654655
Filing Dt:
09/03/2003
Publication #:
Pub Dt:
05/12/2005
Title:
PROBE LOOK AHEAD: TESTING PARTS NOT CURRENTLY UNDER A PROBEHEAD
70
Patent #:
Issue Dt:
01/08/2008
Application #:
10655565
Filing Dt:
09/04/2003
Publication #:
Pub Dt:
03/10/2005
Title:
SYSTEMS AND METHODS FOR USING HDLC CHANNEL CONTEXT TO SIMULTANEOUSLY PROCESS MULTIPLE HDLC CHANNELS
71
Patent #:
Issue Dt:
11/30/2004
Application #:
10656352
Filing Dt:
09/05/2003
Publication #:
Pub Dt:
03/11/2004
Title:
MULTICHIP WAFER LEVEL PACKAGES AND COMPUTING SYSTEMS INCORPORATING SAME
72
Patent #:
Issue Dt:
12/20/2005
Application #:
10656636
Filing Dt:
09/05/2003
Publication #:
Pub Dt:
03/10/2005
Title:
TRENCH CORNER EFFECT BIDIRECTIONAL FLASH MEMORY CELL
73
Patent #:
Issue Dt:
05/17/2005
Application #:
10656987
Filing Dt:
09/05/2003
Publication #:
Pub Dt:
03/10/2005
Title:
MULTIPHASE CLOCK GENERATORS
74
Patent #:
Issue Dt:
11/08/2005
Application #:
10659081
Filing Dt:
09/10/2003
Publication #:
Pub Dt:
03/11/2004
Title:
SUPPRESSION OF CROSS DIFFUSION AND GATE DEPLETION
75
Patent #:
Issue Dt:
08/23/2005
Application #:
10659828
Filing Dt:
09/11/2003
Publication #:
Pub Dt:
03/11/2004
Title:
SEMICONDUCTOR COMPONENT HAVING TEST CONTACTS
76
Patent #:
Issue Dt:
10/17/2006
Application #:
10659898
Filing Dt:
09/11/2003
Publication #:
Pub Dt:
03/11/2004
Title:
WAFER-LEVEL TEST STRUCTURE FOR EDGE-EMITTING SEMICONDUCTOR LASERS
77
Patent #:
Issue Dt:
10/30/2007
Application #:
10660228
Filing Dt:
09/10/2003
Publication #:
Pub Dt:
03/10/2005
Title:
ADAPTIVE EQUALIZATION USING A CONDITIONAL UPDATE SIGN-SIGN LEAST MEAN SQUARE ALGORITHM
78
Patent #:
Issue Dt:
03/01/2005
Application #:
10660566
Filing Dt:
09/12/2003
Publication #:
Pub Dt:
03/18/2004
Title:
SYSTEM AND METHOD FOR OPERATING A MEMORY ARRAY
79
Patent #:
Issue Dt:
12/21/2004
Application #:
10660602
Filing Dt:
09/12/2003
Publication #:
Pub Dt:
03/18/2004
Title:
NON-VOLATILE RESISTANCE VARIABLE DEVICE
80
Patent #:
Issue Dt:
10/31/2006
Application #:
10661100
Filing Dt:
09/12/2003
Publication #:
Pub Dt:
03/17/2005
Title:
MASKING STRUCTURE HAVING MULTIPLE LAYERS INCLUDING AN AMORPHOUS CARBON LAYER
81
Patent #:
Issue Dt:
11/07/2006
Application #:
10661379
Filing Dt:
09/12/2003
Publication #:
Pub Dt:
03/17/2005
Title:
TRANSPARENT AMORPHOUS CARBON STRUCTURE IN SEMICONDUCTOR DEVICES
82
Patent #:
Issue Dt:
01/18/2005
Application #:
10661496
Filing Dt:
09/15/2003
Publication #:
Pub Dt:
04/29/2004
Title:
MEMORY DEVICE HAVING POSTED WRITE PER COMMAND
83
Patent #:
Issue Dt:
05/26/2009
Application #:
10661551
Filing Dt:
09/15/2003
Publication #:
Pub Dt:
03/17/2005
Title:
REGION-BASED AUTO GAIN CONTROL AND AUTO EXPOSURE CONTROL METHOD AND APPARATUS
84
Patent #:
Issue Dt:
06/28/2005
Application #:
10661960
Filing Dt:
09/11/2003
Publication #:
Pub Dt:
03/25/2004
Title:
INDIVIDUAL SELECTIVE REWORK OF DEFECTIVE BGA SOLDER BALLS
85
Patent #:
Issue Dt:
09/13/2005
Application #:
10662698
Filing Dt:
09/15/2003
Publication #:
Pub Dt:
04/08/2004
Title:
SEMICONDUCTOR PACKAGE HAVING POLYMER MEMBERS CONFIGURED TO PROVIDE SELECTED PACKAGE CHARACTERISTICS
86
Patent #:
Issue Dt:
12/20/2005
Application #:
10663277
Filing Dt:
09/16/2003
Publication #:
Pub Dt:
03/17/2005
Title:
BOOSTED SUBSTRATE/TUB PROGRAMMING FOR FLASH MEMORIES
87
Patent #:
Issue Dt:
10/02/2007
Application #:
10663279
Filing Dt:
09/16/2003
Publication #:
Pub Dt:
03/17/2005
Title:
RUNTIME FLASH DEVICE DETECTION AND CONFIGURATION FOR FLASH DATA MANAGEMENT SOFTWARE
88
Patent #:
Issue Dt:
05/08/2007
Application #:
10663709
Filing Dt:
09/17/2003
Publication #:
Pub Dt:
03/17/2005
Title:
METHOD FOR AUTOMATED TESTING OF THE MODULATION TRANSFER FUNCTION IN IMAGE SENSORS
89
Patent #:
Issue Dt:
10/11/2005
Application #:
10663959
Filing Dt:
09/16/2003
Publication #:
Pub Dt:
03/17/2005
Title:
MOISTURE-RESISTANT ELECTRONIC DEVICE PACKAGE AND METHODS OF ASSEMBLY
90
Patent #:
Issue Dt:
02/15/2005
Application #:
10664606
Filing Dt:
09/16/2003
Publication #:
Pub Dt:
07/01/2004
Title:
CIRCUIT FOR BIASING AN INPUT NODE OF A SENSE AMPLIFIER WITH A PRE-CHARGE STAGE
91
Patent #:
Issue Dt:
04/18/2006
Application #:
10664738
Filing Dt:
09/18/2003
Publication #:
Pub Dt:
03/24/2005
Title:
METHODS OF ETCHING SILICON NITRIDE SUBSTANTIALLY SELECTIVELY RELATIVE TO AN OXIDE OF ALUMINUM
92
Patent #:
Issue Dt:
10/16/2007
Application #:
10665908
Filing Dt:
09/18/2003
Publication #:
Pub Dt:
03/24/2005
Title:
SYSTEMS AND METHODS FOR DEPOSITING MATERIAL ONTO MICROFEATURE WORKPIECES IN REACTION CHAMBERS
93
Patent #:
Issue Dt:
04/25/2006
Application #:
10666025
Filing Dt:
09/17/2003
Publication #:
Pub Dt:
04/14/2005
Title:
PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION METHOD OF FORMING A TITANIUM SILICIDE COMPRISING LAYER
94
Patent #:
Issue Dt:
10/27/2009
Application #:
10666077
Filing Dt:
09/19/2003
Publication #:
Pub Dt:
04/21/2005
Title:
PRIORITIZED ADDRESS DECODER
95
Patent #:
Issue Dt:
06/13/2006
Application #:
10666302
Filing Dt:
09/19/2003
Publication #:
Pub Dt:
04/07/2005
Title:
SEMICONDUCTOR COMPONENT AND SYSTEM HAVING STIFFENER AND CIRCUIT DECAL
96
Patent #:
Issue Dt:
08/30/2005
Application #:
10666393
Filing Dt:
09/17/2003
Publication #:
Pub Dt:
11/25/2004
Title:
SYSTEM AND METHOD FOR BALANCING CAPACITIVELY COUPLED SIGNAL LINES
97
Patent #:
Issue Dt:
02/13/2007
Application #:
10666454
Filing Dt:
09/17/2003
Publication #:
Pub Dt:
03/17/2005
Title:
APPARATUS AND METHOD FOR SELECTIVELY CONFIGURING A MEMORY DEVICE USING A BI-STABLE RELAY
98
Patent #:
Issue Dt:
05/11/2010
Application #:
10666742
Filing Dt:
09/19/2003
Publication #:
Pub Dt:
03/24/2005
Title:
METHODS FOR THINNING SEMICONDUCTOR SUBSTRATES THAT EMPLOY SUPPORT STRUCTURES FORMED ON THE SUBTRATES
99
Patent #:
Issue Dt:
03/22/2005
Application #:
10666988
Filing Dt:
09/18/2003
Publication #:
Pub Dt:
03/25/2004
Title:
VARIABLE LEVEL MEMORY
100
Patent #:
Issue Dt:
05/29/2007
Application #:
10668009
Filing Dt:
09/22/2003
Publication #:
Pub Dt:
03/24/2005
Title:
Method and apparatus for accessing a dynamic memory device by providing at least one of burst and latency information over at least one of redundant row and column address lines
Assignor
1
Exec Dt:
07/31/2019
Assignees
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
2
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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