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01/24/2006
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10634212
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08/05/2003
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05/22/2007
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10634274
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08/05/2003
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02/10/2005
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03/20/2007
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10634352
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08/05/2003
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02/12/2004
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09/21/2004
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10634594
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08/04/2003
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02/26/2004
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GLASS ATTACHMENT OVER MICRO-LENS ARRAYS
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11/02/2004
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10634897
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08/06/2003
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02/12/2004
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06/05/2007
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10635947
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08/06/2003
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02/10/2005
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07/27/2010
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10636021
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08/06/2003
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02/10/2005
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MICROFEATURE WORKPIECE PROCESSING SYSTEM FOR, E.G., SEMICONDUCTOR WAFER ANALYSIS
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08/21/2007
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08/06/2003
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02/10/2005
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03/29/2005
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10636173
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08/07/2003
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02/10/2005
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10/03/2006
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10636179
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08/07/2003
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02/10/2005
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MULTIPLE ERASE BLOCK TAGGING IN A FLASH MEMORY DEVICE
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01/04/2005
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10636180
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08/07/2003
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02/12/2004
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BURIED DIGIT LINE STACK AND PROCESS FOR MAKING SAME
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08/01/2006
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08/07/2003
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02/10/2005
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METHOD FOR ERASING AN NROM CELL
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02/15/2005
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10636332
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08/06/2003
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02/26/2004
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01/25/2005
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10636535
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08/08/2003
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02/12/2004
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08/14/2007
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10637031
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08/06/2003
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02/12/2004
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DESCRIPTOR FOR IDENTIFYING A DEFECTIVE DIE SITE
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12/11/2007
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10637096
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08/08/2003
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02/12/2004
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12/06/2005
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10637145
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08/08/2003
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08/09/2005
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10637529
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08/11/2003
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03/11/2004
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METHOD FOR FORMING A CONTACT LINE AND BURIED CONTACT LINE IN A CMOS IMAGER
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06/07/2005
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10637727
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08/08/2003
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02/19/2004
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PROGRAMMABLE MEMORY ADDRESS AND DECODE CIRCUITS WITH VERTICAL BODY TRANSISTORS
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04/08/2008
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10639240
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08/11/2003
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07/08/2004
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11/07/2006
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10639348
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08/12/2003
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02/19/2004
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09/20/2005
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10640387
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08/14/2003
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03/11/2004
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TRENCH DRAM CELL WITH VERTICAL DEVICE AND BURIED WORD LINES
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11/09/2004
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10640860
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08/14/2003
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04/08/2004
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SPUTTERED INSULATING LAYER FOR WORDLINE STACKS
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05/24/2005
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10641337
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08/14/2003
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04/15/2004
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PROGRAMMABLE POR CIRCUIT WITH TWO SWITCHING THRESHOLDS
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11/13/2007
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10641473
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08/14/2003
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06/10/2004
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11/22/2005
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10642612
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08/19/2003
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03/18/2004
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10/19/2004
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10642958
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08/18/2003
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02/26/2004
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VOLTAGE AND TEMPERATURE COMPENSATED PULSE GENERATOR
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01/18/2005
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10642959
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08/18/2003
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02/26/2004
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FLASH CELL FUSE CIRCUIT
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02/21/2006
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10642961
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08/18/2003
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03/18/2004
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FLASH CELL FUSE CIRCUIT
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08/03/2004
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10643268
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08/18/2003
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03/18/2004
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PREDECODE COLUMN ARCHITECTURE AND METHOD
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05/27/2008
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08/18/2003
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02/24/2005
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10/05/2004
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10644107
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08/20/2003
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02/26/2004
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04/04/2006
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08/19/2003
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07/01/2004
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08/01/2006
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10644324
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08/20/2003
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02/26/2004
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01/18/2005
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08/19/2003
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06/07/2005
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08/21/2003
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03/04/2004
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METHOD FOR MANUFACTURE OF MRAM MEMORY ELEMENTS
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11/25/2008
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08/22/2003
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02/24/2005
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10/18/2011
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08/22/2003
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02/24/2005
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04/25/2006
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08/22/2003
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02/24/2005
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09/23/2008
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10646103
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08/22/2003
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05/13/2004
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03/18/2008
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08/21/2003
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02/24/2005
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09/19/2006
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08/21/2003
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02/26/2004
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FLASH MEMORY CARD WITH ENHANCED OPERATING MODE DETECTION AND USER-FRIENDLY INTERFACING SYSTEM
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08/23/2005
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08/26/2003
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03/03/2005
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BANDGAP REFERENCE CIRCUIT
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08/22/2006
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08/26/2003
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02/26/2004
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10/17/2006
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08/27/2003
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12/16/2004
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05/24/2005
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08/27/2003
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12/16/2004
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03/04/2008
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08/27/2003
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04/14/2005
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03/07/2006
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08/27/2003
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11/18/2004
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09/05/2006
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08/25/2003
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03/03/2005
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02/22/2005
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08/28/2003
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03/04/2004
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02/22/2005
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08/29/2003
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03/04/2004
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11/22/2005
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08/28/2003
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03/31/2005
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08/23/2005
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08/27/2003
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01/01/2008
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08/28/2003
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03/03/2005
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08/30/2005
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08/29/2003
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02/26/2004
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02/26/2008
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08/29/2003
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02/26/2004
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METHOD AND SYSTEM FOR ELECTRICALLY COUPLING A CHIP TO CHIP PACKAGE
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03/28/2006
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08/29/2003
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08/31/2004
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08/29/2003
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03/20/2007
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08/29/2003
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07/04/2006
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08/29/2003
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03/03/2005
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05/06/2008
|
Application #:
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10651913
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
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03/03/2005
| | | | |
Title:
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INVERTIBLE MICROFEATURE DEVICE PACKAGES
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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10651914
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
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12/02/2004
| | | | |
Title:
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PACKAGED IMAGE SENSING MICROELECTRONIC DEVICES INCLUDING A LEAD AND METHODS OF PACKAGING IMAGE SENSING MICROELECTRONIC DEVICES INCLUDING A LEAD
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Patent #:
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Issue Dt:
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12/15/2009
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Application #:
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10652160
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
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03/03/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR SELF-TIMED DATA ORDERING FOR MULTI-DATA RATE MEMORIES AND SYSTEM INCORPORATING SAME
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Patent #:
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Issue Dt:
|
05/06/2008
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Application #:
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10652163
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
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03/03/2005
| | | | |
Title:
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METHOD OF FABRICATING A TWO DIE SEMICONDUCTOR ASSEMBLY
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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10652174
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Filing Dt:
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08/22/2003
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Publication #:
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Pub Dt:
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02/24/2005
| | | | |
Title:
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MASKING METHODS
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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10652944
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
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05/13/2004
| | | | |
Title:
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ANNULAR GATE AND TECHNIQUE FOR FABRICATING AN ANNULAR GATE
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Patent #:
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Issue Dt:
|
09/20/2005
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Application #:
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10653008
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
|
09/16/2004
| | | | |
Title:
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METHODS FOR PACKAGING MICROELECTRONIC DEVICES
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Patent #:
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Issue Dt:
|
08/09/2005
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Application #:
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10653459
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
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05/12/2005
| | | | |
Title:
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MEMORY DEVICE ACCESSIBLE WITH DIFFERENT COMMUNICATION PROTOCOLS
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Patent #:
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Issue Dt:
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10/17/2006
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Application #:
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10654655
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Filing Dt:
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09/03/2003
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Publication #:
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Pub Dt:
|
05/12/2005
| | | | |
Title:
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PROBE LOOK AHEAD: TESTING PARTS NOT CURRENTLY UNDER A PROBEHEAD
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Patent #:
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Issue Dt:
|
01/08/2008
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Application #:
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10655565
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Filing Dt:
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09/04/2003
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Publication #:
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Pub Dt:
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03/10/2005
| | | | |
Title:
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SYSTEMS AND METHODS FOR USING HDLC CHANNEL CONTEXT TO SIMULTANEOUSLY PROCESS MULTIPLE HDLC CHANNELS
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Patent #:
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Issue Dt:
|
11/30/2004
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Application #:
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10656352
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Filing Dt:
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09/05/2003
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Publication #:
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Pub Dt:
|
03/11/2004
| | | | |
Title:
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MULTICHIP WAFER LEVEL PACKAGES AND COMPUTING SYSTEMS INCORPORATING SAME
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Patent #:
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Issue Dt:
|
12/20/2005
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Application #:
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10656636
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Filing Dt:
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09/05/2003
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Publication #:
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Pub Dt:
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03/10/2005
| | | | |
Title:
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TRENCH CORNER EFFECT BIDIRECTIONAL FLASH MEMORY CELL
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Patent #:
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Issue Dt:
|
05/17/2005
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Application #:
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10656987
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Filing Dt:
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09/05/2003
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Publication #:
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Pub Dt:
|
03/10/2005
| | | | |
Title:
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MULTIPHASE CLOCK GENERATORS
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Patent #:
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Issue Dt:
|
11/08/2005
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Application #:
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10659081
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Filing Dt:
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09/10/2003
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Publication #:
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Pub Dt:
|
03/11/2004
| | | | |
Title:
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SUPPRESSION OF CROSS DIFFUSION AND GATE DEPLETION
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Patent #:
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Issue Dt:
|
08/23/2005
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Application #:
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10659828
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Filing Dt:
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09/11/2003
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Publication #:
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Pub Dt:
|
03/11/2004
| | | | |
Title:
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SEMICONDUCTOR COMPONENT HAVING TEST CONTACTS
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|
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Patent #:
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Issue Dt:
|
10/17/2006
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Application #:
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10659898
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Filing Dt:
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09/11/2003
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Publication #:
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Pub Dt:
|
03/11/2004
| | | | |
Title:
|
WAFER-LEVEL TEST STRUCTURE FOR EDGE-EMITTING SEMICONDUCTOR LASERS
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|
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Patent #:
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Issue Dt:
|
10/30/2007
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Application #:
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10660228
|
Filing Dt:
|
09/10/2003
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Publication #:
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Pub Dt:
|
03/10/2005
| | | | |
Title:
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ADAPTIVE EQUALIZATION USING A CONDITIONAL UPDATE SIGN-SIGN LEAST MEAN SQUARE ALGORITHM
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|
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Patent #:
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|
Issue Dt:
|
03/01/2005
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Application #:
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10660566
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Filing Dt:
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09/12/2003
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Publication #:
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Pub Dt:
|
03/18/2004
| | | | |
Title:
|
SYSTEM AND METHOD FOR OPERATING A MEMORY ARRAY
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|
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Patent #:
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|
Issue Dt:
|
12/21/2004
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Application #:
|
10660602
|
Filing Dt:
|
09/12/2003
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Publication #:
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Pub Dt:
|
03/18/2004
| | | | |
Title:
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NON-VOLATILE RESISTANCE VARIABLE DEVICE
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Patent #:
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Issue Dt:
|
10/31/2006
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Application #:
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10661100
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Filing Dt:
|
09/12/2003
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Publication #:
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Pub Dt:
|
03/17/2005
| | | | |
Title:
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MASKING STRUCTURE HAVING MULTIPLE LAYERS INCLUDING AN AMORPHOUS CARBON LAYER
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|
|
Patent #:
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|
Issue Dt:
|
11/07/2006
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Application #:
|
10661379
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Filing Dt:
|
09/12/2003
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Publication #:
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Pub Dt:
|
03/17/2005
| | | | |
Title:
|
TRANSPARENT AMORPHOUS CARBON STRUCTURE IN SEMICONDUCTOR DEVICES
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|
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Patent #:
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Issue Dt:
|
01/18/2005
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Application #:
|
10661496
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Filing Dt:
|
09/15/2003
|
Publication #:
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|
Pub Dt:
|
04/29/2004
| | | | |
Title:
|
MEMORY DEVICE HAVING POSTED WRITE PER COMMAND
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|
|
Patent #:
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|
Issue Dt:
|
05/26/2009
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Application #:
|
10661551
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Filing Dt:
|
09/15/2003
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Publication #:
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Pub Dt:
|
03/17/2005
| | | | |
Title:
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REGION-BASED AUTO GAIN CONTROL AND AUTO EXPOSURE CONTROL METHOD AND APPARATUS
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|
|
Patent #:
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|
Issue Dt:
|
06/28/2005
|
Application #:
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10661960
|
Filing Dt:
|
09/11/2003
|
Publication #:
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|
Pub Dt:
|
03/25/2004
| | | | |
Title:
|
INDIVIDUAL SELECTIVE REWORK OF DEFECTIVE BGA SOLDER BALLS
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|
|
Patent #:
|
|
Issue Dt:
|
09/13/2005
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Application #:
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10662698
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Filing Dt:
|
09/15/2003
|
Publication #:
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|
Pub Dt:
|
04/08/2004
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE HAVING POLYMER MEMBERS CONFIGURED TO PROVIDE SELECTED PACKAGE CHARACTERISTICS
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|
|
Patent #:
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|
Issue Dt:
|
12/20/2005
|
Application #:
|
10663277
|
Filing Dt:
|
09/16/2003
|
Publication #:
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|
Pub Dt:
|
03/17/2005
| | | | |
Title:
|
BOOSTED SUBSTRATE/TUB PROGRAMMING FOR FLASH MEMORIES
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|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
10663279
|
Filing Dt:
|
09/16/2003
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Publication #:
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Pub Dt:
|
03/17/2005
| | | | |
Title:
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RUNTIME FLASH DEVICE DETECTION AND CONFIGURATION FOR FLASH DATA MANAGEMENT SOFTWARE
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|
|
Patent #:
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|
Issue Dt:
|
05/08/2007
|
Application #:
|
10663709
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Filing Dt:
|
09/17/2003
|
Publication #:
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Pub Dt:
|
03/17/2005
| | | | |
Title:
|
METHOD FOR AUTOMATED TESTING OF THE MODULATION TRANSFER FUNCTION IN IMAGE SENSORS
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|
|
Patent #:
|
|
Issue Dt:
|
10/11/2005
|
Application #:
|
10663959
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Filing Dt:
|
09/16/2003
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Publication #:
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Pub Dt:
|
03/17/2005
| | | | |
Title:
|
MOISTURE-RESISTANT ELECTRONIC DEVICE PACKAGE AND METHODS OF ASSEMBLY
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|
|
Patent #:
|
|
Issue Dt:
|
02/15/2005
|
Application #:
|
10664606
|
Filing Dt:
|
09/16/2003
|
Publication #:
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|
Pub Dt:
|
07/01/2004
| | | | |
Title:
|
CIRCUIT FOR BIASING AN INPUT NODE OF A SENSE AMPLIFIER WITH A PRE-CHARGE STAGE
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|
|
Patent #:
|
|
Issue Dt:
|
04/18/2006
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Application #:
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10664738
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Filing Dt:
|
09/18/2003
|
Publication #:
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Pub Dt:
|
03/24/2005
| | | | |
Title:
|
METHODS OF ETCHING SILICON NITRIDE SUBSTANTIALLY SELECTIVELY RELATIVE TO AN OXIDE OF ALUMINUM
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|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
10665908
|
Filing Dt:
|
09/18/2003
|
Publication #:
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Pub Dt:
|
03/24/2005
| | | | |
Title:
|
SYSTEMS AND METHODS FOR DEPOSITING MATERIAL ONTO MICROFEATURE WORKPIECES IN REACTION CHAMBERS
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|
|
Patent #:
|
|
Issue Dt:
|
04/25/2006
|
Application #:
|
10666025
|
Filing Dt:
|
09/17/2003
|
Publication #:
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|
Pub Dt:
|
04/14/2005
| | | | |
Title:
|
PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION METHOD OF FORMING A TITANIUM SILICIDE COMPRISING LAYER
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|
Patent #:
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Issue Dt:
|
10/27/2009
|
Application #:
|
10666077
|
Filing Dt:
|
09/19/2003
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Publication #:
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Pub Dt:
|
04/21/2005
| | | | |
Title:
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PRIORITIZED ADDRESS DECODER
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|
|
Patent #:
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|
Issue Dt:
|
06/13/2006
|
Application #:
|
10666302
|
Filing Dt:
|
09/19/2003
|
Publication #:
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Pub Dt:
|
04/07/2005
| | | | |
Title:
|
SEMICONDUCTOR COMPONENT AND SYSTEM HAVING STIFFENER AND CIRCUIT DECAL
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|
|
Patent #:
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|
Issue Dt:
|
08/30/2005
|
Application #:
|
10666393
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Filing Dt:
|
09/17/2003
|
Publication #:
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|
Pub Dt:
|
11/25/2004
| | | | |
Title:
|
SYSTEM AND METHOD FOR BALANCING CAPACITIVELY COUPLED SIGNAL LINES
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|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
10666454
|
Filing Dt:
|
09/17/2003
|
Publication #:
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|
Pub Dt:
|
03/17/2005
| | | | |
Title:
|
APPARATUS AND METHOD FOR SELECTIVELY CONFIGURING A MEMORY DEVICE USING A BI-STABLE RELAY
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|
|
Patent #:
|
|
Issue Dt:
|
05/11/2010
|
Application #:
|
10666742
|
Filing Dt:
|
09/19/2003
|
Publication #:
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|
Pub Dt:
|
03/24/2005
| | | | |
Title:
|
METHODS FOR THINNING SEMICONDUCTOR SUBSTRATES THAT EMPLOY SUPPORT STRUCTURES FORMED ON THE SUBTRATES
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|
|
Patent #:
|
|
Issue Dt:
|
03/22/2005
|
Application #:
|
10666988
|
Filing Dt:
|
09/18/2003
|
Publication #:
|
|
Pub Dt:
|
03/25/2004
| | | | |
Title:
|
VARIABLE LEVEL MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
10668009
|
Filing Dt:
|
09/22/2003
|
Publication #:
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|
Pub Dt:
|
03/24/2005
| | | | |
Title:
|
Method and apparatus for accessing a dynamic memory device by providing at least one of burst and latency information over at least one of redundant row and column address lines
|
|