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Reel/Frame:	051028/0001			Pages:	834
		Recorded:	11/12/2019
Attorney Dkt #:	4816.244
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 16529
Page 42 of 166
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Patent #:	6937077	Issue Dt:	08/30/2005	Application #:	10668755	Filing Dt:	09/23/2003
Publication #:	US20050062510	Pub Dt:	03/24/2005
Title:	APPARATUS AND METHOD FOR SUPPRESSING JITTER WITHIN A CLOCK SIGNAL GENERATOR

Patent #:	6822925	Issue Dt:	11/23/2004	Application #:	10668772	Filing Dt:	09/23/2003
Publication #:	US20040057331	Pub Dt:	03/25/2004
Title:	SYNCHRONOUS MIRROR DELAY WITH REDUCED DELAY LINE TAPS

Patent #:	7345350	Issue Dt:	03/18/2008	Application #:	10668914	Filing Dt:	09/23/2003
Publication #:	US20050064707	Pub Dt:	03/24/2005
Title:	PROCESS AND INTEGRATION SCHEME FOR FABRICATING CONDUCTIVE COMPONENTS, THROUGH-VIAS AND SEMICONDUCTOR COMPONENTS INCLUDING CONDUCTIVE THROUGH-WAFER VIAS

Patent #:	7120999	Issue Dt:	10/17/2006	Application #:	10668925	Filing Dt:	09/23/2003
Publication #:	US20040058470	Pub Dt:	03/25/2004
Title:	METHODS OF FORMING A CONTACT ARRAY IN SITU ON A SUBSTRATE

Patent #:	6882003	Issue Dt:	04/19/2005	Application #:	10668944	Filing Dt:	09/22/2003
Publication #:	US20040056316	Pub Dt:	03/25/2004
Title:	METHOD AND APPARATUS FOR A FLASH MEMORY DEVICE COMPRISING A SOURCE LOCAL INTERCONNECT

Patent #:	7594228	Issue Dt:	09/22/2009	Application #:	10669309	Filing Dt:	09/23/2003
Publication #:	US20050066328	Pub Dt:	03/24/2005
Title:	METHOD AND APPARATUS TO PERFORM TASK SCHEDULING

Patent #:	6885592	Issue Dt:	04/26/2005	Application #:	10669635	Filing Dt:	09/24/2003
Publication #:	US20040170080	Pub Dt:	09/02/2004
Title:	VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE

Patent #:	6881628	Issue Dt:	04/19/2005	Application #:	10671112	Filing Dt:	09/25/2003
Publication #:	US20040115886	Pub Dt:	06/17/2004
Title:	VERTICAL FLASH MEMORY CELL WITH BURIED SOURCE RAIL

Patent #:	6849493	Issue Dt:	02/01/2005	Application #:	10671228	Filing Dt:	09/24/2003
Publication #:	US20040058544	Pub Dt:	03/25/2004
Title:	METHODS OF FORMING POLISHED MATERIAL AND METHODS OF FORMING ISOLATION REGIONS

Patent #:	7396779	Issue Dt:	07/08/2008	Application #:	10671229	Filing Dt:	09/24/2003
Publication #:	US20050062163	Pub Dt:	03/24/2005
Title:	ELECTRONIC APPARATUS, SILICON-ON-INSULATOR INTEGRATED CIRCUITS, AND FABRICATION METHODS

Patent #:	7312163	Issue Dt:	12/25/2007	Application #:	10671922	Filing Dt:	09/24/2003
Publication #:	US20050064725	Pub Dt:	03/24/2005
Title:	ATOMIC LAYER DEPOSITION METHODS, AND METHODS OF FORMING MATERIALS OVER SEMICONDUCTOR SUBSTRATES

Patent #:	7176553	Issue Dt:	02/13/2007	Application #:	10672293	Filing Dt:	09/26/2003
Publication #:	US20040119142	Pub Dt:	06/24/2004
Title:	INTEGRATED RESISTIVE ELEMENTS WITH SILICIDATION PROTECTION

Patent #:	6928216	Issue Dt:	08/09/2005	Application #:	10672329	Filing Dt:	09/26/2003
Publication #:	US20040057668	Pub Dt:	03/25/2004
Title:	MARKINGS FOR ALIGNING FIBER OPTIC BUNDLE

Patent #:	7755204	Issue Dt:	07/13/2010	Application #:	10672750	Filing Dt:	09/25/2003
Publication #:	US20040056342	Pub Dt:	03/25/2004
Title:	STACKED DIE MODULE INCLUDING MULTIPLE ADHESIVES THAT CURE AT DIFFERENT TEMPERATURES

Patent #:	7067880	Issue Dt:	06/27/2006	Application #:	10673362	Filing Dt:	09/30/2003
Publication #:	US20040075150	Pub Dt:	04/22/2004
Title:	TRANSISTOR GATE STRUCTURE

Patent #:	7364985	Issue Dt:	04/29/2008	Application #:	10673692	Filing Dt:	09/29/2003
Publication #:	US20050070092	Pub Dt:	03/31/2005
Title:	METHOD FOR CREATING ELECTRICAL PATHWAYS FOR SEMICONDUCTOR DEVICE STRUCTURES USING LASER MACHINING PROCESSES

Patent #:	6900455	Issue Dt:	05/31/2005	Application #:	10674549	Filing Dt:	10/01/2003
Publication #:	US20040062081	Pub Dt:	04/01/2004
Title:	MULTILAYER DIELECTRIC TUNNEL BARRIER USED IN MAGNETIC TUNNEL JUNCTION DEVICES, AND ITS METHOD OF FABRICATION

Patent #:	7184319	Issue Dt:	02/27/2007	Application #:	10675221	Filing Dt:	09/30/2003
Publication #:	US20040208063	Pub Dt:	10/21/2004
Title:	METHOD FOR ERASING NON-VOLATILE MEMORY CELLS AND CORRESPONDING MEMORY DEVICE

Patent #:	6952116	Issue Dt:	10/04/2005	Application #:	10675661	Filing Dt:	09/29/2003
Publication #:	US20050068811	Pub Dt:	03/31/2005
Title:	NON-CASCADING CHARGE PUMP CIRCUIT AND METHOD

Patent #:	6947329	Issue Dt:	09/20/2005	Application #:	10675805	Filing Dt:	09/30/2003
Publication #:	US20040223399	Pub Dt:	11/11/2004
Title:	METHOD FOR DETECTING A RESISTIVE PATH OR A PREDETERMINED POTENTIAL IN NON-VOLATILE MEMORY ELECTRONIC DEVICES

Patent #:	7221040	Issue Dt:	05/22/2007	Application #:	10675965	Filing Dt:	09/30/2003
Publication #:	US20040061208	Pub Dt:	04/01/2004
Title:	SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR ELECTRICALLY ISOLATING MODULES

Patent #:	7087535	Issue Dt:	08/08/2006	Application #:	10676169	Filing Dt:	09/30/2003
Publication #:	US20040062863	Pub Dt:	04/01/2004
Title:	DEPOSITION METHODS

Patent #:	7145481	Issue Dt:	12/05/2006	Application #:	10676888	Filing Dt:	09/30/2003
Publication #:	US20050068203	Pub Dt:	03/31/2005
Title:	METHOD AND APPARATUS FOR TRUSTED KEYBOARD SCANNING

Patent #:	7125800	Issue Dt:	10/24/2006	Application #:	10677057	Filing Dt:	09/30/2003
Publication #:	US20040061196	Pub Dt:	04/01/2004
Title:	METHODS FOR MAKING NEARLY PLANAR DIELECTRIC FILMS IN INTEGRATED CIRCUITS

Patent #:	7356812	Issue Dt:	04/08/2008	Application #:	10677081	Filing Dt:	09/30/2003
Publication #:	US20050071846	Pub Dt:	03/31/2005
Title:	PASSING PARAMETERS BY IMPLICIT REFERENCE

Patent #:	7139203	Issue Dt:	11/21/2006	Application #:	10678595	Filing Dt:	10/03/2003
Publication #:	US20040156258	Pub Dt:	08/12/2004
Title:	VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE

Patent #:	7016250	Issue Dt:	03/21/2006	Application #:	10678722	Filing Dt:	10/03/2003
Publication #:	US20040160840	Pub Dt:	08/19/2004
Title:	VOLTAGE REGULATOR AND DATA PATH FOR A MEMORY DEVICE

Patent #:	7219276	Issue Dt:	05/15/2007	Application #:	10679266	Filing Dt:	10/07/2003
Publication #:	US20050076273	Pub Dt:	04/07/2005
Title:	TESTING CMOS CAM WITH REDUNDANCY

Patent #:	6882560	Issue Dt:	04/19/2005	Application #:	10679544	Filing Dt:	10/06/2003
Publication #:	US20040066682	Pub Dt:	04/08/2004
Title:	READING FERROELECTRIC MEMORY CELLS

Patent #:	6937501	Issue Dt:	08/30/2005	Application #:	10679616	Filing Dt:	10/06/2003
Publication #:	US20040066688	Pub Dt:	04/08/2004
Title:	WRITING TO FERROELECTRIC MEMORY DEVICES

Patent #:	6911381	Issue Dt:	06/28/2005	Application #:	10679822	Filing Dt:	10/06/2003
Publication #:	US20040082156	Pub Dt:	04/29/2004
Title:	BORON INCORPORATED DIFFUSION BARRIER MATERIAL

Patent #:	6882578	Issue Dt:	04/19/2005	Application #:	10680161	Filing Dt:	10/08/2003
Publication #:	US20040071042	Pub Dt:	04/15/2004
Title:	PCRAM REWRITE PREVENTION

Patent #:	7634597	Issue Dt:	12/15/2009	Application #:	10680171	Filing Dt:	10/08/2003
Publication #:	US20050080951	Pub Dt:	04/14/2005
Title:	ALIGNMENT OF INSTRUCTIONS AND REPLIES ACROSS MULTIPLE DEVICES IN A CASCADED SYSTEM, USING BUFFERS OF PROGRAMMABLE DEPTHS

Patent #:	7115981	Issue Dt:	10/03/2006	Application #:	10680391	Filing Dt:	10/07/2003
Publication #:	US20040070061	Pub Dt:	04/15/2004
Title:	SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING INTERPOSERS WITH DAMS PROTRUDING THEREFROM

Patent #:	6836146	Issue Dt:	12/28/2004	Application #:	10680580	Filing Dt:	10/07/2003
Publication #:	US20040070418	Pub Dt:	04/15/2004
Title:	BUILT-IN SELF REPAIR FOR AN INTEGRATED CIRCUIT

Patent #:	7057220	Issue Dt:	06/06/2006	Application #:	10681108	Filing Dt:	10/09/2003
Publication #:	US20050077586	Pub Dt:	04/14/2005
Title:	ULTRASHALLOW PHOTODIODE USING INDIUM

Patent #:	7123530	Issue Dt:	10/17/2006	Application #:	10681161	Filing Dt:	10/09/2003
Publication #:	US20050078505	Pub Dt:	04/14/2005
Title:	AC SENSING FOR A RESISTIVE MEMORY

Patent #:	7227692	Issue Dt:	06/05/2007	Application #:	10681308	Filing Dt:	10/09/2003
Publication #:	US20050078377	Pub Dt:	04/14/2005
Title:	METHOD AND APPARATUS FOR BALANCING COLOR RESPONSE OF IMAGERS

Patent #:	6906953	Issue Dt:	06/14/2005	Application #:	10681408	Filing Dt:	10/08/2003
Publication #:	US20040066672	Pub Dt:	04/08/2004
Title:	VERTICAL NROM HAVING A STORAGE DENSITY OF 1 BIT PER IF2

Patent #:	6975538	Issue Dt:	12/13/2005	Application #:	10681482	Filing Dt:	10/08/2003
Publication #:	US20050078522	Pub Dt:	04/14/2005
Title:	MEMORY BLOCK ERASING IN A FLASH MEMORY DEVICE

Patent #:	7133321	Issue Dt:	11/07/2006	Application #:	10681929	Filing Dt:	10/09/2003
Publication #:	US20050081172	Pub Dt:	04/14/2005
Title:	SENSE AMPLIFIER CIRCUIT

Patent #:	7371311	Issue Dt:	05/13/2008	Application #:	10682276	Filing Dt:	10/08/2003
Publication #:	US20050077181	Pub Dt:	04/14/2005
Title:	MODIFIED ELECTROPLATING SOLUTION COMPONENTS IN A LOW-ACID ELECTROLYTE SOLUTION

Patent #:	6982905	Issue Dt:	01/03/2006	Application #:	10682585	Filing Dt:	10/09/2003
Publication #:	US20050078518	Pub Dt:	04/14/2005
Title:	METHOD AND APPARATUS FOR READING NAND FLASH MEMORY ARRAY

Patent #:	6830963	Issue Dt:	12/14/2004	Application #:	10682590	Filing Dt:	10/09/2003
Title:	FULLY DEPLETED SILICON-ON-INSULATOR CMOS LOGIC

Patent #:	7073016	Issue Dt:	07/04/2006	Application #:	10682674	Filing Dt:	10/09/2003
Publication #:	US20050080987	Pub Dt:	04/14/2005
Title:	RANDOM ACCESS INTERFACE IN A SERIAL MEMORY DEVICE

Patent #:	7303939	Issue Dt:	12/04/2007	Application #:	10682700	Filing Dt:	10/09/2003
Publication #:	US20040076051	Pub Dt:	04/22/2004
Title:	ELECTRO- AND ELECTROLESS PLATING OF METAL IN THE MANUFACTURE OF PCRAM DEVICES

Patent #:	7101792	Issue Dt:	09/05/2006	Application #:	10682703	Filing Dt:	10/09/2003
Publication #:	US20050077630	Pub Dt:	04/14/2005
Title:	METHODS OF PLATING VIA INTERCONNECTS

Patent #:	8233322	Issue Dt:	07/31/2012	Application #:	10683075	Filing Dt:	10/10/2003
Publication #:	US20050081013	Pub Dt:	04/14/2005
Title:	MULTI-PARTITION MEMORY WITH SEPARATED READ AND ALGORITHM DATALINES

Patent #:	7323231	Issue Dt:	01/29/2008	Application #:	10683606	Filing Dt:	10/09/2003
Publication #:	US20050087130	Pub Dt:	04/28/2005
Title:	APPARATUS AND METHODS FOR PLASMA VAPOR DEPOSITION PROCESSES

Patent #:	7311947	Issue Dt:	12/25/2007	Application #:	10683806	Filing Dt:	10/10/2003
Publication #:	US20050078462	Pub Dt:	04/14/2005
Title:	LASER ASSISTED MATERIAL DEPOSITION

Patent #:	7197674	Issue Dt:	03/27/2007	Application #:	10684280	Filing Dt:	10/10/2003
Publication #:	US20040088617	Pub Dt:	05/06/2004
Title:	METHOD AND APPARATUS FOR CONDITIONING OF A DIGITAL PULSE

Patent #:	7067894	Issue Dt:	06/27/2006	Application #:	10684431	Filing Dt:	10/15/2003
Publication #:	US20040080009	Pub Dt:	04/29/2004
Title:	SEMICONDUCTOR DEVICES USING ANTI-REFLECTIVE COATINGS

Patent #:	7030632	Issue Dt:	04/18/2006	Application #:	10684621	Filing Dt:	10/14/2003
Publication #:	US20050077913	Pub Dt:	04/14/2005
Title:	COMPLIANT CONTACT STRUCTURES, CONTACTOR CARDS AND TEST SYSTEM INCLUDING SAME

Patent #:	6894765	Issue Dt:	05/17/2005	Application #:	10684794	Filing Dt:	10/14/2003
Publication #:	US20050078293	Pub Dt:	04/14/2005
Title:	METHODS AND SYSTEMS FOR CONTROLLING RADIATION BEAM CHARACTERISTICS FOR MICROLITHOGRAPHIC PROCESSING

Patent #:	7112454	Issue Dt:	09/26/2006	Application #:	10684967	Filing Dt:	10/14/2003
Publication #:	US20050079638	Pub Dt:	04/14/2005
Title:	SYSTEM AND METHOD FOR REDUCING SHORTING IN MEMORY CELLS

Patent #:	6862700	Issue Dt:	03/01/2005	Application #:	10685297	Filing Dt:	10/14/2003
Publication #:	US20040133826	Pub Dt:	07/08/2004
Title:	MEMORY REDUNDANCY WITH PROGRAMMABLE NON-VOLATILE CONTROL

Patent #:	6897513	Issue Dt:	05/24/2005	Application #:	10686333	Filing Dt:	10/14/2003
Publication #:	US20040092107	Pub Dt:	05/13/2004
Title:	PEROVSKITE-TYPE MATERIAL FORMING METHODS, CAPACITOR DIELECTRIC FORMING METHODS, AND CAPACITOR CONSTRUCTIONS

Patent #:	6922362	Issue Dt:	07/26/2005	Application #:	10686552	Filing Dt:	10/15/2003
Publication #:	US20040141379	Pub Dt:	07/22/2004
Title:	STRUCTURE FOR UPDATING A BLOCK OF MEMORY CELLS IN A FLASH MEMORY DEVICE WITH ERASE AND PROGRAM OPERATION REDUCTION

Patent #:	7099174	Issue Dt:	08/29/2006	Application #:	10686731	Filing Dt:	10/17/2003
Publication #:	US20040085801	Pub Dt:	05/06/2004
Title:	METAL WIRING PATTERN FOR MEMORY DEVICES

Patent #:	6807093	Issue Dt:	10/19/2004	Application #:	10687463	Filing Dt:	10/15/2003
Publication #:	US20040085829	Pub Dt:	05/06/2004
Title:	STRUCTURE AND METHOD FOR TRANSVERSE FIELD ENHANCEMENT

Patent #:	7779212	Issue Dt:	08/17/2010	Application #:	10688461	Filing Dt:	10/17/2003
Publication #:	US20050086417	Pub Dt:	04/21/2005
Title:	METHOD AND APPARATUS FOR SENDING DATA FROM MULTIPLE SOURCES OVER A COMMUNICATIONS BUS

Patent #:	7158399	Issue Dt:	01/02/2007	Application #:	10688828	Filing Dt:	10/17/2003
Publication #:	US20050082585	Pub Dt:	04/21/2005
Title:	DIGITAL DATA APPARATUSES AND DIGITAL DATA OPERATIONAL METHODS

Patent #:	7447720	Issue Dt:	11/04/2008	Application #:	10689256	Filing Dt:	10/20/2003
Publication #:	US20040215677	Pub Dt:	10/28/2004
Title:	METHOD FOR FINDING GLOBAL EXTREMA OF A SET OF BYTES DISTRIBUTED ACROSS AN ARRAY OF PARALLEL PROCESSING ELEMENTS

Patent #:	7596678	Issue Dt:	09/29/2009	Application #:	10689257	Filing Dt:	10/20/2003
Publication #:	US20040215683	Pub Dt:	10/28/2004
Title:	METHOD OF SHIFTING DATA ALONG DIAGONALS IN A GROUP OF PROCESSING ELEMENTS TO TRANSPOSE THE DATA

Patent #:	7503046	Issue Dt:	03/10/2009	Application #:	10689280	Filing Dt:	10/20/2003
Publication #:	US20040215838	Pub Dt:	10/28/2004
Title:	METHOD OF OBTAINING INTERLEAVE INTERVAL FOR TWO DATA VALUES

Patent #:	7263543	Issue Dt:	08/28/2007	Application #:	10689300	Filing Dt:	10/20/2003
Publication #:	US20040215928	Pub Dt:	10/28/2004
Title:	METHOD FOR MANIPULATING DATA IN A GROUP OF PROCESSING ELEMENTS TO TRANSPOSE THE DATA USING A MEMORY STACK

Patent #:	7373645	Issue Dt:	05/13/2008	Application #:	10689312	Filing Dt:	10/20/2003
Publication #:	US20040216115	Pub Dt:	10/28/2004
Title:	METHOD FOR USING EXTREMA TO LOAD BALANCE A LOOP OF PARALLEL PROCESSING ELEMENTS

Patent #:	7454451	Issue Dt:	11/18/2008	Application #:	10689335	Filing Dt:	10/20/2003
Publication #:	US20040215678	Pub Dt:	10/28/2004
Title:	METHOD FOR FINDING LOCAL EXTREMA OF A SET OF VALUES FOR A PARALLEL PROCESSING ELEMENT

Patent #:	7437729	Issue Dt:	10/14/2008	Application #:	10689336	Filing Dt:	10/20/2003
Publication #:	US20040216116	Pub Dt:	10/28/2004
Title:	METHOD FOR LOAD BALANCING A LOOP OF PARALLEL PROCESSING ELEMENTS

Patent #:	7430742	Issue Dt:	09/30/2008	Application #:	10689345	Filing Dt:	10/20/2003
Publication #:	US20040216117	Pub Dt:	10/28/2004
Title:	METHOD FOR LOAD BALANCING A LINE OF PARALLEL PROCESSING ELEMENTS

Patent #:	7448038	Issue Dt:	11/04/2008	Application #:	10689355	Filing Dt:	10/20/2003
Publication #:	US20040216118	Pub Dt:	10/28/2004
Title:	METHOD FOR USING FILTERING TO LOAD BALANCE A LOOP OF PARALLEL PROCESSING ELEMENTS

Patent #:	7472392	Issue Dt:	12/30/2008	Application #:	10689365	Filing Dt:	10/20/2003
Publication #:	US20040216119	Pub Dt:	10/28/2004
Title:	METHOD FOR LOAD BALANCING AN N-DIMENSIONAL ARRAY OF PARALLEL PROCESSING ELEMENTS

Patent #:	7676648	Issue Dt:	03/09/2010	Application #:	10689366	Filing Dt:	10/20/2003
Publication #:	US20040215930	Pub Dt:	10/28/2004
Title:	METHOD FOR MANIPULATING DATA IN A GROUP OF PROCESSING ELEMENTS TO PERFORM A REFLECTION OF THE DATA

Patent #:	7581080	Issue Dt:	08/25/2009	Application #:	10689380	Filing Dt:	10/20/2003
Publication #:	US20040215927	Pub Dt:	10/28/2004
Title:	METHOD FOR MANIPULATING DATA IN A GROUP OF PROCESSING ELEMENTS ACCORDING TO LOCALLY MAINTAINED COUNTS

Patent #:	7913062	Issue Dt:	03/22/2011	Application #:	10689390	Filing Dt:	10/20/2003
Publication #:	US20040220949	Pub Dt:	11/04/2004
Title:	METHOD OF ROTATING DATA IN A PLURALITY OF PROCESSING ELEMENTS

Patent #:	7574466	Issue Dt:	08/11/2009	Application #:	10689449	Filing Dt:	10/20/2003
Publication #:	US20040215679	Pub Dt:	10/28/2004
Title:	METHOD FOR FINDING GLOBAL EXTREMA OF A SET OF SHORTS DISTRIBUTED ACROSS AN ARRAY OF PARALLEL PROCESSING ELEMENTS

Patent #:	7026243	Issue Dt:	04/11/2006	Application #:	10689958	Filing Dt:	10/20/2003
Publication #:	US20050085071	Pub Dt:	04/21/2005
Title:	METHODS OF FORMING CONDUCTIVE METAL SILICIDES BY REACTION OF METAL WITH SILICON

Patent #:	6940181	Issue Dt:	09/06/2005	Application #:	10690339	Filing Dt:	10/21/2003
Publication #:	US20050085008	Pub Dt:	04/21/2005
Title:	THINNED, STRENGTHENED SEMICONDUCTOR SUBSTRATES

Patent #:	7230839	Issue Dt:	06/12/2007	Application #:	10690368	Filing Dt:	10/21/2003
Publication #:	US20050083718	Pub Dt:	04/21/2005
Title:	MAGNITUDE CONTENT ADDRESSABLE MEMORY

Patent #:	7274076	Issue Dt:	09/25/2007	Application #:	10690399	Filing Dt:	10/20/2003
Publication #:	US20050082573	Pub Dt:	04/21/2005
Title:	THRESHOLD VOLTAGE ADJUSTMENT FOR LONG CHANNEL TRANSISTORS

Patent #:	7064010	Issue Dt:	06/20/2006	Application #:	10690417	Filing Dt:	10/20/2003
Publication #:	US20050082651	Pub Dt:	04/21/2005
Title:	METHODS OF COATING AND SINGULATING WAFERS

Patent #:	7089409	Issue Dt:	08/08/2006	Application #:	10690634	Filing Dt:	10/23/2003
Publication #:	US20040083351	Pub Dt:	04/29/2004
Title:	INTERFACE TO A MEMORY SYSTEM FOR A PROCESSOR HAVING A REPLAY SYSTEM

Patent #:	7419895	Issue Dt:	09/02/2008	Application #:	10692430	Filing Dt:	10/23/2003
Publication #:	US20050090085	Pub Dt:	04/28/2005
Title:	NAND MEMORY ARRAYS

Patent #:	7272701	Issue Dt:	09/18/2007	Application #:	10692436	Filing Dt:	10/22/2003
Publication #:	US20050091475	Pub Dt:	04/28/2005
Title:	METHOD AND APPARATUS FOR LIMITING PORTS IN A REGISTER ALIAS TABLE HAVING HIGH-BANDWIDTH AND LOW-BANDWIDTH STRUCTURES

Patent #:	7112471	Issue Dt:	09/26/2006	Application #:	10693376	Filing Dt:	10/23/2003
Publication #:	US20040084741	Pub Dt:	05/06/2004
Title:	LEADLESS PACKAGING FOR IMAGE SENSOR DEVICES AND METHODS OF ASSEMBLY

Patent #:	6909194	Issue Dt:	06/21/2005	Application #:	10693380	Filing Dt:	10/24/2003
Publication #:	US20040087077	Pub Dt:	05/06/2004
Title:	ELECTRONIC ASSEMBLY HAVING SEMICONDUCTOR COMPONENT WITH POLYMER SUPPORT MEMBER AND METHOD OF FABRICATION

Patent #:	7046562	Issue Dt:	05/16/2006	Application #:	10694379	Filing Dt:	10/27/2003
Publication #:	US20040085838	Pub Dt:	05/06/2004
Title:	INTEGRATED CIRCUIT RESET CIRCUITRY

Patent #:	6937516	Issue Dt:	08/30/2005	Application #:	10694689	Filing Dt:	10/28/2003
Publication #:	US20040124488	Pub Dt:	07/01/2004
Title:	SEMICONDUCTOR DEVICE

Patent #:	7102184	Issue Dt:	09/05/2006	Application #:	10694990	Filing Dt:	10/29/2003
Publication #:	US20040251481	Pub Dt:	12/16/2004
Title:	AN IMAGE DEVICE AND PHOTODIODE STRUCTURE

Patent #:	7374993	Issue Dt:	05/20/2008	Application #:	10695959	Filing Dt:	10/27/2003
Publication #:	US20050090069	Pub Dt:	04/28/2005
Title:	METHODS OF FORMING CAPACITORS

Patent #:	6893949	Issue Dt:	05/17/2005	Application #:	10696165	Filing Dt:	10/28/2003
Publication #:	US20040084704	Pub Dt:	05/06/2004
Title:	SEMICONDUCTOR DEVICES HAVING CONTACT PLUGS AND LOCAL INTERCONNECTS AND METHODS FOR MAKING THE SAME

Patent #:	6914821	Issue Dt:	07/05/2005	Application #:	10696688	Filing Dt:	10/29/2003
Publication #:	US20040085840	Pub Dt:	05/06/2004
Title:	HIGH VOLTAGE LOW POWER SENSING DEVICE FOR FLASH MEMORY

Patent #:	6977852	Issue Dt:	12/20/2005	Application #:	10696973	Filing Dt:	10/30/2003
Publication #:	US20040213060	Pub Dt:	10/28/2004
Title:	ROM-BASED CONTROLLER MONITOR IN A MEMORY DEVICE

Patent #:	7087119	Issue Dt:	08/08/2006	Application #:	10697511	Filing Dt:	10/30/2003
Publication #:	US20040083951	Pub Dt:	05/06/2004
Title:	ATOMIC LAYER DEPOSITION WITH POINT OF USE GENERATED REACTIVE GAS SPECIES

Patent #:	7012832	Issue Dt:	03/14/2006	Application #:	10698747	Filing Dt:	10/31/2003
Title:	MAGNETIC MEMORY CELL WITH PLURAL READ TRANSISTORS

Patent #:	6947323	Issue Dt:	09/20/2005	Application #:	10698752	Filing Dt:	10/31/2003
Publication #:	US20040151026	Pub Dt:	08/05/2004
Title:	CHIP PROTECTION REGISTER UNLOCKING

Patent #:	6954000	Issue Dt:	10/11/2005	Application #:	10698788	Filing Dt:	10/31/2003
Publication #:	US20040089954	Pub Dt:	05/13/2004
Title:	SEMICONDUCTOR COMPONENT WITH REDISTRIBUTION CIRCUIT HAVING CONDUCTORS AND TEST CONTACTS

Patent #:	7105208	Issue Dt:	09/12/2006	Application #:	10699013	Filing Dt:	10/30/2003
Publication #:	US20040089233	Pub Dt:	05/13/2004
Title:	METHODS AND PROCESSES UTILIZING MICROWAVE EXCITATION

Patent #:	7169662	Issue Dt:	01/30/2007	Application #:	10699256	Filing Dt:	10/30/2003
Publication #:	US20040171247	Pub Dt:	09/02/2004
Title:	METHODS FOR MAKING SEMICONDUCTOR STRUCTURES HAVING HIGH-SPEED AREAS AND HIGH-DENSITY AREAS

100

Patent #:	7140023	Issue Dt:	11/21/2006	Application #:	10699638	Filing Dt:	10/31/2003
Publication #:	US20050097295	Pub Dt:	05/05/2005
Title:	SYMBOLIC BUFFER ALLOCATION IN LOCAL CACHE AT A NETWORK PROCESSING ELEMENT

Assignor

JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT

Exec Dt:

07/31/2019

Assignees

MICRON TECHNOLOGY, INC.

8000 S FEDERAL WAY

BOISE, IDAHO 83707

MICRON SEMICONDUCTOR PRODUCTS, INC.

8000 S FEDERAL WAY

BOISE, IDAHO 83707

Correspondence name and address
	WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
	ONE MARKET, SPEAR TOWER, SUITE 3300
	SAN FRANCISCO, CA 94105

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