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07/04/2006
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10742429
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12/19/2003
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07/08/2004
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05/05/2009
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10744206
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12/22/2003
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06/23/2005
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10/12/2004
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10744495
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12/23/2003
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05/11/2010
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10744632
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12/23/2003
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11/11/2004
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10/30/2007
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10744664
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12/23/2003
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06/23/2005
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REWRITABLE FUSE MEMORY
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06/21/2005
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10744931
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12/22/2003
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09/16/2004
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05/01/2007
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10745008
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12/23/2003
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05/19/2005
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07/05/2005
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10745040
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12/22/2003
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07/15/2004
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04/04/2006
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10745295
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12/23/2003
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09/30/2004
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08/15/2006
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10745297
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12/23/2003
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06/02/2005
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03/27/2007
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10745311
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12/22/2003
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07/15/2004
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07/04/2006
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10745531
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12/29/2003
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07/07/2005
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11/17/2009
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10745611
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12/29/2003
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07/07/2005
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04/17/2007
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10745903
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12/23/2003
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07/15/2004
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BUNDLE SKEW MANAGEMENT AND CELL SYNCHRONIZATION
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09/07/2004
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10746095
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12/26/2003
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04/04/2006
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10746555
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12/24/2003
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09/30/2004
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10/24/2006
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10746878
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12/23/2003
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10/14/2004
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METHOD FOR MANUFACTURING NON-VOLATILE MEMORY CELLS ON A SEMICONDUCTOR SUBSTRATE
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04/17/2007
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10746975
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12/24/2003
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07/07/2005
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SECURE BOOTING AND PROVISIONING
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06/14/2005
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10747586
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12/29/2003
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07/22/2004
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SOI DEVICE WITH REDUCED DRAIN INDUCED BARRIER LOWERING
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01/30/2007
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10747625
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12/30/2003
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07/07/2005
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PREDICTIVE FILTERING OF REGISTER CACHE ENTRY
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02/12/2008
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10747917
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12/29/2003
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07/07/2005
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04/26/2005
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10748447
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12/30/2003
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02/24/2005
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FAST PAGE PROGRAMMING ARCHITECTURE AND METHOD IN A NON-VOLATILE MEMORY DEVICE WITH AN SPI INTERFACE
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04/25/2006
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10748696
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12/30/2003
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09/02/2004
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NON VOLATILE MEMORY DEVICE INCLUDING A PREDETERMINED NUMBER OF SECTORS
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04/18/2006
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10748701
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12/30/2003
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10/28/2004
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STABILIZATION METHOD FOR DRAIN VOLTAGE IN NON-VOLATILE MULTI-LEVEL MEMORY CELLS AND RELATED MEMORY DEVICE
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10/24/2006
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10749020
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12/29/2003
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10/21/2004
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METHOD FOR MANUFACTURING NON-VOLATILE MEMORY CELLS ON A SEMICONDUCTIVE SUBSTRATE
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06/07/2005
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10749659
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12/30/2003
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08/05/2004
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SILICON-ON-INSULATOR COMPRISING INTEGRATED CIRCUITRY
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09/13/2005
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10750736
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12/31/2003
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06/30/2005
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DIGITAL SWITCHING TECHNIQUE FOR DETECTING DATA
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06/12/2007
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10751141
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12/31/2003
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07/07/2005
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TRANSISTOR HAVING VERTICAL JUNCTION EDGE AND METHOD OF MANUFACTURING THE SAME
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01/13/2009
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10751441
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01/06/2004
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07/14/2005
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DIE PACKAGE HAVING AN ADHESIVE FLOW RESTRICTION AREA
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12/19/2006
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10751443
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01/06/2004
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07/15/2004
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FULLY-DEPLETED (FD) (SOI) MOSFET ACCESS TRANSISTOR
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05/31/2005
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10751941
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01/07/2004
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07/04/2006
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10752555
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01/08/2004
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12/16/2004
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METHOD AND APPARATUS FOR REDUCING IMAGER FLOATING DIFFUSION LEAKAGE
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07/04/2006
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10753041
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01/07/2004
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07/22/2004
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METHOD OF FORMING A CONTACT STRUCTURE INCLUDING A VERTICAL BARRIER STRUCTURE AND TWO BARRIER LAYERS
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06/07/2005
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10753914
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01/07/2004
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SEMICONDUCTOR DEVICES, CAPACITOR ANTIFUSES, DYNAMIC RANDOM ACCESS MEMORIES, AND CELL PLATE BIAS CONNECTION METHODS
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09/12/2006
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10754658
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01/08/2004
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07/22/2004
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06/05/2007
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10755097
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01/09/2004
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11/24/2005
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11/04/2008
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10755411
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01/13/2004
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07/14/2005
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01/08/2008
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10755905
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01/12/2004
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07/14/2005
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04/25/2006
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10756621
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01/12/2004
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11/25/2004
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07/03/2007
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01/14/2004
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07/22/2004
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SELECTIVE DEPOSITION OF SOLDER BALL CONTACTS
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07/25/2006
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10757252
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01/13/2004
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09/16/2004
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CMOS CONSTRUCTIONS
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08/07/2007
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10757253
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01/13/2004
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09/16/2004
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12/13/2005
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10758008
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01/16/2004
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07/29/2004
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05/05/2009
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10758009
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01/16/2004
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07/29/2004
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10/24/2006
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10758102
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01/16/2004
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09/16/2004
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03/27/2007
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01/15/2004
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06/09/2005
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08/14/2007
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01/16/2004
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07/29/2004
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02/27/2007
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01/22/2004
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08/05/2004
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MRAM MEMORY CELL HAVING AN ELECTROPLATED BOTTOM LAYER
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11/30/2004
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10761782
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01/20/2004
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08/05/2004
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11/16/2004
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10762061
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01/21/2004
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09/23/2004
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WRITE AND ERASE PROTECTION IN A SYNCHRONOUS MEMORY
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10/12/2004
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10763038
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01/21/2004
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08/05/2004
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02/27/2007
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10763044
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01/22/2004
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04/28/2005
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08/01/2006
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10764832
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01/26/2004
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07/28/2005
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05/13/2008
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10765301
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01/27/2004
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07/28/2005
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SELECTIVE EPITAXY VERTICAL INTEGRATED CIRCUIT COMPONENTS
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11/25/2008
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10765314
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01/27/2004
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09/23/2004
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ATOMIC LAYER DEPOSITION WITH POINT OF USE GENERATED REACTIVE GAS SPECIES
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03/29/2005
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10765546
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01/26/2004
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08/12/2004
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05/02/2006
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10765699
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01/26/2004
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07/28/2005
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09/12/2006
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10765911
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01/29/2004
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08/04/2005
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NON-VOLATILE ZERO FIELD SPLITTING RESONANCE MEMORY
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04/29/2008
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10766010
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01/29/2004
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12/01/2005
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Title:
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SIMULTANEOUS READ CIRCUIT FOR MULTIPLE MEMORY CELLS
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Patent #:
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Issue Dt:
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05/17/2005
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Application #:
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10766376
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Filing Dt:
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01/27/2004
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Publication #:
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Pub Dt:
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09/23/2004
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Title:
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MICROELECTRONIC DEVICE FABRICATING METHOD, METHOD OF FORMING A PAIR OF CONDUCTIVE DEVICE COMPONENTS OF DIFFERENT BASE WIDTHS FROM A COMMON DEPOSITED CONDUCTIVE LAYER, AND INTEGRATED CIRCUITRY
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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10767232
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Filing Dt:
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01/28/2004
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Publication #:
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Pub Dt:
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10/07/2004
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Title:
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MICROELECTRONIC DEVICES WITH IMPROVED HEAT DISSIPATION AND METHODS FOR COOLING MICROELECTRONIC DEVICES
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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10767290
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Filing Dt:
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01/28/2004
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Publication #:
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Pub Dt:
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09/23/2004
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Title:
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MULTI-SUBSTRATE MICROELECTRONIC PACKAGES AND METHODS FOR MANUFACTURE
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Patent #:
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Issue Dt:
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03/15/2011
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Application #:
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10767298
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Filing Dt:
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01/28/2004
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Publication #:
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Pub Dt:
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07/28/2005
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Title:
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METHODS FOR FORMING SMALL-SCALE CAPACITOR STRUCTURES
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Patent #:
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Issue Dt:
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11/20/2007
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Application #:
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10767555
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Filing Dt:
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01/29/2004
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Publication #:
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Pub Dt:
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08/04/2005
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Title:
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DUAL EDGE COMMAND IN DRAM
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Patent #:
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Issue Dt:
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01/15/2008
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Application #:
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10767764
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Filing Dt:
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01/29/2004
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Publication #:
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Pub Dt:
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08/04/2005
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Title:
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METHODS FOR FORMING A METALLIC DAMASCENE STRUCTURE
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Patent #:
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Issue Dt:
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10/17/2006
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Application #:
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10767921
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Filing Dt:
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01/29/2004
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Publication #:
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Pub Dt:
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08/04/2005
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Title:
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DIE-WAFER PACKAGE AND METHOD OF FABRICATING SAME
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Patent #:
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Issue Dt:
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01/30/2007
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Application #:
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10767952
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Filing Dt:
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01/29/2004
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Publication #:
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Pub Dt:
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08/04/2005
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Title:
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METHOD OF FABRICATING WAFER-LEVEL PACKAGING WITH SIDEWALL PASSIVATION AND RELATED APPARATUS
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Patent #:
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Issue Dt:
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10/10/2006
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Application #:
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10768081
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Filing Dt:
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02/02/2004
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Publication #:
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Pub Dt:
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08/05/2004
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Title:
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DOUBLE BLANKET ION IMPLANT METHOD AND STRUCTURE
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Patent #:
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Issue Dt:
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06/21/2005
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Application #:
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10768568
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Filing Dt:
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01/29/2004
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Publication #:
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Pub Dt:
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09/23/2004
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Title:
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PEROVSKITE-TYPE MATERIAL FORMING METHODS, CAPACITOR DIELECTRIC FORMING METHODS, AND CAPACITOR CONSTRUCTIONS
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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10768573
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Filing Dt:
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01/29/2004
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Publication #:
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Pub Dt:
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09/23/2004
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Title:
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HIGH VOLTAGE POSITIVE AND NEGATIVE TWO-PHASE DISCHARGE SYSTEM AND METHOD FOR CHANNEL ERASE IN FLASH MEMORY DEVICES
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Patent #:
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Issue Dt:
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06/20/2006
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Application #:
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10768678
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Filing Dt:
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02/02/2004
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Publication #:
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Pub Dt:
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08/05/2004
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Title:
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Method for fabricating sensor devices having improved switching properties
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Patent #:
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Issue Dt:
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09/20/2005
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Application #:
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10768829
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Filing Dt:
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01/30/2004
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Publication #:
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Pub Dt:
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09/23/2004
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Title:
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REDUCING DIGIT EQUILIBRATE CURRENT DURING SELF-REFRESH MODE
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Patent #:
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Issue Dt:
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06/17/2008
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Application #:
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10769001
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Filing Dt:
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01/30/2004
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Publication #:
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Pub Dt:
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08/04/2005
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Title:
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ERROR DETECTION AND CORRECTION SCHEME FOR A MEMORY DEVICE
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Patent #:
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Issue Dt:
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03/06/2007
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Application #:
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10769079
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Filing Dt:
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01/30/2004
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Publication #:
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Pub Dt:
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08/04/2005
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Title:
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BUFFER CONTROL SYSTEM AND METHOD FOR A MEMORY SYSTEM HAVING OUTSTANDING READ AND WRITE REQUEST BUFFERS
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Patent #:
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Issue Dt:
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04/12/2005
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Application #:
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10769116
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Filing Dt:
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01/30/2004
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Title:
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VERTICAL DEVICE 4F2 EEPROM MEMORY
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Patent #:
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Issue Dt:
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09/19/2006
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Application #:
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10769433
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Filing Dt:
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01/30/2004
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Publication #:
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Pub Dt:
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08/04/2005
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Title:
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SOLID SOURCE PRECURSOR DELIVERY SYSTEM
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Patent #:
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Issue Dt:
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10/26/2004
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Application #:
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10770611
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Filing Dt:
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02/02/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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INPUT STAGE APPARATUS AND METHOD HAVING A VARIABLE REFERENCE VOLTAGE
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Patent #:
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Issue Dt:
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10/24/2006
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Application #:
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10770800
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Filing Dt:
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02/03/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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CIRCUITS AND METHODS TO PROTECT A GATE DIELECTRIC ANTIFUSE
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Patent #:
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Issue Dt:
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05/15/2007
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Application #:
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10770941
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Filing Dt:
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02/03/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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STACKED DIE MODULE AND TECHNIQUES FOR FORMING A STACKED DIE MODULE
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Patent #:
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Issue Dt:
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04/18/2006
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Application #:
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10771085
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Filing Dt:
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02/03/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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STACKED DIE MODULE AND TECHNIQUES FOR FORMING A STACKED DIE MODULE
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Patent #:
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Issue Dt:
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06/21/2005
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Application #:
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10771291
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Filing Dt:
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02/05/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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WAFER ALIGNMENT SYSTEM
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10771436
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Filing Dt:
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02/05/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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PHYSICALLY ALTERNATING SENSE AMPLIFIER ACTIVATION
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Patent #:
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Issue Dt:
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05/01/2007
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Application #:
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10771611
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Filing Dt:
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02/04/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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MEASURE-CONTROLLED CIRCUIT WITH FREQUENCY CONTROL
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Patent #:
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Issue Dt:
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07/12/2005
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Application #:
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10772204
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Filing Dt:
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02/03/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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BOARD-ON-CHIP PACKAGES
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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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10772312
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Filing Dt:
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02/06/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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CAPACITOR CHARGE SHARING CHARGE PUMP
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Patent #:
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Issue Dt:
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01/04/2005
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Application #:
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10772834
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Filing Dt:
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02/05/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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ULTRA LOW POWER TRACKED LOW VOLTAGE REFERENCE SOURCE
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Patent #:
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Issue Dt:
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08/12/2008
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Application #:
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10773520
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Filing Dt:
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02/05/2004
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Publication #:
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Pub Dt:
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08/11/2005
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Title:
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SYSTEM AND METHOD FOR ARBITRATION OF MEMORY RESPONSES IN A HUB-BASED MEMORY SYSTEM
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Patent #:
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Issue Dt:
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08/31/2010
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Application #:
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10773583
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Filing Dt:
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02/05/2004
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Publication #:
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Pub Dt:
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08/11/2005
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Title:
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APPARATUS AND METHOD FOR DATA BYPASS FOR A BI-DIRECTIONAL DATA BUS IN A HUB-BASED MEMORY SUB-SYSTEM
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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10775231
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Filing Dt:
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02/11/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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BALANCED SENSE AMPLIFIER CONTROL FOR OPEN DIGIT LINE ARCHITECTURE MEMORY DEVICES
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Patent #:
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Issue Dt:
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08/30/2005
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Application #:
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10775299
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Filing Dt:
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02/09/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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CACHE INVALIDATION METHOD AND APPARATUS FOR A GRAPHICS PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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12/07/2004
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Application #:
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10775363
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Filing Dt:
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02/10/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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APPARATUS AND METHOD FOR DYNAMICALLY REPAIRING A SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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10/23/2007
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Application #:
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10775394
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Filing Dt:
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02/10/2004
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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LOAD BOARD SOCKET ADAPTER AND INTERFACE METHOD
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Patent #:
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Issue Dt:
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03/08/2005
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Application #:
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10775582
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Filing Dt:
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02/10/2004
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Publication #:
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Pub Dt:
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08/19/2004
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Title:
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BRIDGE-TYPE MAGNETIC RANDOM ACCESS MEMORY (MRAM) LATCH
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Patent #:
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Issue Dt:
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08/30/2005
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Application #:
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10775703
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Filing Dt:
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02/10/2004
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Publication #:
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Pub Dt:
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08/19/2004
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Title:
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MICROELECTRONIC ASSEMBLIES AND ELECTRONIC DEVICES INCLUDING CONNECTION STRUCTURES WITH MULTIPLE ELONGATED MEMBERS
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Patent #:
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Issue Dt:
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05/22/2007
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Application #:
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10775908
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Filing Dt:
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02/10/2004
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Publication #:
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Pub Dt:
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08/11/2005
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Title:
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NROM FLASH MEMORY WITH A HIGH-PERMITTIVITY GATE DIELECTRIC
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Patent #:
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Issue Dt:
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03/24/2009
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Application #:
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10777457
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Filing Dt:
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02/12/2004
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Publication #:
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Pub Dt:
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11/18/2004
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Title:
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SENSE AMPLIFIER FOR LOW-SUPPLY-VOLTAGE NONVOLATILE MEMORY CELLS
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Patent #:
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Issue Dt:
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06/14/2005
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Application #:
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10777582
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Filing Dt:
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02/12/2004
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Publication #:
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Pub Dt:
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08/19/2004
| | | | |
Title:
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SEMICONDUCTOR PACKAGE AND METHOD PRODUCING SAME
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Patent #:
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Issue Dt:
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02/14/2006
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Application #:
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10777674
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Filing Dt:
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02/13/2004
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Publication #:
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Pub Dt:
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08/19/2004
| | | | |
Title:
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HIGH SPEED WORDLINE DECODER FOR DRIVING A LONG WORDLINE
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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10777684
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Filing Dt:
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02/13/2004
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Publication #:
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Pub Dt:
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08/19/2004
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Title:
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NON-VOLATILE RESISTANCE VARIABLE DEVICES AND METHOD OF FORMING SAME, ANALOG MEMORY DEVICES AND METHOD OF FORMING SAME, PROGRAMMABLE MEMORY CELL AND METHOD OF FORMING SAME, AND METHOD OF STRUCTURALLY CHANGING A NON-VOLATILE DEVICE
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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10778440
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Filing Dt:
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02/13/2004
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Publication #:
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Pub Dt:
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08/19/2004
| | | | |
Title:
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METHOD TO FABRICATE AN INTRINSIC POLYCRYSTALLINE SILICON FILM
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