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04/18/2006
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10816204
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04/01/2004
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12/16/2004
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DOUBLE READ STAGE SENSE AMPLIFIER
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09/19/2006
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10816271
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03/31/2004
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Title:
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04/05/2005
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10816386
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04/01/2004
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09/23/2004
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NON-VOLATILE MEMORY ERASE CIRCUITRY
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03/21/2006
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10817029
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04/01/2004
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10/13/2005
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01/11/2005
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10817656
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04/02/2004
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09/30/2004
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AUTOMATIC REFERENCE VOLTAGE REGULATION IN A MEMORY DEVICE
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08/02/2005
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10818225
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04/05/2004
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09/30/2004
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PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR ASSEMBLING MICROELECTRONIC DEVICES
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08/23/2005
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10818228
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04/05/2004
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09/30/2004
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PACKAGED MICROELECTRONIC COMPONENT ASSEMBLIES
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05/15/2007
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10818323
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04/05/2004
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05/05/2005
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REDUCED FOOTPRINT PACKAGED MICROELECTRONIC COMPONENTS AND METHODS FOR MANUFACTURING SUCH MICROELECTRONIC COMPONENTS
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08/08/2006
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10819315
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04/07/2004
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09/30/2004
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LAYERED RESISTANCE VARIABLE MEMORY DEVICE AND METHOD OF FABRICATION
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06/13/2006
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10819517
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04/06/2004
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09/30/2004
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ETCH OF SILICON NITRIDE SELECTIVE TO SILICON AND SILICON DIOXIDE USEFUL DURING THE FORMATION OF A SEMICONDUCTOR DEVICE
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09/06/2005
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10820063
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04/06/2004
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09/30/2004
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PIXEL RESAMPLING SYSTEM AND METHOD FOR TEXT
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07/19/2005
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10820415
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04/08/2004
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09/30/2004
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MAGNETIC TUNNELING JUNCTION ANTIFUSE DEVICE
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12/26/2006
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10822118
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04/08/2004
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10/13/2005
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METHODS OF FORMING A REACTION PRODUCT AND METHODS OF FORMING A CONDUCTIVE METAL SILICIDE BY REACTION OF METAL WITH SILICON
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08/01/2006
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10822121
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04/09/2004
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09/30/2004
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SEMICONDUCTOR CONSTRUCTIONS
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09/15/2009
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10822275
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04/08/2004
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10/13/2005
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SYSTEM AND METHOD FOR OPTIMIZING INTERCONNECTIONS OF COMPONENTS IN A MULTICHIP MEMORY MODULE
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07/05/2005
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10822771
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04/13/2004
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09/30/2004
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LOW VOLTAGE CURRENT REFERENCE
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06/28/2005
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10823301
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04/12/2004
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09/30/2004
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METHOD AND CIRCUIT FOR LIMITING A PUMPED VOLTAGE
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04/12/2005
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10823326
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04/13/2004
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10/07/2004
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SYSTEMS EMPLOYING ELEVATED TEMPERATURES TO ENHANCE QUALITY CONTROL IN MICROELECTRONIC COMPONENT MANUFACTURE
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07/18/2006
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10823887
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04/13/2004
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09/30/2004
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ATOMIC LAYER DEPOSITION METHODS
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05/01/2007
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10824238
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04/13/2004
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09/30/2004
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METHOD FOR FORMING AN ANTIFUSE
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06/12/2007
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10824279
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04/14/2004
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10/20/2005
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METHODS FOR IMPROVING ANGLED LINE FEATURE ACCURACY AND THROUGHPUT USING ELECTRON BEAM LITHOGRAPHY AND ELECTRON BEAM LITHOGRAPHY SYSTEM
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05/05/2009
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10826660
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04/16/2004
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04/02/2009
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PROTECTIVE LAYER FOR CORROSION PREVENTION DURING LITHOGRAPHY AND ETCH
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05/04/2010
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10827806
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04/20/2004
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10/07/2004
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METHODS FOR TESTING SEMICONDUCTOR DEVICES METHODS FOR PROTECTING THE SAME FROM ELECTROSTATIC DISCHARGE EVENTS DURING TESTING,AND METHODS FOR FABRICATING INSERTS FOR USE IN TESTING SEMICONDUCTOR DEVICES
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06/07/2005
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10827933
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04/19/2004
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10/07/2004
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METHODS OF FORMING VOID REGIONS, DIELECTRIC REGIONS AND CAPACITOR CONSTRUCTIONS
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07/12/2005
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10828162
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04/21/2004
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10/07/2004
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OFFSET COMPENSATED SENSING FOR MAGNETIC RANDOM ACCESS MEMORY
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10/03/2006
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10828686
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04/21/2004
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10/07/2004
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SYSTEMS AND METHODS FOR FORMING STRONTIUM-AND/OR BARIUM-CONTAINING LAYERS
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05/19/2009
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10829647
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04/22/2004
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10/07/2004
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METHODS FOR ASSEMBLY AND PACKAGING OF FLIP CHIP CONFIGURED DICE WITH INTERPOSER
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01/22/2008
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10829778
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04/22/2004
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10/07/2004
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DOUBLE BUMPING OF FLEXIBLE SUBSTRATE FOR FIRST AND SECOND LEVEL INTERCONNECTS
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08/02/2005
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10830888
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04/22/2004
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10/07/2004
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METHOD AND SYSTEM FOR ACCELERATING COUPLING OF DIGITAL SIGNALS
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07/15/2008
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10832178
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04/26/2004
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10/27/2005
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COMPLIANT MULTI-COMPOSITION INTERCONNECTS
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10/09/2007
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10832543
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04/26/2004
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10/27/2005
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METHODS OF FORMING MEMORY ARRAYS; AND METHODS OF FORMING CONTACTS TO BITLINES
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11/28/2006
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10832688
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04/27/2004
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10/27/2005
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METHOD AND APPARATUS FOR FABRICATING A MEMORY DEVICE WITH A DIELECTRIC ETCH STOP LAYER
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01/24/2012
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10834651
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04/29/2004
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10/14/2004
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METHODS FOR ASSEMBLING SEMICONDUCTOR DEVICES IN STACKED ARRANGEMENTS BY POSITIONING SPACERS THEREBETWEEN
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06/12/2007
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10834775
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04/28/2004
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11/03/2005
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PHASE-LOCKED LOOP CIRCUITS WITH REDUCED LOCK TIME
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07/17/2007
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10834809
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04/29/2004
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11/03/2005
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WAFER EDGE RING STRUCTURES AND METHODS OF FORMATION
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07/05/2005
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10835360
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04/28/2004
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10/14/2004
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MULTI-FREQUENCY SYNCHRONIZING CLOCK SIGNAL GENERATOR
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12/27/2005
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10835361
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04/28/2004
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10/14/2004
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MULTI-FREQUENCY SYNCHRONIZING CLOCK SIGNAL GENERATOR
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04/04/2006
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10835538
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04/29/2004
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01/20/2005
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FULL-SWING WORDLINE DRIVING CIRCUIT
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09/13/2005
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10835704
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04/29/2004
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LOW VOLTAGE DATA PATH AND CURRENT SENSE AMPLIFIER
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09/26/2006
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10837428
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04/29/2004
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10/14/2004
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METHODS OF FORMING FIELD EFFECT TRANSISTORS INCLUDING FLOATING GATE FIELD EFFECT TRANSISTORS
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01/18/2005
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10837476
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04/30/2004
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10/14/2004
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MAGNETIC NON-VOLATILE MEMORY COIL LAYOUT ARCHITECTURE AND PROCESS INTEGRATION SCHEME
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10/03/2006
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10838143
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05/03/2004
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12/09/2004
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FLOATING GATE TRANSISTOR WITH HORIZONTAL GATE LAYERS STACKED NEXT TO VERTICAL BODY
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01/11/2005
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10838276
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05/04/2004
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10/14/2004
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VERTICAL NROM HAVING A STORAGE DENSITY OF 1 BIT PER 1F2
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10/31/2006
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10838487
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05/04/2004
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10/14/2004
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MAGNETORESISTIVE MEMORY AND METHOD OF MANUFACTURING THE SAME
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10/26/2010
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10838511
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05/04/2004
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10/21/2004
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CAPTURING READ DATA
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08/29/2006
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10839942
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05/06/2004
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11/10/2005
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MEMORY CONTROLLER METHOD AND SYSTEM COMPENSATING FOR MEMORY CELL DATA LOSSES
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12/01/2009
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10840535
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05/06/2004
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11/10/2005
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SELECTIVE PROVISION OF A DIBLOCK COPOLYMER MATERIAL
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03/13/2012
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10840571
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05/06/2004
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11/10/2005
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05/13/2008
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10840647
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05/07/2004
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11/10/2005
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RESIST PATTERN AND REFLOW TECHNOLOGY
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05/29/2007
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10840733
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05/06/2004
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11/10/2005
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METHODS FOR FORMING BACKSIDE ALIGNMENT MARKERS USEABLE IN SEMICONDUCTOR LITHOGRAPHY
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09/25/2007
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10840761
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05/06/2004
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11/10/2005
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BALLISTIC DIRECT INJECTION NROM CELL ON STRAINED SILICON STRUCTURES
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05/29/2007
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10840792
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05/06/2004
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11/10/2005
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SILICON ON INSULATOR READ-WRITE NON-VOLATILE MEMORY COMPRISING LATERAL THYRISTOR AND TRAPPING LAYER
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06/28/2005
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10840902
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05/07/2004
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11/18/2004
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REFERENCE CURRENT GENERATOR, AND METHOD OF PROGRAMMING, ADJUSTING AND/OR OPERATING SAME
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09/06/2005
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10841036
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05/06/2004
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10/21/2004
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INTEGRATED CIRCUIT PACKAGES, BALL-GRID ARRAY INTEGRATED CIRCUIT PACKAGES AND METHODS OF PACKAGING AN INTEGRATED CIRCUIT
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11/14/2006
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10841708
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05/06/2004
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11/10/2005
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07/04/2006
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10841848
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05/07/2004
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11/10/2005
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LOW SUPPLY VOLTAGE BIAS CIRCUIT, SEMICONDUCTOR DEVICE, WAFER AND SYSTEM INCLUDING SAME, AND METHOD OF GENERATING A BIAS REFERENCE
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10/16/2007
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05/07/2004
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11/10/2005
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10/15/2013
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10842363
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05/10/2004
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10/21/2004
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Title:
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Inline monitoring of pad loading for CuCMP and developing an endpoint technique for cleaning
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Patent #:
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Issue Dt:
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05/15/2007
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Application #:
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10843161
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Filing Dt:
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05/11/2004
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Publication #:
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Pub Dt:
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10/21/2004
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Title:
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ROM EMBEDDED DRAM WITH ANTI-FUSE PROGRAMMING
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Patent #:
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Issue Dt:
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11/14/2006
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Application #:
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10844714
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Filing Dt:
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05/12/2004
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Publication #:
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Pub Dt:
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10/21/2004
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Title:
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SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY
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Patent #:
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Issue Dt:
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06/21/2005
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Application #:
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10845983
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Filing Dt:
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05/14/2004
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Publication #:
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Pub Dt:
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10/28/2004
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Title:
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COUPLING SPACED BOND PADS TO A CONTACT
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Patent #:
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Issue Dt:
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04/03/2007
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Application #:
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10846070
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Filing Dt:
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05/14/2004
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Publication #:
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Pub Dt:
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10/28/2004
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Title:
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METHOD AND SYSTEM FOR SUBSTANTIALLY REGISTERLESS PROCESSING
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Patent #:
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Issue Dt:
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09/26/2006
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Application #:
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10846425
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Filing Dt:
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05/13/2004
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Publication #:
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Pub Dt:
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11/25/2004
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Title:
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METHOD OF ATOMIC LAYER DEPOSITION ON PLURAL SEMICONDUCTOR SUBSTRATES SIMULTANEOUSLY
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Patent #:
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Issue Dt:
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10/20/2009
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Application #:
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10846513
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Filing Dt:
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05/17/2004
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Publication #:
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Pub Dt:
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11/17/2005
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Title:
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REAL-TIME EXPOSURE CONTROL FOR AUTOMATIC LIGHT CONTROL
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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10847840
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Filing Dt:
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05/18/2004
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Publication #:
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Pub Dt:
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11/24/2005
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Title:
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BALLISTIC INJECTION NROM FLASH MEMORY
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Patent #:
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Issue Dt:
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10/03/2006
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Application #:
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10848247
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Filing Dt:
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05/17/2004
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Publication #:
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Pub Dt:
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11/17/2005
| | | | |
Title:
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METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
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Patent #:
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Issue Dt:
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09/02/2008
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Application #:
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10848261
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Filing Dt:
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05/18/2004
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Publication #:
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Pub Dt:
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11/24/2005
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Title:
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DLL PHASE DETECTION USING ADVANCED PHASE EQUALIZATION
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Patent #:
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Issue Dt:
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05/22/2007
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Application #:
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10848606
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Filing Dt:
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05/17/2004
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Publication #:
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Pub Dt:
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11/17/2005
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Title:
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SYSTEM AND METHOD FOR COMMUNICATING THE SYNCHRONIZATION STATUS OF MEMORY MODULES DURING INITIALIZATION OF THE MEMORY MODULES
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Patent #:
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Issue Dt:
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02/13/2007
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Application #:
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10850168
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Filing Dt:
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05/19/2004
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Publication #:
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Pub Dt:
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10/28/2004
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Title:
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CONDUCTIVE CONNECTION FORMING METHODS, OXIDATION REDUCING METHODS, AND INTEGRATED CIRCUITS FORMED THEREBY
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Patent #:
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Issue Dt:
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12/04/2007
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Application #:
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10850834
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Filing Dt:
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05/21/2004
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Publication #:
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Pub Dt:
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12/30/2004
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Title:
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ANALYSIS OF THE QUALITY OF CONTACTS AND VIAS IN MULTI-METAL FABRICATION PROCESSES OF SEMICONDUCTOR DEVICES, METHOD AND TEST CHIP ARCHITECTURE
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Patent #:
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Issue Dt:
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09/27/2005
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Application #:
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10852312
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Filing Dt:
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05/24/2004
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Publication #:
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Pub Dt:
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12/09/2004
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Title:
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POLYSILICON STRUCTURE IN A STACKED GATE REGION OF A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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05/29/2007
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Application #:
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10852315
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Filing Dt:
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05/24/2004
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Publication #:
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Pub Dt:
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10/28/2004
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Title:
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A PLURALITY OF SEMICONDUCTOR DIE IN AN ASSEMBLY
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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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10852316
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Filing Dt:
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05/24/2004
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Publication #:
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Pub Dt:
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10/28/2004
| | | | |
Title:
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STACKED SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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02/27/2007
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Application #:
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10852318
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Filing Dt:
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05/24/2004
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Publication #:
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Pub Dt:
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10/28/2004
| | | | |
Title:
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METHOD OF FORMING SOCKET CONTACTS
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Patent #:
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Issue Dt:
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07/01/2008
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Application #:
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10852784
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Filing Dt:
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05/24/2004
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Publication #:
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Pub Dt:
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10/28/2004
| | | | |
Title:
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DEPOSITION METHODS FOR IMPROVED DELIVERY OF METASTABLE SPECIES
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Patent #:
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Issue Dt:
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05/31/2005
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Application #:
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10852899
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Filing Dt:
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05/25/2004
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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WORD LINE DRIVER FOR NEGATIVE VOLTAGE
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Patent #:
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Issue Dt:
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04/07/2009
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Application #:
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10853319
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Filing Dt:
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05/25/2004
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Publication #:
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Pub Dt:
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12/01/2005
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Title:
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ON-DIE TERMINATION SNOOPING FOR 2T APPLICATIONS IN A MEMORY SYSTEM IMPLEMENTING NON-SELF-TERMINATING ODT SCHEMES
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Patent #:
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Issue Dt:
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03/13/2007
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Application #:
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10853377
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Filing Dt:
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05/25/2004
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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ELIMINATION OF RDL USING TAPE BASE FLIP CHIP ON FLEX FOR DIE STACKING
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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10853538
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Filing Dt:
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05/25/2004
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Publication #:
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Pub Dt:
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11/04/2004
| | | | |
Title:
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CASCODE I/O DRIVER WITH IMPROVED ESD OPERATION
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Patent #:
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Issue Dt:
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03/11/2008
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Application #:
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10853941
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Filing Dt:
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05/25/2004
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Publication #:
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Pub Dt:
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08/16/2007
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Title:
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METHODS OF FORMING METAL-CONTAINING FILMS OVER SURFACES OF SEMICONDUCTOR SUBSTRATES
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Patent #:
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Issue Dt:
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05/22/2007
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Application #:
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10854396
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Filing Dt:
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05/26/2004
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Publication #:
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Pub Dt:
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12/15/2005
| | | | |
Title:
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BALLISTIC DIRECT INJECTION FLASH MEMORY CELL ON STRAINED SILICON STRUCTURES
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Patent #:
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Issue Dt:
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11/28/2006
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Application #:
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10854397
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Filing Dt:
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05/26/2004
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Publication #:
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Pub Dt:
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06/23/2005
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Title:
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CHIP PROTECTION REGISTER LOCK CIRCUIT IN A FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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07/15/2014
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Application #:
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10854552
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Filing Dt:
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05/26/2004
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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STRUCTURES AND METHODS TO ENHANCE COPPER METALLIZATION
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Patent #:
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Issue Dt:
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05/09/2006
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Application #:
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10854686
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Filing Dt:
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05/26/2004
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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SEMICONDUCTOR MEMORY WITH WORDLINE TIMING
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Patent #:
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Issue Dt:
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11/03/2009
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Application #:
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10854775
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Filing Dt:
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05/26/2004
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Publication #:
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Pub Dt:
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08/18/2005
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Title:
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LOW POWER COMPARATOR
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Patent #:
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Issue Dt:
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01/12/2010
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Application #:
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10854891
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Filing Dt:
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05/27/2004
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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SELF-ALIGNED, INTEGRATED CIRCUIT CONTACT
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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10855429
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Filing Dt:
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05/26/2004
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Publication #:
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Pub Dt:
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12/15/2005
| | | | |
Title:
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METHODS FOR FORMING SEMICONDUCTOR STRUCTURES
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Patent #:
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Issue Dt:
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09/26/2006
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10855844
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Filing Dt:
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05/27/2004
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Publication #:
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Pub Dt:
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12/01/2005
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Title:
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SOURCE LINES FOR NAND MEMORY DEVICES
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Patent #:
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Issue Dt:
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05/01/2007
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10856356
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Filing Dt:
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05/28/2004
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Publication #:
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Pub Dt:
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12/30/2004
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Title:
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PROTECTIVE LAYERS FOR MRAM DEVICES
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Patent #:
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Issue Dt:
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04/22/2008
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10857467
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Filing Dt:
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05/28/2004
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Pub Dt:
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12/01/2005
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Title:
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METHOD AND SYSTEM FOR TERMINATING WRITE COMMANDS IN A HUB-BASED MEMORY SYSTEM
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Issue Dt:
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10/23/2007
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10857876
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06/02/2004
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Publication #:
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Pub Dt:
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12/08/2005
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Title:
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RAISED PHOTODIODE SENSOR TO INCREASE FILL FACTOR AND QUANTUM EFFICIENCY IN SCALED PIXELS
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Issue Dt:
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10/09/2007
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10857948
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06/02/2004
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Publication #:
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Pub Dt:
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12/08/2005
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Title:
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APPARATUS AND METHOD FOR MANUFACTURING POSITIVE OR NEGATIVE MICROLENSES
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10/04/2005
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10859016
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06/01/2004
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Pub Dt:
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11/11/2004
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Title:
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GLOBAL COLUMN SELECT STRUCTURE FOR ACCESSING A MEMORY
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Issue Dt:
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08/22/2006
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10859814
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Filing Dt:
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06/03/2004
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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SYSTEM AND DEVICE INCLUDING A BARRIER LAYER
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Patent #:
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Issue Dt:
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04/20/2010
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10859883
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Filing Dt:
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06/02/2004
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Publication #:
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Pub Dt:
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12/08/2005
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Title:
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REACTORS, SYSTEMS AND METHODS FOR DEPOSITING THIN FILMS ONTO MICROFEATURE WORKPIECES
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Patent #:
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Issue Dt:
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05/02/2006
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Application #:
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10860013
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Filing Dt:
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06/04/2004
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Publication #:
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Pub Dt:
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11/04/2004
| | | | |
Title:
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PROGRAMMABLE CACHE SYSTEM
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Patent #:
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Issue Dt:
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12/12/2006
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Application #:
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10860699
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Filing Dt:
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06/02/2004
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Publication #:
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Pub Dt:
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12/08/2005
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Title:
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SYSTEMS AND METHODS FOR TESTING MICROELECTRONIC IMAGERS AND MICROFEATURE DEVICES
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Patent #:
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Issue Dt:
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09/19/2006
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Application #:
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10860939
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Filing Dt:
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06/03/2004
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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METHOD OF PROVIDING A STRUCTURE USING SELF-ALIGNED FEATURES
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Patent #:
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Issue Dt:
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01/04/2005
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Application #:
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10861074
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Filing Dt:
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06/04/2004
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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METHOD AND APPARATUS FOR MEMORY CONTROL CIRCUIT
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Patent #:
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Issue Dt:
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04/14/2009
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10861145
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06/04/2004
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Publication #:
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Pub Dt:
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12/29/2005
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Title:
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SYSTEM AND METHOD FOR AN ASYNCHRONOUS DATA BUFFER HAVING BUFFER WRITE AND READ POINTERS
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