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Reel/Frame:051028/0001   Pages: 834
Recorded: 11/12/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 16529
Page 47 of 166
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1
Patent #:
7310748
Issue Dt:
12/18/2007
Application #:
10861163
Filing Dt:
06/04/2004
Publication #:
US20050283681
Pub Dt:
12/22/2005
Title:
MEMORY HUB TESTER INTERFACE AND METHOD FOR USE THEREOF
2
Patent #:
6889289
Issue Dt:
05/03/2005
Application #:
10861499
Filing Dt:
06/07/2004
Publication #:
US20040222997
Pub Dt:
11/11/2004
Title:
METHOD OF DISTRIBUTED CACHING
3
Patent #:
7535759
Issue Dt:
05/19/2009
Application #:
10861645
Filing Dt:
06/04/2004
Publication #:
US20050273548
Pub Dt:
12/08/2005
Title:
MEMORY SYSTEM WITH USER CONFIGURABLE DENSITY/PERFORMANCE OPTION
4
Patent #:
8082382
Issue Dt:
12/20/2011
Application #:
10861646
Filing Dt:
06/04/2004
Publication #:
US20050273549
Pub Dt:
12/08/2005
Title:
MEMORY DEVICE WITH USER CONFIGURABLE DENSITY/PERFORMANCE
5
Patent #:
7161203
Issue Dt:
01/09/2007
Application #:
10861744
Filing Dt:
06/04/2004
Publication #:
US20050269648
Pub Dt:
12/08/2005
Title:
GATED FIELD EFFECT DEVICE COMPRISING GATE DIELECTRIC HAVING DIFFERENT K REGIONS
6
Patent #:
7181837
Issue Dt:
02/27/2007
Application #:
10861847
Filing Dt:
06/04/2004
Publication #:
US20050269130
Pub Dt:
12/08/2005
Title:
PLATING BUSS AND A METHOD OF USE THEREOF
7
Patent #:
7109576
Issue Dt:
09/19/2006
Application #:
10862102
Filing Dt:
06/04/2004
Publication #:
US20040227240
Pub Dt:
11/18/2004
Title:
SEMICONDUCTOR COMPONENT HAVING ENCAPSULATED DIE STACK
8
Patent #:
7149876
Issue Dt:
12/12/2006
Application #:
10863202
Filing Dt:
06/09/2004
Publication #:
US20040250047
Pub Dt:
12/09/2004
Title:
METHOD AND APPARATUS FOR A SHIFT REGISTER BASED INTERCONNECTION FOR A MASSIVELY PARALLEL PROCESSOR ARRAY
9
Patent #:
6969882
Issue Dt:
11/29/2005
Application #:
10863203
Filing Dt:
06/09/2004
Publication #:
US20040262657
Pub Dt:
12/30/2004
Title:
INTERCONNECT LINE SELECTIVELY ISOLATED FROM AN UNDERLYING CONTACT PLUG
10
Patent #:
7274095
Issue Dt:
09/25/2007
Application #:
10863447
Filing Dt:
06/08/2004
Publication #:
US20040217459
Pub Dt:
11/04/2004
Title:
INTERPOSERS WITH RECEPTACLES FOR RECEIVING SEMICONDUCTOR DEVICES AND ASSEMBLIES AND PACKAGES INCLUDING SUCH INTERPOSERS
11
Patent #:
7441268
Issue Dt:
10/21/2008
Application #:
10863661
Filing Dt:
06/08/2004
Publication #:
US20050270983
Pub Dt:
12/08/2005
Title:
METHOD AND APPARATUS TO MANAGE EXCEPTIONS IN NETWORK PROCESSORS
12
Patent #:
7205620
Issue Dt:
04/17/2007
Application #:
10863953
Filing Dt:
06/09/2004
Publication #:
US20040222476
Pub Dt:
11/11/2004
Title:
HIGHLY RELIABLE AMORPHOUS HIGH-K GATE DIELECTRIC ZROXNY
13
Patent #:
7498647
Issue Dt:
03/03/2009
Application #:
10864974
Filing Dt:
06/10/2004
Publication #:
US20050275049
Pub Dt:
12/15/2005
Title:
PACKAGED MICROELECTRONIC IMAGERS AND METHODS OF PACKAGING MICROELECTRONIC IMAGERS
14
Patent #:
7327620
Issue Dt:
02/05/2008
Application #:
10865218
Filing Dt:
06/10/2004
Publication #:
US20050276145
Pub Dt:
12/15/2005
Title:
DIFFERENTIAL INPUT BUFFER FOR RECEIVING SIGNALS RELEVANT TO LOW POWER
15
Patent #:
7550816
Issue Dt:
06/23/2009
Application #:
10866290
Filing Dt:
06/11/2004
Publication #:
US20040235263
Pub Dt:
11/25/2004
Title:
FILLED TRENCH ISOLATION STRUCTURE
16
Patent #:
7253089
Issue Dt:
08/07/2007
Application #:
10867023
Filing Dt:
06/14/2004
Publication #:
US20050277279
Pub Dt:
12/15/2005
Title:
MICROFEATURE DEVICES AND METHODS FOR MANUFACTURING MICROFEATURE DEVICES
17
Patent #:
7253022
Issue Dt:
08/07/2007
Application #:
10867530
Filing Dt:
06/14/2004
Publication #:
US20040232564
Pub Dt:
11/25/2004
Title:
METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE WITH MULTI-LAYER METAL BUMPS
18
Patent #:
7215580
Issue Dt:
05/08/2007
Application #:
10867800
Filing Dt:
06/14/2004
Publication #:
US20050018527
Pub Dt:
01/27/2005
Title:
NON-VOLATILE MEMORY CONTROL
19
Patent #:
6934187
Issue Dt:
08/23/2005
Application #:
10868306
Filing Dt:
06/15/2004
Publication #:
US20040228189
Pub Dt:
11/18/2004
Title:
PROGRAMMABLE SOFT-START CONTROL FOR CHARGE PUMP
20
Patent #:
7390690
Issue Dt:
06/24/2008
Application #:
10869868
Filing Dt:
06/18/2004
Publication #:
US20040222481
Pub Dt:
11/11/2004
Title:
IMAGER LIGHT SHIELD
21
Patent #:
6973006
Issue Dt:
12/06/2005
Application #:
10870130
Filing Dt:
06/16/2004
Publication #:
US20040264282
Pub Dt:
12/30/2004
Title:
PREDECODE COLUMN ARCHITECTURE AND METHOD
22
Patent #:
7649145
Issue Dt:
01/19/2010
Application #:
10871153
Filing Dt:
06/18/2004
Publication #:
US20050279530
Pub Dt:
12/22/2005
Title:
COMPLIANT SPRING CONTACT STRUCTURES
23
Patent #:
7943505
Issue Dt:
05/17/2011
Application #:
10871242
Filing Dt:
06/18/2004
Publication #:
US20040229455
Pub Dt:
11/18/2004
Title:
ADVANCED VLSI METALLIZATION
24
Patent #:
6934188
Issue Dt:
08/23/2005
Application #:
10871919
Filing Dt:
06/18/2004
Publication #:
US20040228201
Pub Dt:
11/18/2004
Title:
NON-VOLATILE MEMORY ERASE CIRCUITRY
25
Patent #:
7259067
Issue Dt:
08/21/2007
Application #:
10872725
Filing Dt:
06/21/2004
Publication #:
US20050095784
Pub Dt:
05/05/2005
Title:
METHOD FOR MANUFACTURING FLASH MEMORY DEVICE
26
Patent #:
7286378
Issue Dt:
10/23/2007
Application #:
10873112
Filing Dt:
06/23/2004
Publication #:
US20050105329
Pub Dt:
05/19/2005
Title:
SERIAL TRANSISTOR-CELL ARRAY ARCHITECTURE
27
Patent #:
7282409
Issue Dt:
10/16/2007
Application #:
10873226
Filing Dt:
06/23/2004
Publication #:
US20050287739
Pub Dt:
12/29/2005
Title:
ISOLATION STRUCTURE FOR A MEMORY CELL USING AL2O3 DIELECTRIC
28
Patent #:
7115504
Issue Dt:
10/03/2006
Application #:
10873230
Filing Dt:
06/23/2004
Publication #:
US20040238958
Pub Dt:
12/02/2004
Title:
METHOD OF FORMING ELECTRODE STRUCTURE FOR USE IN AN INTEGRATED CIRCUIT
29
Patent #:
7115992
Issue Dt:
10/03/2006
Application #:
10873231
Filing Dt:
06/23/2004
Publication #:
US20040229423
Pub Dt:
11/18/2004
Title:
ELECTRODE STRUCTURE FOR USE IN AN INTEGRATED CIRCUIT
30
Patent #:
6919756
Issue Dt:
07/19/2005
Application #:
10873512
Filing Dt:
06/21/2004
Publication #:
US20040236895
Pub Dt:
11/25/2004
Title:
METHOD AND CIRCUIT FOR ADJUSTING A VOLTAGE UPON DETECTION OF A COMMAND APPLIED TO AN INTEGRATED CIRCUIT
31
Patent #:
7326316
Issue Dt:
02/05/2008
Application #:
10873552
Filing Dt:
06/22/2004
Publication #:
US20040229032
Pub Dt:
11/18/2004
Title:
ELECTRICAL INTERCONNECT USING LOCALLY CONDUCTIVE ADHESIVE
32
Patent #:
7239152
Issue Dt:
07/03/2007
Application #:
10873692
Filing Dt:
06/22/2004
Publication #:
US20040231887
Pub Dt:
11/25/2004
Title:
METHODS FOR MEASURING PARASITIC CAPACITANCE AND INDUCTANCE OF I/O LEADS ON AN ELECTRICAL COMPONENT USING A NETWORK ANALYZER
33
Patent #:
7154175
Issue Dt:
12/26/2006
Application #:
10873817
Filing Dt:
06/21/2004
Publication #:
US20050280138
Pub Dt:
12/22/2005
Title:
GROUND PLANE FOR INTEGRATED CIRCUIT PACKAGE
34
Patent #:
7167400
Issue Dt:
01/23/2007
Application #:
10873968
Filing Dt:
06/22/2004
Publication #:
US20050281099
Pub Dt:
12/22/2005
Title:
APPARATUS AND METHOD FOR IMPROVING DYNAMIC REFRESH IN A MEMORY DEVICE
35
Patent #:
7332401
Issue Dt:
02/19/2008
Application #:
10874226
Filing Dt:
06/24/2004
Publication #:
US20040232551
Pub Dt:
11/25/2004
Title:
METHOD OF FABRICATING AN ELECTRODE STRUCTURE FOR USE IN AN INTEGRATED CIRCUIT
36
Patent #:
6949827
Issue Dt:
09/27/2005
Application #:
10874369
Filing Dt:
06/24/2004
Publication #:
US20040229421
Pub Dt:
11/18/2004
Title:
SEMICONDUCTOR DEVICE WITH NOVEL FILM COMPOSITION
37
Patent #:
7072235
Issue Dt:
07/04/2006
Application #:
10874995
Filing Dt:
06/23/2004
Publication #:
US20040228195
Pub Dt:
11/18/2004
Title:
BIAS SENSING IN DRAM SENSE AMPLIFIERS THROUGH COUPLING AND DECOUPLING DEVICE
38
Patent #:
7249230
Issue Dt:
07/24/2007
Application #:
10874998
Filing Dt:
06/23/2004
Publication #:
US20050289305
Pub Dt:
12/29/2005
Title:
QUEUE STRUCTURE WITH VALIDITY VECTOR AND ORDER ARRAY
39
Patent #:
6884475
Issue Dt:
04/26/2005
Application #:
10875381
Filing Dt:
06/25/2004
Publication #:
US20040228968
Pub Dt:
11/18/2004
Title:
CHEMICAL VAPOR DEPOSITION METHOD FOR DEPOSITING A HIGH K DIELECTRIC FILM
40
Patent #:
7215572
Issue Dt:
05/08/2007
Application #:
10875452
Filing Dt:
06/24/2004
Publication #:
US20040233743
Pub Dt:
11/25/2004
Title:
METHODS FOR NEUTRALIZING HOLES IN TUNNEL OXIDES OF FLOATING-GATE MEMORY CELLS AND DEVICES
41
Patent #:
7046557
Issue Dt:
05/16/2006
Application #:
10875453
Filing Dt:
06/24/2004
Publication #:
US20040233762
Pub Dt:
11/25/2004
Title:
FLASH MEMORY
42
Patent #:
7179706
Issue Dt:
02/20/2007
Application #:
10875534
Filing Dt:
06/24/2004
Publication #:
US20050048734
Pub Dt:
03/03/2005
Title:
PERMEABLE CAPACITOR ELECTRODE
43
Patent #:
7099220
Issue Dt:
08/29/2006
Application #:
10876184
Filing Dt:
06/24/2004
Publication #:
US20040233751
Pub Dt:
11/25/2004
Title:
METHODS FOR ERASING FLASH MEMORY
44
Patent #:
7125784
Issue Dt:
10/24/2006
Application #:
10876333
Filing Dt:
06/24/2004
Publication #:
US20050130433
Pub Dt:
06/16/2005
Title:
METHOD OF FORMING ISOLATION FILM IN SEMICONDUCTOR DEVICE
45
Patent #:
6912147
Issue Dt:
06/28/2005
Application #:
10876664
Filing Dt:
06/28/2004
Publication #:
US20040233728
Pub Dt:
11/25/2004
Title:
CHALCOGENIDE GLASS CONSTANT CURRENT DEVICE, AND ITS METHOD OF FABRICATION AND OPERATION
46
Patent #:
7208198
Issue Dt:
04/24/2007
Application #:
10876703
Filing Dt:
06/28/2004
Publication #:
US20040241322
Pub Dt:
12/02/2004
Title:
CHEMICAL VAPOR DEPOSITION METHODS OF FORMING BARIUM STRONTIUM TITANATE COMPRISING DIELECTRIC LAYERS, INCLUDING SUCH LAYERS HAVING A VARIED CONCENTRATION OF BARIUM AND STRONTIUM WITHIN THE LAYER
47
Patent #:
7336536
Issue Dt:
02/26/2008
Application #:
10876878
Filing Dt:
06/25/2004
Publication #:
US20050286337
Pub Dt:
12/29/2005
Title:
HANDLING DEFECTIVE MEMORY BLOCKS OF NAND MEMORY DEVICES
48
Patent #:
7154785
Issue Dt:
12/26/2006
Application #:
10877394
Filing Dt:
06/25/2004
Publication #:
US20050286310
Pub Dt:
12/29/2005
Title:
CHARGE PUMP CIRCUITRY HAVING ADJUSTABLE CURRENT OUTPUTS
49
Patent #:
7161870
Issue Dt:
01/09/2007
Application #:
10877576
Filing Dt:
06/25/2004
Publication #:
US20050018524
Pub Dt:
01/27/2005
Title:
SYNCHRONOUS FLASH MEMORY COMMAND SEQUENCE
50
Patent #:
6944065
Issue Dt:
09/13/2005
Application #:
10877634
Filing Dt:
06/25/2004
Publication #:
US20040228192
Pub Dt:
11/18/2004
Title:
METHOD, APPARATUS, AND SYSTEM TO ENHANCE NEGATIVE VOLTAGE SWITCHING
51
Patent #:
7340668
Issue Dt:
03/04/2008
Application #:
10877720
Filing Dt:
06/25/2004
Publication #:
US20050289444
Pub Dt:
12/29/2005
Title:
LOW POWER COST-EFFECTIVE ECC MEMORY SYSTEM AND METHOD
52
Patent #:
6958926
Issue Dt:
10/25/2005
Application #:
10878056
Filing Dt:
06/29/2004
Publication #:
US20040235232
Pub Dt:
11/25/2004
Title:
CURRENT SWITCHING SENSOR DETECTOR
53
Patent #:
7034360
Issue Dt:
04/25/2006
Application #:
10878273
Filing Dt:
06/28/2004
Publication #:
US20050104123
Pub Dt:
05/19/2005
Title:
HIGH VOLTAGE TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
54
Patent #:
7264844
Issue Dt:
09/04/2007
Application #:
10878569
Filing Dt:
06/29/2004
Publication #:
US20040234815
Pub Dt:
11/25/2004
Title:
FORMING OXIDE BUFFER LAYER FOR IMPROVED MAGNETIC TUNNEL JUNCTIONS
55
Patent #:
7348236
Issue Dt:
03/25/2008
Application #:
10878799
Filing Dt:
06/28/2004
Publication #:
US20050285178
Pub Dt:
12/29/2005
Title:
FORMATION OF MEMORY CELLS AND SELECT GATES OF NAND MEMORY ARRAYS
56
Patent #:
7332408
Issue Dt:
02/19/2008
Application #:
10878805
Filing Dt:
06/28/2004
Publication #:
US20050285179
Pub Dt:
12/29/2005
Title:
ISOLATION TRENCHES FOR MEMORY DEVICES
57
Patent #:
7920185
Issue Dt:
04/05/2011
Application #:
10879170
Filing Dt:
06/30/2004
Publication #:
US20060012838
Pub Dt:
01/19/2006
Title:
SHIELDING BLACK REFERENCE PIXELS IN IMAGE SENSORS
58
Patent #:
7119031
Issue Dt:
10/10/2006
Application #:
10879367
Filing Dt:
06/28/2004
Publication #:
US20050287816
Pub Dt:
12/29/2005
Title:
METHODS OF FORMING PATTERNED PHOTORESIST LAYERS OVER SEMICONDUCTOR SUBSTRATES
59
Patent #:
7015743
Issue Dt:
03/21/2006
Application #:
10879434
Filing Dt:
06/29/2004
Publication #:
US20050073353
Pub Dt:
04/07/2005
Title:
CIRCUIT OF REDUNDANCY IO FUSE IN SEMICONDUCTOR DEVICE
60
Patent #:
7232754
Issue Dt:
06/19/2007
Application #:
10879838
Filing Dt:
06/29/2004
Publication #:
US20050287783
Pub Dt:
12/29/2005
Title:
MICROELECTRONIC DEVICES AND METHODS FOR FORMING INTERCONNECTS IN MICROELECTRONIC DEVICES
61
Patent #:
7898010
Issue Dt:
03/01/2011
Application #:
10880646
Filing Dt:
07/01/2004
Publication #:
US20060001059
Pub Dt:
01/05/2006
Title:
TRANSPARENT CONDUCTOR BASED PINNED PHOTODIODE
62
Patent #:
7359231
Issue Dt:
04/15/2008
Application #:
10880692
Filing Dt:
06/30/2004
Publication #:
US20060002172
Pub Dt:
01/05/2006
Title:
PROVIDING CURRENT FOR PHASE CHANGE MEMORIES
63
Patent #:
7326972
Issue Dt:
02/05/2008
Application #:
10880988
Filing Dt:
06/30/2004
Publication #:
US20060001103
Pub Dt:
01/05/2006
Title:
INTERCONNECT STRUCTURE IN INTEGRATED CIRCUITS
64
Patent #:
7124384
Issue Dt:
10/17/2006
Application #:
10881002
Filing Dt:
07/01/2004
Publication #:
US20050003624
Pub Dt:
01/06/2005
Title:
CAPACITOR LAYOUT TECHNIQUE FOR REDUCTION OF FIXED PATTERN NOISE IN A CMOS SENSOR
65
Patent #:
7208407
Issue Dt:
04/24/2007
Application #:
10881042
Filing Dt:
06/30/2004
Publication #:
US20060003588
Pub Dt:
01/05/2006
Title:
FLASH MEMORY CELLS WITH REDUCED DISTANCES BETWEEN CELL ELEMENTS
66
Patent #:
7274596
Issue Dt:
09/25/2007
Application #:
10881636
Filing Dt:
06/30/2004
Publication #:
US20060002190
Pub Dt:
01/05/2006
Title:
REDUCTION OF ADJACENT FLOATING GATE DATA PATTERN SENSITIVITY
67
Patent #:
7436020
Issue Dt:
10/14/2008
Application #:
10881662
Filing Dt:
06/30/2004
Publication #:
US20060003528
Pub Dt:
01/05/2006
Title:
FLASH MEMORY WITH METAL-INSULATOR-METAL TUNNELING PROGRAM AND ERASE
68
Patent #:
7323707
Issue Dt:
01/29/2008
Application #:
10881664
Filing Dt:
06/30/2004
Publication #:
US20060001016
Pub Dt:
01/05/2006
Title:
INITIALIZING PHASE CHANGE MEMORIES
69
Patent #:
7323424
Issue Dt:
01/29/2008
Application #:
10881874
Filing Dt:
06/29/2004
Publication #:
US20050285225
Pub Dt:
12/29/2005
Title:
SEMICONDUCTOR CONSTRUCTIONS COMPRISING CERIUM OXIDE AND TITANIUM OXIDE
70
Patent #:
7151285
Issue Dt:
12/19/2006
Application #:
10882563
Filing Dt:
06/30/2004
Publication #:
US20060001126
Pub Dt:
01/05/2006
Title:
Transistor structures and transistors with a germanium-containing channel
71
Patent #:
7057218
Issue Dt:
06/06/2006
Application #:
10882969
Filing Dt:
06/30/2004
Publication #:
US20040238916
Pub Dt:
12/02/2004
Title:
EDGE INTENSIVE ANTIFUSE
72
Patent #:
7235858
Issue Dt:
06/26/2007
Application #:
10882987
Filing Dt:
06/30/2004
Publication #:
US20040238917
Pub Dt:
12/02/2004
Title:
EDGE INTENSIVE ANTIFUSE AND METHOD FOR MAKING THE SAME
73
Patent #:
7521378
Issue Dt:
04/21/2009
Application #:
10883191
Filing Dt:
07/01/2004
Publication #:
US20060003596
Pub Dt:
01/05/2006
Title:
LOW TEMPERATURE PROCESS FOR POLYSILAZANE OXIDATION/DENSIFICATION
74
Patent #:
7473644
Issue Dt:
01/06/2009
Application #:
10883215
Filing Dt:
07/01/2004
Publication #:
US20060003182
Pub Dt:
01/05/2006
Title:
METHOD FOR FORMING CONTROLLED GEOMETRY HARDMASKS INCLUDING SUBRESOLUTION ELEMENTS
75
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7041555
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Title:
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Assignor
1
JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Exec Dt:
07/31/2019
Assignees
1
MICRON TECHNOLOGY, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
2
MICRON SEMICONDUCTOR PRODUCTS, INC.
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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