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Reel/Frame:	051028/0001			Pages:	834
		Recorded:	11/12/2019
Attorney Dkt #:	4816.244
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 16529
Page 53 of 166
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Patent #:	7015525	Issue Dt:	03/21/2006	Application #:	11037831	Filing Dt:	01/18/2005
Publication #:	US20050190617	Pub Dt:	09/01/2005
Title:	FOLDED BIT LINE DRAM WITH VERTICAL ULTRA THIN BODY TRANSISTORS

Patent #:	7282730	Issue Dt:	10/16/2007	Application #:	11037850	Filing Dt:	01/18/2005
Publication #:	US20060157689	Pub Dt:	07/20/2006
Title:	FORMING A CARBON LAYER BETWEEN PHASE CHANGE LAYERS OF A PHASE CHANGE MEMORY

Patent #:	6990021	Issue Dt:	01/24/2006	Application #:	11037915	Filing Dt:	01/18/2005
Publication #:	US20050122808	Pub Dt:	06/09/2005
Title:	LOW VOLTAGE SENSE AMPLIFIER FOR OPERATION UNDER A REDUCED BIT LINE BIAS VOLTAGE

Patent #:	7161225	Issue Dt:	01/09/2007	Application #:	11038336	Filing Dt:	01/19/2005
Publication #:	US20050136557	Pub Dt:	06/23/2005
Title:	REDUCING SHUNTS IN MEMORIES WITH PHASE-CHANGE MATERIAL

Patent #:	7283205	Issue Dt:	10/16/2007	Application #:	11038673	Filing Dt:	01/19/2005
Publication #:	US20060158633	Pub Dt:	07/20/2006
Title:	OPTIMIZED OPTICAL LITHOGRAPHY ILLUMINATION SOURCE FOR USE DURING THE MANUFACTURE OF A SEMICONDUCTOR DEVICE

Patent #:	7078326	Issue Dt:	07/18/2006	Application #:	11039564	Filing Dt:	01/19/2005
Publication #:	US20060157863	Pub Dt:	07/20/2006
Title:	NUCLEATION METHOD FOR ATOMIC LAYER DEPOSITION OF COBALT ON BARE SILICON DURING THE FORMATION OF A SEMICONDUCTOR DEVICE

Patent #:	7256068	Issue Dt:	08/14/2007	Application #:	11040574	Filing Dt:	01/20/2005
Publication #:	US20050130346	Pub Dt:	06/16/2005
Title:	SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR ELECTRICALLY ISOLATING MODULES

Patent #:	7176566	Issue Dt:	02/13/2007	Application #:	11040575	Filing Dt:	01/20/2005
Publication #:	US20050130347	Pub Dt:	06/16/2005
Title:	SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR ELECTRICALLY ISOLATING MODULES

Patent #:	7166918	Issue Dt:	01/23/2007	Application #:	11040576	Filing Dt:	01/20/2005
Publication #:	US20050130348	Pub Dt:	06/16/2005
Title:	SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR ELECTRICALLY ISOLATING MODULES

Patent #:	7541648	Issue Dt:	06/02/2009	Application #:	11040748	Filing Dt:	01/21/2005
Publication #:	US20060163660	Pub Dt:	07/27/2006
Title:	ELECTROSTATIC DISCHARGE (ESD) PROTECTION CIRCUIT

Patent #:	7414299	Issue Dt:	08/19/2008	Application #:	11041106	Filing Dt:	01/20/2005
Publication #:	US20050121754	Pub Dt:	06/09/2005
Title:	SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR ELECTRICALLY ISOLATING MODULES

Patent #:	7294545	Issue Dt:	11/13/2007	Application #:	11041357	Filing Dt:	01/24/2005
Publication #:	US20050124108	Pub Dt:	06/09/2005
Title:	SELECTIVE POLYSILICON STUD GROWTH

Patent #:	7332389	Issue Dt:	02/19/2008	Application #:	11041689	Filing Dt:	01/24/2005
Publication #:	US20050202630	Pub Dt:	09/15/2005
Title:	SELECTIVE POLYSILICON STUD GROWTH

Patent #:	7526095	Issue Dt:	04/28/2009	Application #:	11041800	Filing Dt:	01/24/2005
Publication #:	US20050125088	Pub Dt:	06/09/2005
Title:	AUDIO VOLUME CONTROL FOR COMPUTER SYSTEMS

Patent #:	7605028	Issue Dt:	10/20/2009	Application #:	11042207	Filing Dt:	01/26/2005
Publication #:	US20050128787	Pub Dt:	06/16/2005
Title:	METHOD OF FORMING A MEMORY DEVICE HAVING A STORAGE TRANSISTOR

Patent #:	7233725	Issue Dt:	06/19/2007	Application #:	11042537	Filing Dt:	01/25/2005
Publication #:	US20050145783	Pub Dt:	07/07/2005
Title:	1 X N FANOUT WAVEGUIDE PHOTODETECTOR

Patent #:	7900099	Issue Dt:	03/01/2011	Application #:	11043011	Filing Dt:	01/25/2005
Publication #:	US20060164894	Pub Dt:	07/27/2006
Title:	ENABLING TEST MODES OF INDIVIDUAL INTEGRATED CIRCUIT DEVICES OUT OF A PLURALITY OF INTEGRATED CIRCUIT DEVICES

Patent #:	7185173	Issue Dt:	02/27/2007	Application #:	11043018	Filing Dt:	01/24/2005
Publication #:	US20050201183	Pub Dt:	09/15/2005
Title:	COLUMN ADDRESS PATH CIRCUIT AND METHOD FOR MEMORY DEVICES HAVING A BURST ACCESS MODE

Patent #:	6967826	Issue Dt:	11/22/2005	Application #:	11043349	Filing Dt:	01/26/2005
Publication #:	US20050128665	Pub Dt:	06/16/2005
Title:	ELECTROSTATIC DISCHARGE PROTECTION WITH INPUT IMPEDANCE

Patent #:	7259064	Issue Dt:	08/21/2007	Application #:	11043741	Filing Dt:	01/26/2005
Publication #:	US20060166436	Pub Dt:	07/27/2006
Title:	FORMING INTEGRATED CIRCUIT DEVICES

Patent #:	7344942	Issue Dt:	03/18/2008	Application #:	11043838	Filing Dt:	01/26/2005
Publication #:	US20060166437	Pub Dt:	07/27/2006
Title:	ISOLATION REGIONS FOR SEMICONDUCTOR DEVICES AND THEIR FORMATION

Patent #:	7326607	Issue Dt:	02/05/2008	Application #:	11043998	Filing Dt:	01/28/2005
Publication #:	US20050161713	Pub Dt:	07/28/2005
Title:	IMAGER FLOATING DIFFUSION REGION AND PROCESS FOR FORMING SAME

Patent #:	7235494	Issue Dt:	06/26/2007	Application #:	11044094	Filing Dt:	01/27/2005
Publication #:	US20050199264	Pub Dt:	09/15/2005
Title:	CMP CLEANING COMPOSITION WITH MICROBIAL INHIBITOR

Patent #:	7348671	Issue Dt:	03/25/2008	Application #:	11044443	Filing Dt:	01/26/2005
Publication #:	US20060166498	Pub Dt:	07/27/2006
Title:	VIAS HAVING VARYING DIAMETERS AND FILLS FOR USE WITH A SEMICONDUCTOR DEVICE AND METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES INCLUDING SAME

Patent #:	7157771	Issue Dt:	01/02/2007	Application #:	11044682	Filing Dt:	01/27/2005
Publication #:	US20050167743	Pub Dt:	08/04/2005
Title:	VERTICAL DEVICE 4F2 EEPROM MEMORY

Patent #:	7166888	Issue Dt:	01/23/2007	Application #:	11044703	Filing Dt:	01/27/2005
Publication #:	US20060163644	Pub Dt:	07/27/2006
Title:	SCALABLE HIGH DENSITY NON-VOLATILE MEMORY CELLS IN A CONTACTLESS MEMORY ARRAY

Patent #:	7215173	Issue Dt:	05/08/2007	Application #:	11047442	Filing Dt:	01/31/2005
Publication #:	US20060170481	Pub Dt:	08/03/2006
Title:	LOW-SWING LEVEL SHIFTER

Patent #:	7259079	Issue Dt:	08/21/2007	Application #:	11047476	Filing Dt:	01/31/2005
Publication #:	US20050158965	Pub Dt:	07/21/2005
Title:	METHODS FOR FILLING HIGH ASPECT RATIO TRENCHES IN SEMICONDUCTOR LAYERS

Patent #:	7088619	Issue Dt:	08/08/2006	Application #:	11047809	Filing Dt:	02/01/2005
Publication #:	US20050141278	Pub Dt:	06/30/2005
Title:	METHOD FOR PROGRAMMING AND ERASING AN NROM CELL

Patent #:	7329899	Issue Dt:	02/12/2008	Application #:	11048227	Filing Dt:	02/01/2005
Publication #:	US20050146013	Pub Dt:	07/07/2005
Title:	WAFER-LEVEL REDISTRIBUTION CIRCUIT

Patent #:	7170807	Issue Dt:	01/30/2007	Application #:	11048387	Filing Dt:	02/01/2005
Publication #:	US20050128851	Pub Dt:	06/16/2005
Title:	DATA STORAGE DEVICE AND REFRESHING METHOD FOR USE WITH SUCH DEVICE

Patent #:	7326973	Issue Dt:	02/05/2008	Application #:	11049435	Filing Dt:	02/01/2005
Publication #:	US20050127506	Pub Dt:	06/16/2005
Title:	METHOD AND AN APPARATUS FOR A HARD-CODED BIT VALUE CHANGEABLE IN ANY LAYER OF METAL

Patent #:	7307295	Issue Dt:	12/11/2007	Application #:	11049524	Filing Dt:	02/01/2005
Publication #:	US20050130363	Pub Dt:	06/16/2005
Title:	METHOD AND AN APPARATUS FOR A HARD-CODED BIT VALUE CHANGEABLE IN ANY LAYER OF METAL

Patent #:	7314822	Issue Dt:	01/01/2008	Application #:	11050057	Filing Dt:	02/03/2005
Publication #:	US20050130403	Pub Dt:	06/16/2005
Title:	METHOD OF FABRICATING STACKED LOCAL INTERCONNECT STRUCTURE

Patent #:	7271053	Issue Dt:	09/18/2007	Application #:	11050088	Filing Dt:	02/03/2005
Publication #:	US20050145918	Pub Dt:	07/07/2005
Title:	METHODS OF FORMING CAPACITORS AND ELECTRONIC DEVICES

Patent #:	7326611	Issue Dt:	02/05/2008	Application #:	11051119	Filing Dt:	02/03/2005
Publication #:	US20060172483	Pub Dt:	08/03/2006
Title:	DRAM ARRAYS, VERTICAL TRANSISTOR STRUCTURES AND METHODS OF FORMING TRANSISTOR STRUCTURES AND DRAM ARRAYS

Patent #:	7382060	Issue Dt:	06/03/2008	Application #:	11052279	Filing Dt:	02/07/2005
Publication #:	US20050200028	Pub Dt:	09/15/2005
Title:	SEMICONDUCTOR COMPONENT HAVING THINNED DIE, POLYMER LAYERS, CONTACTS ON OPPOSING SIDES, AND CONDUCTIVE VIAS CONNECTING THE CONTACTS

Patent #:	7221059	Issue Dt:	05/22/2007	Application #:	11052378	Filing Dt:	02/07/2005
Publication #:	US20050181540	Pub Dt:	08/18/2005
Title:	WAFER LEVEL SEMICONDUCTOR COMPONENT HAVING THINNED, ENCAPSULATED DICE AND POLYMER DAM

Patent #:	7199464	Issue Dt:	04/03/2007	Application #:	11053351	Filing Dt:	02/08/2005
Publication #:	US20050156328	Pub Dt:	07/21/2005
Title:	SEMICONDUCTOR DEVICE STRUCTURES INCLUDING PROTECTIVE LAYERS FORMED FROM HEALABLE MATERIALS

Patent #:	7508648	Issue Dt:	03/24/2009	Application #:	11053577	Filing Dt:	02/08/2005
Publication #:	US20060176645	Pub Dt:	08/10/2006
Title:	ATOMIC LAYER DEPOSITION OF DY DOPED HFO2 FILMS AS GATE DIELECTRICS

Patent #:	7091584	Issue Dt:	08/15/2006	Application #:	11053671	Filing Dt:	02/07/2005
Publication #:	US20050178001	Pub Dt:	08/18/2005
Title:	SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR ELECTRICALLY ISOLATING MODULES

Patent #:	7189611	Issue Dt:	03/13/2007	Application #:	11053798	Filing Dt:	02/09/2005
Publication #:	US20050158991	Pub Dt:	07/21/2005
Title:	METAL PLATING USING SEED FILM

Patent #:	8278751	Issue Dt:	10/02/2012	Application #:	11053984	Filing Dt:	02/08/2005
Publication #:	US20060177970	Pub Dt:	08/10/2006
Title:	METHODS OF ADHERING MICROFEATURE WORKPIECES, INCLUDING A CHIP, TO A SUPPORT MEMBER

Patent #:	7262132	Issue Dt:	08/28/2007	Application #:	11054018	Filing Dt:	02/09/2005
Publication #:	US20050170645	Pub Dt:	08/04/2005
Title:	METAL PLATING USING SEED FILM

Patent #:	7190629	Issue Dt:	03/13/2007	Application #:	11054645	Filing Dt:	02/08/2005
Publication #:	US20060176750	Pub Dt:	08/10/2006
Title:	CIRCUIT AND METHOD FOR READING AN ANTIFUSE

Patent #:	7130226	Issue Dt:	10/31/2006	Application #:	11054885	Filing Dt:	02/09/2005
Publication #:	US20060176761	Pub Dt:	08/10/2006
Title:	CLOCK GENERATING CIRCUIT WITH MULTIPLE MODES OF OPERATION

Patent #:	7374964	Issue Dt:	05/20/2008	Application #:	11055380	Filing Dt:	02/10/2005
Publication #:	US20060177975	Pub Dt:	08/10/2006
Title:	ATOMIC LAYER DEPOSITION OF CEO2/AL2O3 FILMS AS GATE DIELECTRICS

Patent #:	7259581	Issue Dt:	08/21/2007	Application #:	11057500	Filing Dt:	02/14/2005
Publication #:	US20060181298	Pub Dt:	08/17/2006
Title:	METHOD FOR TESTING SEMICONDUCTOR COMPONENTS

Patent #:	7072923	Issue Dt:	07/04/2006	Application #:	11057596	Filing Dt:	02/15/2005
Publication #:	US20050149591	Pub Dt:	07/07/2005
Title:	METHOD AND APPARATUS FOR GENERATING DETERMINISTIC, NON-REPEATING, PSEUDO-RANDOM ADDRESSES

Patent #:	7154778	Issue Dt:	12/26/2006	Application #:	11057634	Filing Dt:	02/14/2005
Publication #:	US20050199947	Pub Dt:	09/15/2005
Title:	NANOCRYSTAL WRITE ONCE READ ONLY MEMORY FOR ARCHIVAL STORAGE

Patent #:	7183191	Issue Dt:	02/27/2007	Application #:	11057921	Filing Dt:	02/15/2005
Publication #:	US20050164429	Pub Dt:	07/28/2005
Title:	METHOD FOR FABRICATING A CHIP SCALE PACKAGE USING WAFER LEVEL PROCESSING

Patent #:	7327034	Issue Dt:	02/05/2008	Application #:	11058140	Filing Dt:	02/15/2005
Publication #:	US20050148182	Pub Dt:	07/07/2005
Title:	COMPOSITIONS FOR PLANARIZATION OF METAL-CONTAINING SURFACES USING HALOGENS AND HALIDE SALTS

Patent #:	7399666	Issue Dt:	07/15/2008	Application #:	11058563	Filing Dt:	02/15/2005
Publication #:	US20060183272	Pub Dt:	08/17/2006
Title:	ATOMIC LAYER DEPOSITION OF ZR3N4/ZRO2 FILMS AS GATE DIELECTRICS

Patent #:	7099180	Issue Dt:	08/29/2006	Application #:	11058797	Filing Dt:	02/15/2005
Publication #:	US20060181922	Pub Dt:	08/17/2006
Title:	PHASE CHANGE MEMORY BITS RESET THROUGH A SERIES OF PULSES OF INCREASING AMPLITUDE

Patent #:	7400124	Issue Dt:	07/15/2008	Application #:	11059093	Filing Dt:	02/15/2005
Publication #:	US20060181254	Pub Dt:	08/17/2006
Title:	APPARATUS AND METHODS FOR REGULATED VOLTAGE

Patent #:	7126317	Issue Dt:	10/24/2006	Application #:	11059135	Filing Dt:	02/15/2005
Publication #:	US20050275390	Pub Dt:	12/15/2005
Title:	APPARATUS AND METHODS FOR REGULATED VOLTAGE

Patent #:	7200052	Issue Dt:	04/03/2007	Application #:	11059136	Filing Dt:	02/15/2005
Publication #:	US20060181936	Pub Dt:	08/17/2006
Title:	APPARATUS AND METHODS FOR REGULATED VOLTAGE

Patent #:	7192820	Issue Dt:	03/20/2007	Application #:	11059294	Filing Dt:	02/16/2005
Publication #:	US20050185446	Pub Dt:	08/25/2005
Title:	METHOD FOR REDUCING NON-UNIFORMITY OR TOPOGRAPHY VARIATION BETWEEN AN ARRAY AND CIRCUITRY IN A PROCESS FOR MANUFACTURING SEMICONDUCTOR INTEGRATED NON-VOLATILE MEMORY DEVICES

Patent #:	7229905	Issue Dt:	06/12/2007	Application #:	11059593	Filing Dt:	02/16/2005
Publication #:	US20050148116	Pub Dt:	07/07/2005
Title:	ALIGNMENT AND ORIENTATION FEATURES FOR A SEMICONDUCTOR PACKAGE

Patent #:	7489002	Issue Dt:	02/10/2009	Application #:	11059723	Filing Dt:	02/16/2005
Publication #:	US20050145911	Pub Dt:	07/07/2005
Title:	MEMORY HAVING A VERTICAL TRANSISTOR

Patent #:	7217634	Issue Dt:	05/15/2007	Application #:	11059770	Filing Dt:	02/17/2005
Publication #:	US20060183294	Pub Dt:	08/17/2006
Title:	METHODS OF FORMING INTEGRATED CIRCUITRY

Patent #:	6980461	Issue Dt:	12/27/2005	Application #:	11061069	Filing Dt:	02/18/2005
Publication #:	US20050162931	Pub Dt:	07/28/2005
Title:	REFERENCE CURRENT GENERATOR, AND METHOD OF PROGRAMMING, ADJUSTING AND/OR OPERATING SAME

Patent #:	7289347	Issue Dt:	10/30/2007	Application #:	11062075	Filing Dt:	02/18/2005
Publication #:	US20050146946	Pub Dt:	07/07/2005
Title:	SYSTEM AND METHOD FOR OPTICALLY INTERCONNECTING MEMORY DEVICES

Patent #:	7317200	Issue Dt:	01/08/2008	Application #:	11062436	Filing Dt:	02/23/2005
Publication #:	US20060186394	Pub Dt:	08/24/2006
Title:	SNSE-BASED LIMITED REPROGRAMMABLE CELL

Patent #:	7120054	Issue Dt:	10/10/2006	Application #:	11062661	Filing Dt:	02/22/2005
Publication #:	US20050141282	Pub Dt:	06/30/2005
Title:	PRECONDITIONING GLOBAL BITLINES

Patent #:	7325089	Issue Dt:	01/29/2008	Application #:	11062768	Filing Dt:	02/22/2005
Publication #:	US20050201153	Pub Dt:	09/15/2005
Title:	CONTROLLER FOR REFRESHING MEMORIES

Patent #:	7607177	Issue Dt:	10/20/2009	Application #:	11063090	Filing Dt:	02/22/2005
Publication #:	US20050185067	Pub Dt:	08/25/2005
Title:	SECURE COMPACT FLASH

Patent #:	7154354	Issue Dt:	12/26/2006	Application #:	11063132	Filing Dt:	02/22/2005
Publication #:	US20050140462	Pub Dt:	06/30/2005
Title:	HIGH PERMEABILITY LAYERED MAGNETIC FILMS TO REDUCE NOISE IN HIGH SPEED INTERCONNECTION

Patent #:	7413342	Issue Dt:	08/19/2008	Application #:	11063173	Filing Dt:	02/22/2005
Publication #:	US20060190210	Pub Dt:	08/24/2006
Title:	DRAM TEMPERATURE MEASUREMENT SYSTEM

Patent #:	7009885	Issue Dt:	03/07/2006	Application #:	11063383	Filing Dt:	02/22/2005
Publication #:	US20050162920	Pub Dt:	07/28/2005
Title:	CIRCUIT AND METHOD FOR REDUCING LEAKAGE CURRENT IN A ROW DRIVER CIRCUIT IN A FLASH MEMORY DURING A STANDBY MODE OF OPERATION

Patent #:	7285442	Issue Dt:	10/23/2007	Application #:	11063403	Filing Dt:	02/22/2005
Publication #:	US20050146010	Pub Dt:	07/07/2005
Title:	STACKABLE CERAMIC FBGA FOR HIGH THERMAL APPLICATIONS

Patent #:	7498247	Issue Dt:	03/03/2009	Application #:	11063717	Filing Dt:	02/23/2005
Publication #:	US20060189154	Pub Dt:	08/24/2006
Title:	ATOMIC LAYER DEPOSITION OF HF3N4/HFO2 FILMS AS GATE DIELECTRICS

Patent #:	8330202	Issue Dt:	12/11/2012	Application #:	11063825	Filing Dt:	02/23/2005
Publication #:	US20060186458	Pub Dt:	08/24/2006
Title:	GERMANIUM-SILICON-CARBIDE FLOATING GATES IN MEMORIES

Patent #:	7329946	Issue Dt:	02/12/2008	Application #:	11063963	Filing Dt:	02/23/2005
Publication #:	US20050145885	Pub Dt:	07/07/2005
Title:	I/O ARCHITECTURE FOR INTEGRATED CIRCUIT PACKAGE

Patent #:	7205656	Issue Dt:	04/17/2007	Application #:	11064107	Filing Dt:	02/22/2005
Publication #:	US20060197206	Pub Dt:	09/07/2006
Title:	STACKED DEVICE PACKAGE FOR PERIPHERAL AND CENTER DEVICE PAD LAYOUT DEVICE

Patent #:	7268035	Issue Dt:	09/11/2007	Application #:	11064163	Filing Dt:	02/23/2005
Publication #:	US20050285103	Pub Dt:	12/29/2005
Title:	METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS COMPRISING CERIUM OXIDE AND TITANIUM OXIDE

Patent #:	7172465	Issue Dt:	02/06/2007	Application #:	11064344	Filing Dt:	02/22/2005
Publication #:	US20060189175	Pub Dt:	08/24/2006
Title:	EDGE CONNECTOR INCLUDING INTERNAL LAYER CONTACT, PRINTED CIRCUIT BOARD AND ELECTRONIC MODULE INCORPORATING SAME

Patent #:	7365388	Issue Dt:	04/29/2008	Application #:	11065778	Filing Dt:	02/25/2005
Publication #:	US20060192243	Pub Dt:	08/31/2006
Title:	EMBEDDED TRAP DIRECT TUNNEL NON-VOLATILE MEMORY

Patent #:	7701493	Issue Dt:	04/20/2010	Application #:	11066781	Filing Dt:	02/28/2005
Publication #:	US20060192864	Pub Dt:	08/31/2006
Title:	IMAGER ROW-WISE NOISE CORRECTION

Patent #:	7244981	Issue Dt:	07/17/2007	Application #:	11066900	Filing Dt:	02/25/2005
Publication #:	US20060202251	Pub Dt:	09/14/2006
Title:	SCALABLE HIGH PERFORMANCE NON-VOLATILE MEMORY CELLS USING MULTI-MECHANISM CARRIER TRANSPORT

Patent #:	7276760	Issue Dt:	10/02/2007	Application #:	11066905	Filing Dt:	02/25/2005
Publication #:	US20060192240	Pub Dt:	08/31/2006
Title:	LOW POWER MEMORY SUBSYSTEM WITH PROGRESSIVE NON-VOLATILITY

Patent #:	7328379	Issue Dt:	02/05/2008	Application #:	11067326	Filing Dt:	02/25/2005
Publication #:	US20050141303	Pub Dt:	06/30/2005
Title:	LOOK-UP TABLE FOR USE WITH REDUNDANT MEMORY

Patent #:	7139195	Issue Dt:	11/21/2006	Application #:	11067345	Filing Dt:	02/25/2005
Publication #:	US20050201158	Pub Dt:	09/15/2005
Title:	EEPROM MEMORY COMPRISING A NON-VOLATILE REGISTER INTEGRATED INTO THE MEMORY ARRAY THEREOF

Patent #:	6968482	Issue Dt:	11/22/2005	Application #:	11067355	Filing Dt:	02/25/2005
Publication #:	US20050141304	Pub Dt:	06/30/2005
Title:	MEMORY REDUNDANCY WITH PROGRAMMABLE NON-VOLATILE CONTROL

Patent #:	7389451	Issue Dt:	06/17/2008	Application #:	11067356	Filing Dt:	02/25/2005
Publication #:	US20050141305	Pub Dt:	06/30/2005
Title:	MEMORY REDUNDANCY WITH PROGRAMMABLE CONTROL

Patent #:	7209387	Issue Dt:	04/24/2007	Application #:	11067974	Filing Dt:	02/28/2005
Publication #:	US20060023504	Pub Dt:	02/02/2006
Title:	NON-VOLATILE PROGRAMMABLE FUSE APPARATUS IN A FLASH MEMORY WITH PAIRS OF SUPERCELLS PROGRAMMED IN A COMPLEMENTARY FASHION

Patent #:	7224632	Issue Dt:	05/29/2007	Application #:	11070213	Filing Dt:	03/03/2005
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100

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Title:	ATOMIC LAYER DEPOSITION METHODS, AND METHODS OF FORMING MATERIALS OVER SEMICONDUCTOR SUBSTRATES

Assignor

JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT

Exec Dt:

07/31/2019

Assignees

MICRON TECHNOLOGY, INC.

8000 S FEDERAL WAY

BOISE, IDAHO 83707

MICRON SEMICONDUCTOR PRODUCTS, INC.

8000 S FEDERAL WAY

BOISE, IDAHO 83707

Correspondence name and address
	WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
	ONE MARKET, SPEAR TOWER, SUITE 3300
	SAN FRANCISCO, CA 94105

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