|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
11411647
|
Filing Dt:
|
04/26/2006
|
Publication #:
|
|
Pub Dt:
|
08/24/2006
| | | | |
Title:
|
VOLTAGE-LEVEL CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2010
|
Application #:
|
11411982
|
Filing Dt:
|
04/26/2006
|
Publication #:
|
|
Pub Dt:
|
12/14/2006
| | | | |
Title:
|
VERTICAL MOSFET TRANSISTOR, IN PARTICULAR OPERATING AS A SELECTOR IN NONVOLATILE MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2008
|
Application #:
|
11412217
|
Filing Dt:
|
04/26/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
NAND STRING WORDLINE DELAY REDUCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2009
|
Application #:
|
11412524
|
Filing Dt:
|
04/27/2006
|
Publication #:
|
|
Pub Dt:
|
08/24/2006
| | | | |
Title:
|
METHOD OF FORMING A CONDUCTIVE LINE AND A METHOD OF FORMING A CONDUCTIVE CONTACT ADJACENT TO AND INSULATED FROM A CONDUCTIVE LINE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2008
|
Application #:
|
11412582
|
Filing Dt:
|
04/27/2006
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR REDUCING SHORTING IN MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2010
|
Application #:
|
11412633
|
Filing Dt:
|
04/26/2006
|
Publication #:
|
|
Pub Dt:
|
07/05/2007
| | | | |
Title:
|
METHODS FOR PACKAGING MICROELECTRONIC DEVICES AND MICROELECTRONIC DEVICES FORMED USING SUCH METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/2010
|
Application #:
|
11413256
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
METHOD FOR FORMING A MICROELECTRONIC STRUCTURE HAVING A CONDUCTIVE MATERIAL AND A FILL MATERIAL WITH A HARDNESS OF 0.04 GPA OR HIGHER WITHIN AN APERTURE.
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
11413289
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
08/24/2006
| | | | |
Title:
|
Systems and methods for forming apertures in microfeature workpieces
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2008
|
Application #:
|
11413431
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
09/28/2006
| | | | |
Title:
|
METHODS OF FORMING MATERIALS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11413439
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
Stacked die packages
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2007
|
Application #:
|
11413682
|
Filing Dt:
|
04/27/2006
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
Title:
|
MICROFEATURE DEVICES AND METHODS FOR MANUFACTURING MICROFEATURE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2007
|
Application #:
|
11413790
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
Title:
|
METHOD AND APPARATUS FOR DIGITAL PHASE GENERATION AT HIGH FREQUENCIES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/2009
|
Application #:
|
11413921
|
Filing Dt:
|
04/27/2006
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
Title:
|
APPARATUS FOR SPIN COATING SEMICONDUCTOR SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
11414348
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
FABRICATION OF SEMICONDUCTOR DEVICES USING ANTI-REFLECTIVE COATINGS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2008
|
Application #:
|
11414661
|
Filing Dt:
|
04/27/2006
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
Title:
|
PERMEABLE CAPACITOR ELECTRODE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2010
|
Application #:
|
11414864
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
08/09/2007
| | | | |
Title:
|
MICROELECTRONIC DEVICES, STACKED MICROELECTRONIC DEVICES, AND METHODS FOR MANUFACTURING SUCH DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2009
|
Application #:
|
11414966
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
MEMORY VOLTAGE CYCLE ADJUSTMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2008
|
Application #:
|
11414982
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
12/21/2006
| | | | |
Title:
|
SELECTIVE SLOW PROGRAMMING CONVERGENCE IN A FLASH MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2014
|
Application #:
|
11414999
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
Title:
|
Systems and methods for forming apertures in microfeature workpieces
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2007
|
Application #:
|
11415446
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
09/28/2006
| | | | |
Title:
|
METHOD FOR ERASING AN NROM CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2007
|
Application #:
|
11415490
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
10/12/2006
| | | | |
Title:
|
RANDOM ACCESS INTERFACE IN A SERIAL MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/2007
|
Application #:
|
11415601
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
Title:
|
MAGNETIC ANNEALING SEQUENCES FOR PATTERNED MRAM SYNTHETIC ANTIFERROMAGNETIC PINNED LAYERS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
11415726
|
Filing Dt:
|
05/02/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
APPARATUS FOR MEMORY DEVICE WORDLINE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2008
|
Application #:
|
11415879
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE WITH INFORMATION LOSS SELF-DETECT CAPABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/2009
|
Application #:
|
11415980
|
Filing Dt:
|
05/02/2006
|
Publication #:
|
|
Pub Dt:
|
11/23/2006
| | | | |
Title:
|
OUTPUT BUFFER STRENGTH TRIMMING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2007
|
Application #:
|
11416338
|
Filing Dt:
|
05/02/2006
|
Publication #:
|
|
Pub Dt:
|
02/08/2007
| | | | |
Title:
|
NITROGEN AND PHOSPHORUS DOPED AMORPHOUS SILICON AS RESISTOR FOR FIELD EMISSION DISPLAY DEVICE BASEPLATE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2008
|
Application #:
|
11416582
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
Title:
|
POSITION BASED ERASE VERIFICATION LEVELS IN A FLASH MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2007
|
Application #:
|
11416583
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
MEMORY DECODER AND DATA BUS FOR BURST PAGE READ
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2010
|
Application #:
|
11416584
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
APPARATUS AND METHOD FOR TRENCH TRANSISTOR MEMORY HAVING DIFFERENT GATE DIELECTRIC THICKNESS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11416595
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
09/21/2006
| | | | |
Title:
|
Use of selective epitaxial silicon growth in formation of floating gates
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2008
|
Application #:
|
11416672
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
01/04/2007
| | | | |
Title:
|
LOW POWER MULTIPLE BIT SENSE AMPLIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2007
|
Application #:
|
11416679
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
NOISE SUPPRESSION IN MEMORY DEVICE SENSING
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2010
|
Application #:
|
11416740
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
STACKED MICROFEATURE DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2009
|
Application #:
|
11416803
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
ASSEMBLIES AND MULTI-CHIP MODULES INCLUDING STACKED SEMICONDUCTOR DICE HAVING CENTRALLY LOCATED, WIRE BONDED BOND PADS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2008
|
Application #:
|
11416819
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
METHODS, CIRCUITS, AND APPLICATIONS USING A RESISTOR AND A SCHOTTKY DIODE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/12/2008
|
Application #:
|
11416824
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
MICROELECTRONIC DEVICES AND METHODS FOR FORMING INTERCONNECTS IN MICROELECTRONIC DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2008
|
Application #:
|
11417044
|
Filing Dt:
|
05/04/2006
|
Publication #:
|
|
Pub Dt:
|
11/30/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE MANUFACTURING METHOD INCLUDING FORMING A METAL SILICIDE LAYER ON AN INDIUM-CONTAINING LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2010
|
Application #:
|
11417160
|
Filing Dt:
|
05/04/2006
|
Publication #:
|
|
Pub Dt:
|
11/08/2007
| | | | |
Title:
|
METHOD AND APPARATUS PROVIDING MULTIPLE TRANSFER GATE CONTROL LINES PER PIXEL FOR AUTOMATIC EXPOSURE CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2011
|
Application #:
|
11417389
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR OPTIMIZING INTERCONNECTIONS OF COMPONENTS IN A MULTICHIP MEMORY MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2007
|
Application #:
|
11417390
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
SYNCHRONOUS CLOCK GENERATOR INCLUDING DUTY CYCLE CORRECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2011
|
Application #:
|
11417573
|
Filing Dt:
|
05/04/2006
|
Publication #:
|
|
Pub Dt:
|
11/08/2007
| | | | |
Title:
|
METHOD FOR READING A MULTILEVEL CELL IN A NON-VOLATILE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2008
|
Application #:
|
11417577
|
Filing Dt:
|
05/04/2006
|
Publication #:
|
|
Pub Dt:
|
11/08/2007
| | | | |
Title:
|
MIMICKING PROGRAM VERIFY DRAIN RESISTANCE IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2007
|
Application #:
|
11417620
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
11/23/2006
| | | | |
Title:
|
LEADFRAME ALTERATION TO DIRECT COMPOUND FLOW INTO PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/2009
|
Application #:
|
11418170
|
Filing Dt:
|
05/04/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
METHODS FOR FORMING INTERCONNECTS IN MICROELECTRONIC WORKPIECES AND MICROELECTRONIC WORKPIECES FORMED USING SUCH METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2010
|
Application #:
|
11418337
|
Filing Dt:
|
05/04/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
METHODS AND SYSTEMS FOR CONTROLLING TEMPERATURE DURING MICROFEATURE WORKPIECE PROCESSING, E.G. CVD DEPOSITION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2009
|
Application #:
|
11418556
|
Filing Dt:
|
05/05/2006
|
Publication #:
|
|
Pub Dt:
|
09/21/2006
| | | | |
Title:
|
METHODS OF FORMING GATELINES AND TRANSISTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2009
|
Application #:
|
11418582
|
Filing Dt:
|
05/04/2006
|
Publication #:
|
|
Pub Dt:
|
11/16/2006
| | | | |
Title:
|
INTEGRATED CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2008
|
Application #:
|
11418724
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
11/08/2007
| | | | |
Title:
|
METHODS OF PROVIDING SEMICONDUCTOR COMPONENTS WITHIN SOCKETS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/22/2009
|
Application #:
|
11418897
|
Filing Dt:
|
05/04/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR AN ASYNCHRONOUS DATA BUFFER HAVING BUFFER WRITE AND READ POINTERS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2011
|
Application #:
|
11419173
|
Filing Dt:
|
05/18/2006
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
Title:
|
METHOD AND DEVICE TO VARY GROWTH RATE OF THIN FILMS OVER SEMICONDUCTOR STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2007
|
Application #:
|
11419261
|
Filing Dt:
|
05/19/2006
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2012
|
Application #:
|
11421399
|
Filing Dt:
|
05/31/2006
|
Publication #:
|
|
Pub Dt:
|
10/05/2006
| | | | |
Title:
|
DYNAMIC ARRAYS AND OVERLAYS WITH BOUNDS POLICIES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2011
|
Application #:
|
11421614
|
Filing Dt:
|
06/01/2006
|
Publication #:
|
|
Pub Dt:
|
12/06/2007
| | | | |
Title:
|
ANTIFUSE PROGRAMMING CIRCUIT WITH SNAPBACK SELECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2009
|
Application #:
|
11423075
|
Filing Dt:
|
06/08/2006
|
Publication #:
|
|
Pub Dt:
|
10/19/2006
| | | | |
Title:
|
METHOD AND DEVICE FOR CHECKING LITHOGRAPHY DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2009
|
Application #:
|
11423082
|
Filing Dt:
|
06/08/2006
|
Publication #:
|
|
Pub Dt:
|
10/19/2006
| | | | |
Title:
|
METHOD AND DEVICE FOR CHECKING LITHOGRAPHY DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2011
|
Application #:
|
11424394
|
Filing Dt:
|
06/15/2006
|
Publication #:
|
|
Pub Dt:
|
10/26/2006
| | | | |
Title:
|
SEMICONDUCTOR CONTACT DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2009
|
Application #:
|
11424401
|
Filing Dt:
|
06/15/2006
|
Publication #:
|
|
Pub Dt:
|
10/12/2006
| | | | |
Title:
|
RESISTIVE HEATER FOR THERMO OPTIC DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2008
|
Application #:
|
11426523
|
Filing Dt:
|
06/26/2006
|
Publication #:
|
|
Pub Dt:
|
10/19/2006
| | | | |
Title:
|
GATE DIELECTRIC ANTIFUSE CIRCUIT TO PROTECT A HIGH-VOLTAGE TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11426768
|
Filing Dt:
|
06/27/2006
|
Publication #:
|
|
Pub Dt:
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11/23/2006
| | | | |
Title:
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ETCH MASK AND METHOD OF FORMING A MAGNETIC RANDOM ACCESS MEMORY STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/2009
|
Application #:
|
11427038
|
Filing Dt:
|
06/28/2006
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Publication #:
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Pub Dt:
|
10/26/2006
| | | | |
Title:
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WRITE ONCE READ ONLY MEMORY EMPLOYING CHARGE TRAPPING IN INSULATORS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2008
|
Application #:
|
11427569
|
Filing Dt:
|
06/29/2006
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Publication #:
|
|
Pub Dt:
|
10/26/2006
| | | | |
Title:
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LANTHANIDE DOPED TIOX DIELECTRIC FILMS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2008
|
Application #:
|
11428620
|
Filing Dt:
|
07/05/2006
|
Publication #:
|
|
Pub Dt:
|
10/26/2006
| | | | |
Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE HAVING ELECTRICALLY DISCONNECTED SOLDER BALLS FOR MOUNTING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2008
|
Application #:
|
11428625
|
Filing Dt:
|
07/05/2006
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Publication #:
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Pub Dt:
|
10/26/2006
| | | | |
Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE HAVING ELECTRICALLY DISCONNECTED SOLDER BALLS FOR MOUNTING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2009
|
Application #:
|
11428959
|
Filing Dt:
|
07/06/2006
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Publication #:
|
|
Pub Dt:
|
12/21/2006
| | | | |
Title:
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EPITAXIAL SEMICONDUCTOR LAYER AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2007
|
Application #:
|
11429030
|
Filing Dt:
|
05/04/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
DYNAMIC VOLUME MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2008
|
Application #:
|
11429856
|
Filing Dt:
|
05/08/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
METHOD AND APPARATUS FOR INITIALIZATION OF READ LATENCY TRACKING CIRCUIT IN HIGH-SPEED DRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11430046
|
Filing Dt:
|
05/09/2006
|
Publication #:
|
|
Pub Dt:
|
11/30/2006
| | | | |
Title:
|
METHOD OF FORMING NON-VOLATILE RESISTANCE VARIABLE DEVICES AND METHOD OF FORMING A PROGRAMMABLE MEMORY CELL OF MEMORY CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/2009
|
Application #:
|
11430047
|
Filing Dt:
|
05/09/2006
|
Publication #:
|
|
Pub Dt:
|
10/19/2006
| | | | |
Title:
|
METHOD OF MANUFACTURE OF A PCRAM MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
11430138
|
Filing Dt:
|
05/09/2006
|
Publication #:
|
|
Pub Dt:
|
10/12/2006
| | | | |
Title:
|
MAGNETIC MEMORY HAVING SYNTHETIC ANTIFERROMAGNETIC PINNED LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2007
|
Application #:
|
11430339
|
Filing Dt:
|
05/09/2006
|
Publication #:
|
|
Pub Dt:
|
10/05/2006
| | | | |
Title:
|
DATA COMPRESSION READ MODE FOR MEMORY TESTING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
11430375
|
Filing Dt:
|
05/08/2006
|
Publication #:
|
|
Pub Dt:
|
09/21/2006
| | | | |
Title:
|
SUPPORT ELEMENTS FOR SEMICONDUCTOR DEVICES WITH PERIPHERALLY LOCATED BOND PADS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2008
|
Application #:
|
11430379
|
Filing Dt:
|
05/08/2006
|
Title:
|
SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION DURING EXTENDED REFRESH PERIODS OF DYNAMIC RANDOM ACCESS MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/15/2008
|
Application #:
|
11430470
|
Filing Dt:
|
05/08/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
INPUT AND OUTPUT BUFFERS HAVING SYMMETRICAL OPERATING CHARACTERISTICS AND IMMUNITY FROM VOLTAGE VARIATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2007
|
Application #:
|
11430471
|
Filing Dt:
|
05/08/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR REDUCED POWER OPEN-LOOP SYNTHESIS OF OUTPUT CLOCK SIGNALS HAVING A SELECTED PHASE RELATIVE TO AN INPUT CLOCK SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/2009
|
Application #:
|
11430483
|
Filing Dt:
|
05/09/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
METHODS FOR PACKAGING MICROFEATURE DEVICES AND MICROFEATURE DEVICES FORMED BY SUCH METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/2010
|
Application #:
|
11430540
|
Filing Dt:
|
05/08/2006
|
Publication #:
|
|
Pub Dt:
|
11/08/2007
| | | | |
Title:
|
SUBSTRATES, SYSTEMS, AND DEVICES INCLUDING STRUCTURES FOR SUPPRESSING POWER AND GROUND PLANE NOISE, AND METHODS FOR SUPPRESSING POWER AND GROUND PLANE NOISE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2007
|
Application #:
|
11430549
|
Filing Dt:
|
05/09/2006
|
Publication #:
|
|
Pub Dt:
|
10/05/2006
| | | | |
Title:
|
DATA COMPRESSION READ MODE FOR MEMORY TESTING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
11430550
|
Filing Dt:
|
05/09/2006
|
Publication #:
|
|
Pub Dt:
|
09/28/2006
| | | | |
Title:
|
DATA COMPRESSION READ MODE FOR MEMORY TESTING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2010
|
Application #:
|
11430735
|
Filing Dt:
|
05/09/2006
|
Publication #:
|
|
Pub Dt:
|
09/28/2006
| | | | |
Title:
|
MICROELECTRONIC DEVICES HAVING VIAS, AND PACKAGED MICROELECTRONIC DEVICES HAVING VIAS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2007
|
Application #:
|
11430792
|
Filing Dt:
|
05/09/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
SILICON RICH BARRIER LAYERS FOR INTEGRATED CIRCUIT DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/2010
|
Application #:
|
11431269
|
Filing Dt:
|
05/10/2006
|
Publication #:
|
|
Pub Dt:
|
11/15/2007
| | | | |
Title:
|
METHODS OF MAKING SELF-ALIGNED NANO-STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/2010
|
Application #:
|
11431509
|
Filing Dt:
|
05/11/2006
|
Publication #:
|
|
Pub Dt:
|
11/16/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING A CYLINDRICAL CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/2009
|
Application #:
|
11431958
|
Filing Dt:
|
05/10/2006
|
Publication #:
|
|
Pub Dt:
|
11/15/2007
| | | | |
Title:
|
ELECTRICAL COMPONENTS FOR MICROELECTRONIC DEVICES AND METHODS OF FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/28/2009
|
Application #:
|
11432009
|
Filing Dt:
|
05/10/2006
|
Publication #:
|
|
Pub Dt:
|
09/28/2006
| | | | |
Title:
|
LOW POWER COST-EFFECTIVE ECC MEMORY SYSTEM AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2010
|
Application #:
|
11432013
|
Filing Dt:
|
05/10/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR OPTIMIZING INTERCONNECTIONS OF MEMORY DEVICES IN A MULTICHIP MODULE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2009
|
Application #:
|
11432015
|
Filing Dt:
|
05/10/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR MULTIPLE BIT OPTICAL DATA TRANSMISSION IN MEMORY SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2009
|
Application #:
|
11432016
|
Filing Dt:
|
05/10/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
METHOD AND SYSTEM FOR REDUCING MISMATCH BETWEEN REFERENCE AND INTENSITY PATHS IN ANALOG TO DIGITAL CONVERTERS IN CMOS ACTIVE PIXEL SENSORS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/2009
|
Application #:
|
11432017
|
Filing Dt:
|
05/10/2006
|
Publication #:
|
|
Pub Dt:
|
11/30/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR TRANSMITTING DATA PACKETS IN A COMPUTER SYSTEM HAVING A MEMORY HUB ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2007
|
Application #:
|
11432018
|
Filing Dt:
|
05/10/2006
|
Publication #:
|
|
Pub Dt:
|
09/28/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR COMMUNICATING THE SYNCHRONIZATION STATUS OF MEMORY MODULES DURING INITIALIZATION OF THE MEMORY MODULES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/2009
|
Application #:
|
11432019
|
Filing Dt:
|
05/11/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
MULTI-STATE MEMORY CELL WITH ASYMMETRIC CHARGE TRAPPING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2008
|
Application #:
|
11432060
|
Filing Dt:
|
05/10/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR READ SYNCHRONIZATION OF MEMORY MODULES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11432135
|
Filing Dt:
|
05/11/2006
|
Publication #:
|
|
Pub Dt:
|
11/15/2007
| | | | |
Title:
|
NAND ARCHITECTURE MEMORY DEVICES AND OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2007
|
Application #:
|
11432238
|
Filing Dt:
|
05/10/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
MULTI-PHASE CLOCK SIGNAL GENERATOR AND METHOD HAVING INHERENTLY UNLIMITED FREQUENCY CAPABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2011
|
Application #:
|
11432270
|
Filing Dt:
|
05/11/2006
|
Publication #:
|
|
Pub Dt:
|
11/15/2007
| | | | |
Title:
|
DUAL WORK FUNCTION RECESSED ACCESS DEVICE AND METHODS OF FORMING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/20/2010
|
Application #:
|
11432301
|
Filing Dt:
|
05/10/2006
|
Publication #:
|
|
Pub Dt:
|
01/18/2007
| | | | |
Title:
|
FLASH MEMORY DEVICE WITH IMPROVED MANAGEMENT OF PROTECTION INFORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2007
|
Application #:
|
11432334
|
Filing Dt:
|
05/12/2006
|
Publication #:
|
|
Pub Dt:
|
11/23/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING A MODULE BOARD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2009
|
Application #:
|
11432421
|
Filing Dt:
|
05/10/2006
|
Publication #:
|
|
Pub Dt:
|
11/15/2007
| | | | |
Title:
|
METHOD AND APPARATUS FOR OUTPUT DRIVER CALIBRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2010
|
Application #:
|
11432739
|
Filing Dt:
|
05/11/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
INTERMEDIATE SEMICONDUCTOR DEVICE STRUCTURES USING PHOTOPATTERNABLE, DIELECTRIC MATERIALS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2011
|
Application #:
|
11433015
|
Filing Dt:
|
05/12/2006
|
Publication #:
|
|
Pub Dt:
|
11/15/2007
| | | | |
Title:
|
METHOD OF FABRICATING MICROELECTRONIC DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2009
|
Application #:
|
11433131
|
Filing Dt:
|
05/11/2006
|
Publication #:
|
|
Pub Dt:
|
09/28/2006
| | | | |
Title:
|
METHOD AND SYSTEM FOR SYNCHRONIZING COMMUNICATIONS LINKS IN A HUB-BASED MEMORY SYSTEM
|
|