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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:051028/0001   Pages: 834
Recorded: 11/12/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
07/16/2002
Application #:
09261608
Filing Dt:
02/26/1999
Publication #:
Pub Dt:
03/28/2002
Title:
APPARATUS AND METHOD FOR PACKAGING CIRCUITS
2
Patent #:
Issue Dt:
03/27/2001
Application #:
09262500
Filing Dt:
03/04/1999
Title:
ELECTRONIC COUNTER FOR A NON-VOLATILE MEMORY DEVICE INTEGRATED ON A SEMICONDUCTOR
3
Patent #:
Issue Dt:
05/27/2003
Application #:
09263029
Filing Dt:
03/05/1999
Title:
INTEGRATED CIRCUITRY
4
Patent #:
Issue Dt:
03/13/2001
Application #:
09264462
Filing Dt:
03/08/1999
Title:
INTEGRATED CIRCUIT POWER-UP CONTROLLER, INTEGRATED CIRCUIT POWER-UP CIRCUITS, AND INTEGRATED CIRCUIT POWER-UP METHODS
5
Patent #:
Issue Dt:
07/04/2000
Application #:
09265192
Filing Dt:
03/10/1999
Title:
INTERNAL OSCILLATOR CIRCUIT INCLUDING A RING OSCILLATOR CONTROLLED BY A VOLTAGE REGULATOR CIRCUIT
6
Patent #:
Issue Dt:
04/25/2000
Application #:
09266499
Filing Dt:
03/11/1999
Title:
METHOD AND SYSTEM FOR REDUCING WATER VAPOR IN INTEGRATED CIRCUIT PACKAGES PRIOR TO REFLOW
7
Patent #:
Issue Dt:
09/03/2002
Application #:
09268326
Filing Dt:
03/16/1999
Title:
MIXED METAL NITRIDE AND BORIDE BARRIER LAYERS
8
Patent #:
Issue Dt:
05/01/2001
Application #:
09268737
Filing Dt:
03/17/1999
Title:
METHOD OF FORMING DUAL CONDUCTIVE PLUGS
9
Patent #:
Issue Dt:
11/07/2000
Application #:
09271621
Filing Dt:
03/17/1999
Title:
METHOD OF REDUCING DEFECTS IN ANTI-REFLECTIVE COATINGS AND SEMICONDUCTOR STRUCTURES FABRICATED THEREBY
10
Patent #:
Issue Dt:
09/04/2001
Application #:
09273118
Filing Dt:
03/19/1999
Title:
METHOD FOR FORMING A CONTACT HAVING A DIFFUSION BARRIER
11
Patent #:
Issue Dt:
05/13/2003
Application #:
09273701
Filing Dt:
03/22/1999
Title:
ANGULARLY OFFSET AND RECESSED STACKED DIE MULTICHIP DEVICE AND METHOD OF MANUFACTURE
12
Patent #:
Issue Dt:
04/24/2001
Application #:
09274138
Filing Dt:
03/22/1999
Title:
TEST INTERCONNECT FOR SEMICONDUCTORF COMPONENTS HAVING BUMPED AND PLANAR CONTACTS
13
Patent #:
Issue Dt:
02/29/2000
Application #:
09275255
Filing Dt:
03/24/1999
Title:
SWITCHING CIRCUIT HAVING AN OUTPUT VOLTAGE VARYING BETWEEN A REFERENCE VOLTAGE AND A NEGATIVE VOLTAGE
14
Patent #:
Issue Dt:
08/01/2000
Application #:
09275327
Filing Dt:
03/24/1999
Title:
ELECTRICALLY ERASABLE FLOATING-GATE MEMORY ORGANIZED IN WORDS
15
Patent #:
Issue Dt:
08/01/2000
Application #:
09275691
Filing Dt:
03/24/1999
Title:
SWITCHING CIRCUIT WITH AN OUTPUT VOLTAGE CHANGING AMONG FOUR POSSIBLE VALUES
16
Patent #:
Issue Dt:
05/16/2000
Application #:
09275694
Filing Dt:
03/24/1999
Title:
SWITCHING CIRCUIT
17
Patent #:
Issue Dt:
08/20/2002
Application #:
09275791
Filing Dt:
03/25/1999
Title:
TEST INTERCONNECT FOR BUMPED SEMICONDUCTOR COMPONENTS AND METHOD OF FABRICATION
18
Patent #:
Issue Dt:
07/04/2000
Application #:
09276214
Filing Dt:
03/25/1999
Title:
METHOD FOR READING A MULTIPLE-LEVEL MEMORY CELL
19
Patent #:
Issue Dt:
10/03/2000
Application #:
09276342
Filing Dt:
03/25/1999
Title:
CMOS BUFFER HAVING STABLE THRESHOLD VOLTAGE
20
Patent #:
Issue Dt:
04/16/2002
Application #:
09276366
Filing Dt:
03/25/1999
Title:
METHOD AND APPARATUS FOR THE GENERATION OF STATISTICALLY RANDOM NUMBERS
21
Patent #:
Issue Dt:
10/17/2006
Application #:
09277286
Filing Dt:
03/26/1999
Title:
COMPUTER TELEPHONY SERVER WITH IMPROVED FLEXIBILITY
22
Patent #:
Issue Dt:
01/04/2000
Application #:
09277379
Filing Dt:
03/22/1999
Title:
METHOD FOR FORMING A SPACER FOR A DISPLAY
23
Patent #:
Issue Dt:
06/26/2001
Application #:
09280388
Filing Dt:
03/29/1999
Title:
GAME UNIT CONTROLLER WITH HANDLEBARS
24
Patent #:
Issue Dt:
03/27/2001
Application #:
09281197
Filing Dt:
03/30/1999
Title:
NEGATIVE RESISTANCE MEMORY CELL AND METHOD
25
Patent #:
Issue Dt:
11/23/1999
Application #:
09281735
Filing Dt:
03/30/1999
Title:
CIRCUITRY COMPRISING ROUGHENED PLATINUM LAYERS, PLATINUM-CONTAINING MATERIALS, CAPACITORS COMPRISING ROUGHENED PLATINUM LAYERS, METHODS OF FORMING ROUGHENED LAYERS OF PLATINUM, AND METHODS OF FORMING CAPACITORS
26
Patent #:
Issue Dt:
09/20/2005
Application #:
09281765
Filing Dt:
03/30/1999
Title:
FAST AND ACCURATE ADJUSTMENT OF GAIN AND EXPOSURE TIME FOR IMAGE SENSORS
27
Patent #:
Issue Dt:
05/22/2001
Application #:
09283116
Filing Dt:
03/31/1999
Title:
UNIFORM DIELECTRIC LAYER AND METHOD TO FORM SAME
28
Patent #:
Issue Dt:
01/28/2003
Application #:
09283335
Filing Dt:
03/31/1999
Title:
BIDIRECTIONAL DATA TRANSFER DURING BUFFER FLUSHING OPERATIONS
29
Patent #:
Issue Dt:
03/07/2000
Application #:
09283728
Filing Dt:
04/01/1999
Title:
SPACE MANAGEMENT FOR MANAGING HIGH CAPACITY NONVOLATILE MEMORY
30
Patent #:
Issue Dt:
07/17/2001
Application #:
09285322
Filing Dt:
04/02/1999
Title:
METHOD OF FORMING CONTACT OPENINGS
31
Patent #:
Issue Dt:
01/09/2001
Application #:
09286267
Filing Dt:
04/05/1999
Title:
FIELD EMISSION DISPLAY
32
Patent #:
Issue Dt:
08/27/2002
Application #:
09286779
Filing Dt:
04/06/1999
Title:
DIGITAL DEVICE WITH INTERNAL DIFFERENTIAL SIGNAL GENERATOR
33
Patent #:
Issue Dt:
09/26/2000
Application #:
09287456
Filing Dt:
04/07/1999
Title:
UTILIZATION OF DIE REPATTERN LAYERS FOR DIE INTERNAL CONNECTIONS
34
Patent #:
Issue Dt:
10/08/2002
Application #:
09289151
Filing Dt:
04/08/1999
Title:
TECHNIQUE TO AUTOMATICALLY NOTIFY AN OPERATING SYSTEM LEVEL APPLICATION OF A SYSTEM MANAGEMENT EVENT
35
Patent #:
Issue Dt:
11/20/2001
Application #:
09289152
Filing Dt:
04/08/1999
Title:
APPARATUS FOR AUTOMATICALLY NOTIFYING OPERATING SYSTEM LEVEL APPLICATIONS OF THE OCCURRENCE OF SYSTEM MANAGEMENT EVENTS
36
Patent #:
Issue Dt:
03/09/2004
Application #:
09290531
Filing Dt:
04/12/1999
Title:
STRUCTURES FORMED USING SILICIDE CAP AS AN ETCH STOP IN MULTILAYER METAL PROCESSES
37
Patent #:
Issue Dt:
12/17/2002
Application #:
09290723
Filing Dt:
04/12/1999
Publication #:
Pub Dt:
05/30/2002
Title:
METHODS OF PROVIDING COMPUTER SYSTEMS WITH BUNDLED ACCESS TO RESTRICTED-ACCESS DATABASES
38
Patent #:
Issue Dt:
09/23/2003
Application #:
09291369
Filing Dt:
04/14/1999
Title:
INTEGRATED SEMICONDUCTOR MEMORY CHIP WITH PRESENCE DETECT DATA CAPABILITY
39
Patent #:
Issue Dt:
08/06/2002
Application #:
09291762
Filing Dt:
04/14/1999
Title:
LOCAL INTERCONNECT STRUCTURES FOR INTEGRATED CIRCUITS AND METHODS FOR MAKING THE SAME
40
Patent #:
Issue Dt:
07/23/2002
Application #:
09292081
Filing Dt:
04/14/1999
Title:
METHOD OF COATING A SEMICONDUCTOR WAFER
41
Patent #:
Issue Dt:
03/16/2004
Application #:
09292745
Filing Dt:
04/16/1999
Title:
SEMICONDUCTOR DEVICE, ELECTRICAL CONDUCTOR SYSTEM, AND METHOD OF MAKING
42
Patent #:
Issue Dt:
10/09/2007
Application #:
09293188
Filing Dt:
04/16/1999
Title:
METHOD OF FORMING INTERCONNECT STRUCTURE WITH INTERLAYER DIELECTRIC
43
Patent #:
Issue Dt:
01/30/2001
Application #:
09293203
Filing Dt:
04/16/1999
Title:
CIRCUITS AND SYSTEMS FOR REALIGNING DATA OUTPUT BY SEMICONDUCTOR TESTERS TO PACKET-BASED DEVICES UNDER TEST
44
Patent #:
Issue Dt:
07/23/2002
Application #:
09293353
Filing Dt:
04/16/1999
Title:
REDUNDANCY ANTIFUSE BANK FOR A MEMORY DEVICE
45
Patent #:
Issue Dt:
01/02/2001
Application #:
09293369
Filing Dt:
04/16/1999
Title:
METHOD OF MAKING A SACRIFICIAL SELF-ALIGNED INTERCONNECT STRUCTURE
46
Patent #:
Issue Dt:
05/22/2001
Application #:
09293636
Filing Dt:
04/15/1999
Title:
SELECTIVE SILICON FORMATION FOR SEMICONDUCTOR DEVICES
47
Patent #:
Issue Dt:
05/08/2001
Application #:
09295019
Filing Dt:
04/20/1999
Title:
CARRIER HEADS, PLANARIZING MACHINES AND METHODS FOR MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC-DEVICE SUBSTRATE ASSEMBLIES
48
Patent #:
Issue Dt:
12/05/2000
Application #:
09295263
Filing Dt:
04/20/1999
Title:
CIRCUIT FOR PROVIDING A READING PHASE AFTER POWER-ON-RESET
49
Patent #:
Issue Dt:
08/13/2002
Application #:
09295988
Filing Dt:
04/21/1999
Title:
INTEGRATED CIRCUIT HAVING TEMPORARY CONDUCTIVE PATH STRUCTURE AND METHOD FOR FORMING THE SAME
50
Patent #:
Issue Dt:
05/30/2000
Application #:
09296457
Filing Dt:
04/21/1999
Title:
CLOSURE SYSTEM FOR DEVICES HAVING A STYLUS
51
Patent #:
Issue Dt:
09/03/2002
Application #:
09296889
Filing Dt:
04/22/1999
Publication #:
Pub Dt:
01/31/2002
Title:
CHEMISTRY FOR CHEMICAL VAPOR DEPOSITION OF TITANIUM CONTAINING FILMS
52
Patent #:
Issue Dt:
09/04/2001
Application #:
09298159
Filing Dt:
04/23/1999
Title:
METHOD OF FORMING SEMICONDUCTOR DIE WITH INTEGRAL DECOUPLING CAPACITOR
53
Patent #:
Issue Dt:
10/09/2001
Application #:
09298799
Filing Dt:
04/23/1999
Title:
BALANCED DUAL-EDGE TRIGGERED DATA BIT SHIFTING CIRCUIT AND METHOD
54
Patent #:
Issue Dt:
06/24/2003
Application #:
09299066
Filing Dt:
04/23/1999
Title:
WIDE DYNAMIC RANGE FUSION USING MEMORY LOOK-UP
55
Patent #:
Issue Dt:
09/03/2002
Application #:
09299357
Filing Dt:
04/26/1999
Title:
ANTI-REFLECTIVE COATINGS AND METHODS REGARDING SAME
56
Patent #:
Issue Dt:
12/26/2000
Application #:
09299771
Filing Dt:
04/26/1999
Title:
METHOD AND APPARATUS FOR DUAL MODE OUTPUT BUFFER IMPEDANCE COMPENSATION
57
Patent #:
Issue Dt:
10/23/2001
Application #:
09300099
Filing Dt:
04/27/1999
Publication #:
Pub Dt:
05/31/2001
Title:
CURRENT SENSE AMPLIFIER AND CURRENT COMPARATOR WITH HYSTERESIS
58
Patent #:
Issue Dt:
05/25/2004
Application #:
09300363
Filing Dt:
04/26/1999
Title:
CONTACT STRUCTURE FOR INTEGRATED CIRCUIT DEVICES
59
Patent #:
Issue Dt:
11/21/2000
Application #:
09302196
Filing Dt:
04/29/1999
Title:
TRANSVERSE HYBIRD LOC PACKAGE
60
Patent #:
Issue Dt:
09/05/2000
Application #:
09302231
Filing Dt:
04/29/1999
Title:
METHOD FOR SAVING DATA IN THE EVENT OF UNWANTED INTERRUPTIONS IN THE PROGRAMMING CYCLE OF A NONVOLATILE MEMORY, AND A NONVOLATILE MEMORY
61
Patent #:
Issue Dt:
09/23/2003
Application #:
09302906
Filing Dt:
04/30/1999
Title:
SENSOR SYSTEM MOUSE
62
Patent #:
Issue Dt:
11/21/2000
Application #:
09303076
Filing Dt:
04/30/1999
Title:
DELAY LOCK LOOPS, SIGNAL LOCKING METHODS AND METHODS OF IMPLEMENTING DELAY LOCK LOOPS
63
Patent #:
Issue Dt:
07/24/2001
Application #:
09304227
Filing Dt:
05/03/1999
Title:
FLEXIBLE SEMICONDUCTOR INTERCONNECT FABRICATED BY BACKSLIDE THINNING
64
Patent #:
Issue Dt:
10/17/2000
Application #:
09304358
Filing Dt:
05/04/1999
Title:
CATALYTIC BREAKDOWN OF REACTANT GASES IN CHEMICAL VAPOR DEPOSITION
65
Patent #:
Issue Dt:
08/28/2001
Application #:
09304360
Filing Dt:
05/04/1999
Title:
APPARATUS FOR EXTERNALLY TIMING HIGH VOLTAGE CYCLES OF NON-VOLATILE MEMORY SYSTEM
66
Patent #:
Issue Dt:
06/06/2000
Application #:
09306322
Filing Dt:
05/06/1999
Title:
METHOD AND APPARATUS FOR PROVIDING REDUNDANCY IN NON-VOLATILE MEMORY DEVICES
67
Patent #:
Issue Dt:
03/20/2001
Application #:
09306936
Filing Dt:
05/07/1999
Title:
METHODS OF FABRICATING DISPLAY SCREENS USING ELECTROPHORETIC DEPOSITION
68
Patent #:
Issue Dt:
10/31/2000
Application #:
09307240
Filing Dt:
04/30/1999
Title:
NOVEL STATIC MEMORY CELL AND METHOD OF MANUFACTURING A STATIC MEMORY CELL
69
Patent #:
Issue Dt:
09/18/2001
Application #:
09307739
Filing Dt:
05/10/1999
Title:
COMPONENT MOUNT
70
Patent #:
Issue Dt:
04/11/2000
Application #:
09310060
Filing Dt:
05/11/1999
Title:
VOID-FREE UNDERFILL OF SURFACE MOUNTED CHIPS
71
Patent #:
Issue Dt:
09/04/2001
Application #:
09310288
Filing Dt:
05/12/1999
Title:
ADJUSTABLE HIGH-TRIGGER-VOLTAGE ELECTROSTATIC DISCHARGE PROTECTION DEVICE
72
Patent #:
Issue Dt:
12/12/2000
Application #:
09310489
Filing Dt:
05/12/1999
Title:
METHOD OF CONTROLLING OUTDIFFUSION IN A DOPED THREE-DIMENSIONAL FILM BY USING ANGLED IMPLANTS
73
Patent #:
Issue Dt:
04/03/2001
Application #:
09310515
Filing Dt:
05/12/1999
Title:
A DEVICE FABRICATED BY A METHOD OF CONTROLLING OUTDIFFUSION FROM A DOPED THREE-DIMENSIONAL FILM
74
Patent #:
Issue Dt:
04/02/2002
Application #:
09310538
Filing Dt:
05/12/1999
Title:
ELECTROSTATIC DISCHARGE PROTECTION DEVICE HAVING A GRADED JUNCTION
75
Patent #:
Issue Dt:
08/28/2001
Application #:
09311032
Filing Dt:
05/13/1999
Title:
WAFER HANDLING DEVICE HAVING CONFORMING PERIMETER SEAL
76
Patent #:
Issue Dt:
07/31/2001
Application #:
09311632
Filing Dt:
05/14/1999
Title:
EFFICIENT FABRICATION PROCESS FOR DUAL WELL TYPE STRUCTURES
77
Patent #:
Issue Dt:
08/08/2000
Application #:
09311914
Filing Dt:
05/14/1999
Title:
METHOD OF FORMING A CIRCUITRY ISOLATION REGION WITHIN A SEMICONDUCTIVE WAFER
78
Patent #:
Issue Dt:
05/07/2002
Application #:
09312122
Filing Dt:
05/14/1999
Publication #:
Pub Dt:
02/07/2002
Title:
METHOD AND APPARATUS FOR SIMULTANEOUSLY ACCESSING THE TAG AND DATA ARRAYS OF A MEMORY DEVICE
79
Patent #:
Issue Dt:
12/19/2000
Application #:
09313812
Filing Dt:
05/18/1999
Title:
RETRACTABLE KEYBOARD ILLUMINATION DEVICE
80
Patent #:
Issue Dt:
07/23/2002
Application #:
09313926
Filing Dt:
05/18/1999
Title:
INTEGRATED CIRCUIT COMPRISING AT LEAST TWO MEMORIES
81
Patent #:
Issue Dt:
05/07/2002
Application #:
09315455
Filing Dt:
05/20/1999
Title:
FORMATION OF ELECTRICAL CONTACTS TO CONDUCTIVE ELEMENTS IN THE FABRICATION OF SEMICONDUCTOR INTEGRATED CIRCUITS
82
Patent #:
Issue Dt:
08/29/2000
Application #:
09315649
Filing Dt:
05/20/1999
Title:
SYNCHRONOUS DRAM MEMORY WITH ASYNCHROMOUS COLUMN DECODE
83
Patent #:
Issue Dt:
05/15/2001
Application #:
09317314
Filing Dt:
05/24/1999
Title:
THE USE OF A STREAM OF COMPRESSED GAS TO DETECT SEMICONDUCTOR INTERCONNECT PROBLEMS
84
Patent #:
Issue Dt:
08/14/2001
Application #:
09317387
Filing Dt:
05/24/1999
Title:
COMPARATOR FOR DETERMINING PROCESS VARIATIONS
85
Patent #:
Issue Dt:
07/09/2002
Application #:
09317841
Filing Dt:
05/25/1999
Title:
INTEGRATED CORDLESS MOUSE AND LASER POINTER
86
Patent #:
Issue Dt:
08/29/2000
Application #:
09317907
Filing Dt:
05/24/1999
Title:
MEMORY DEVICE WITH REGULATED POWER SUPPLY CONTROL
87
Patent #:
Issue Dt:
03/29/2005
Application #:
09318073
Filing Dt:
05/25/1999
Title:
THIN FILM MEMORY DEVICE HAVING LOCAL AND EXTERNAL MAGNETIC SHIELDING
88
Patent #:
Issue Dt:
04/02/2002
Application #:
09318280
Filing Dt:
05/25/1999
Title:
INTERCONNECT STRUCTURE
89
Patent #:
Issue Dt:
09/10/2002
Application #:
09318287
Filing Dt:
05/25/1999
Title:
HIGH-SPEED DIGITAL DISTRIBUTION SYSTEM
90
Patent #:
Issue Dt:
11/14/2000
Application #:
09320315
Filing Dt:
05/26/1999
Title:
HIGH STORAGE CAPACITY NON-VOLATILE MEMORY
91
Patent #:
Issue Dt:
10/31/2000
Application #:
09320381
Filing Dt:
05/26/1999
Title:
SEMICONDUCTOR PROCESSING METHODS, AND METHODS OF FORMING CAPACITOR CONSTRUCTIONS
92
Patent #:
Issue Dt:
03/20/2001
Application #:
09320404
Filing Dt:
05/26/1999
Title:
METHODS OF FORMING POLISHED MATERIAL AND METHODS OF FORMING ISOLATION REGIONS
93
Patent #:
Issue Dt:
05/25/2004
Application #:
09320421
Filing Dt:
05/26/1999
Publication #:
Pub Dt:
11/22/2001
Title:
DRAM SENSE AMPLIFIER FOR LOW VOLTAGES
94
Patent #:
Issue Dt:
06/05/2001
Application #:
09321961
Filing Dt:
05/28/1999
Title:
MONOLITHICALLY INTEGRATED SELECTOR FOR ELECTRICALLY PROGRAMMABLE MEMORY CELL DEVICES
95
Patent #:
Issue Dt:
11/25/2003
Application #:
09322152
Filing Dt:
05/28/1999
Title:
METHOD FOR DIRESCTING THE ROUTE OF A CELL TRANSMITTING A NETWORK
96
Patent #:
Issue Dt:
01/30/2001
Application #:
09322460
Filing Dt:
05/28/1999
Title:
DEVICE AND METHOD FOR READING NONVOLATILE MEMORY CELLS
97
Patent #:
Issue Dt:
08/29/2000
Application #:
09322644
Filing Dt:
05/28/1999
Title:
CIRCUIT DEVICE AND CORRESPONDING METHOD FOR PROGRAMMING A NONVOLATILE MEMORY CELL HAVING A SINGLE VOLTAGE SUPPLY
98
Patent #:
Issue Dt:
04/03/2001
Application #:
09323749
Filing Dt:
06/01/1999
Title:
METHOD OF FORMING A CONDUCTIVE LINE AND METHOD OF FORMING A LOCAL INTERCONNECT
99
Patent #:
Issue Dt:
08/29/2000
Application #:
09324087
Filing Dt:
06/01/1999
Title:
LINE DECODER FOR A LOW SUPPLY VOLTAGE MEMORY DEVICE
100
Patent #:
Issue Dt:
07/09/2002
Application #:
09324397
Filing Dt:
06/03/1999
Title:
AGP CLOCK START/STOP DETECTION CIRCUIT
Assignor
1
Exec Dt:
07/31/2019
Assignees
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
2
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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