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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:051028/0001   Pages: 834
Recorded: 11/12/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
02/07/2012
Application #:
12621104
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
05/20/2010
Title:
SEMICONDUCTOR DEVICE WITH TRANSISTOR, CONDUCTIVE PAD, AND CONTACT
2
Patent #:
Issue Dt:
03/13/2012
Application #:
12621167
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
05/20/2010
Title:
SEMICONDUCTOR DEVICE INCLUDING AN ANTI-FUSE ELEMENT
3
Patent #:
Issue Dt:
01/31/2012
Application #:
12621366
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
03/11/2010
Title:
METHOD AND APPARATUS FOR REMOVING MATERIAL FROM MICROFEATURE WORKPIECES
4
Patent #:
Issue Dt:
07/26/2011
Application #:
12621394
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
03/11/2010
Title:
LOW VOLTAGE SENSE AMPLIFIER AND SENSING METHOD
5
Patent #:
Issue Dt:
08/23/2011
Application #:
12621400
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
03/18/2010
Title:
FLEXIBLE RESULTS PIPELINE FOR PROCESSING ELEMENT
6
Patent #:
Issue Dt:
02/15/2011
Application #:
12621413
Filing Dt:
11/18/2009
Publication #:
Pub Dt:
03/11/2010
Title:
METHOD OF FABICATING A MICROELECTRONIC DIE HAVING A CURVED SURFACE
7
Patent #:
Issue Dt:
09/18/2012
Application #:
12621768
Filing Dt:
11/19/2009
Publication #:
Pub Dt:
05/19/2011
Title:
METHODS OF UTILIZING BLOCK COPOLYMERS TO FORM PATTERNS
8
Patent #:
Issue Dt:
01/29/2013
Application #:
12622121
Filing Dt:
11/19/2009
Publication #:
Pub Dt:
03/18/2010
Title:
CONTACT FOR MEMORY CELL
9
Patent #:
Issue Dt:
08/23/2011
Application #:
12622171
Filing Dt:
11/19/2009
Publication #:
Pub Dt:
05/19/2011
Title:
METHODS OF PROCESSING SEMICONDUCTOR SUBSTRATES IN FORMING SCRIBE LINE ALIGNMENT MARKS
10
Patent #:
Issue Dt:
05/29/2012
Application #:
12622679
Filing Dt:
11/20/2009
Publication #:
Pub Dt:
03/18/2010
Title:
WRITE ONCE READ ONLY MEMORY EMPLOYING CHARGE TRAPPING IN INSULATORS
11
Patent #:
Issue Dt:
07/26/2011
Application #:
12622922
Filing Dt:
11/20/2009
Publication #:
Pub Dt:
03/18/2010
Title:
METHOD FOR PROGRAMMING AND ERASING AN NROM CELL
12
Patent #:
Issue Dt:
03/04/2014
Application #:
12622939
Filing Dt:
11/20/2009
Publication #:
Pub Dt:
03/18/2010
Title:
SEMICONDUCTOR SUBSTRATES WITH UNDERCUT STRUCTURES
13
Patent #:
Issue Dt:
03/19/2013
Application #:
12623310
Filing Dt:
11/20/2009
Publication #:
Pub Dt:
07/01/2010
Title:
ERROR CORRECTION CODE FOR UNIDIRECTIONAL MEMORY
14
Patent #:
Issue Dt:
12/14/2010
Application #:
12623895
Filing Dt:
11/23/2009
Publication #:
Pub Dt:
03/25/2010
Title:
BAND ENGINEERED NANO-CRYSTAL NON-VOLATILE MEMORY DEVICE UTILIZING ENHANCED GATE INJECTION
15
Patent #:
Issue Dt:
06/12/2012
Application #:
12623926
Filing Dt:
11/23/2009
Title:
WRITE PERFORMANCE OF PHASE CHANGE MEMORY USING SET-PULSE SHAPING
16
Patent #:
Issue Dt:
07/05/2011
Application #:
12624215
Filing Dt:
11/23/2009
Publication #:
Pub Dt:
03/18/2010
Title:
MICROFEATURE WORKPIECES HAVING CONDUCTIVE INTERCONNECT STRUCTURES FORMED BY CHEMICALLY REACTIVE PROCESSES, AND ASSOCIATED SYSTEMS AND METHODS
17
Patent #:
Issue Dt:
08/30/2011
Application #:
12624774
Filing Dt:
11/24/2009
Publication #:
Pub Dt:
03/18/2010
Title:
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
18
Patent #:
Issue Dt:
06/21/2011
Application #:
12624797
Filing Dt:
11/24/2009
Publication #:
Pub Dt:
03/18/2010
Title:
SCALABLE HIGH DENSITY NON-VOLATILE MEMORY CELLS IN A CONTACTLESS MEMORY ARRAY
19
Patent #:
Issue Dt:
11/29/2011
Application #:
12625035
Filing Dt:
11/24/2009
Publication #:
Pub Dt:
03/25/2010
Title:
CURRENT MODE MEMORY APPARATUS, SYSTEMS, AND METHODS
20
Patent #:
Issue Dt:
09/20/2011
Application #:
12625090
Filing Dt:
11/24/2009
Publication #:
Pub Dt:
03/25/2010
Title:
ON-DIE ANTI-RESONANCE STRUCTURE FOR INTEGRATED CIRCUIT
21
Patent #:
Issue Dt:
11/15/2011
Application #:
12625384
Filing Dt:
11/24/2009
Publication #:
Pub Dt:
03/18/2010
Title:
INTEGRATED CIRCUIT DEVICES WITH STACKED PACKAGE INTERPOSERS
22
Patent #:
Issue Dt:
10/22/2013
Application #:
12625716
Filing Dt:
11/25/2009
Title:
AUTHENTICATED OPERATIONS AND EVENT COUNTERS
23
Patent #:
Issue Dt:
01/10/2012
Application #:
12626110
Filing Dt:
11/25/2009
Publication #:
Pub Dt:
03/25/2010
Title:
MULTI-RESISTIVE INTEGRATED CIRCUIT MEMORY
24
Patent #:
Issue Dt:
06/14/2011
Application #:
12626126
Filing Dt:
11/25/2009
Publication #:
Pub Dt:
03/18/2010
Title:
PROGRAMMABLE RESISTANCE MEMORY DEVICES AND SYSTEMS USING THE SAME AND METHODS OF FORMING THE SAME
25
Patent #:
Issue Dt:
08/16/2011
Application #:
12627077
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
03/25/2010
Title:
CHARGE PUMP OPERATION IN A NON-VOLATILE MEMORY DEVICE
26
Patent #:
Issue Dt:
01/10/2012
Application #:
12627128
Filing Dt:
11/30/2009
Title:
CHEMICAL-MECHANICAL POLISH TERMINATION LAYER TO BUILD ELECTRICAL DEVICE ISOLATION
27
Patent #:
Issue Dt:
12/27/2011
Application #:
12627214
Filing Dt:
11/30/2009
Title:
MEMORY TO STORE USER-CONFIGURABLE DATA POLARITY
28
Patent #:
Issue Dt:
11/22/2011
Application #:
12627352
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
03/25/2010
Title:
SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES
29
Patent #:
Issue Dt:
06/25/2013
Application #:
12627443
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
06/02/2011
Title:
KEYHOLE-FREE SLOPED HEATER FOR PHASE CHANGE MEMORY
30
Patent #:
Issue Dt:
07/17/2012
Application #:
12627448
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
03/25/2010
Title:
NAND FLASH MEMORY PROGRAMMING
31
Patent #:
Issue Dt:
09/04/2012
Application #:
12627768
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
02/03/2011
Title:
SEMICONDUCTOR DEVICE PERFORMING SERIAL PARALLEL CONVERSION
32
Patent #:
Issue Dt:
10/11/2011
Application #:
12627869
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
03/25/2010
Title:
RECESSED ACCESS DEVICE FOR A MEMORY
33
Patent #:
Issue Dt:
05/28/2013
Application #:
12627937
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
06/02/2011
Title:
PACKAGE INCLUDING AN UNDERFILL MATERIAL IN A PORTION OF AN AREA BETWEEN THE PACKAGE AND A SUBSTRATE OR ANOTHER PACKAGE
34
Patent #:
Issue Dt:
06/10/2014
Application #:
12628006
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
06/02/2011
Title:
PACKAGE INCLUDING AN INTERPOSER HAVING AT LEAST ONE TOPOLOGICAL FEATURE
35
Patent #:
Issue Dt:
02/18/2014
Application #:
12628042
Filing Dt:
11/30/2009
Publication #:
Pub Dt:
06/02/2011
Title:
PACKAGE INCLUDING AT LEAST ONE TOPOLOGICAL FEATURE ON AN ENCAPSULANT MATERIAL TO RESIST OUT-OF-PLANE DEFORMATION
36
Patent #:
Issue Dt:
08/21/2012
Application #:
12628073
Filing Dt:
11/30/2009
Title:
SYSTEM, APPARATUS, AND READING METHOD FOR NAND MEMORIES
37
Patent #:
Issue Dt:
11/06/2012
Application #:
12628152
Filing Dt:
11/30/2009
Title:
MULTI-PARTITIONING FEATURE ON E-MMC
38
Patent #:
Issue Dt:
08/14/2012
Application #:
12628153
Filing Dt:
11/30/2009
Title:
PHASE CHANGE MEMORY DEVICE WITH REDUCED PROGRAMMING DISTURBANCE
39
Patent #:
Issue Dt:
03/05/2013
Application #:
12628166
Filing Dt:
11/30/2009
Title:
DYNAMIC RANGE UNLOCK OR LOCK MEMORY DEVICE AND METHOD TO OPERATE THE SAME
40
Patent #:
Issue Dt:
06/19/2012
Application #:
12628522
Filing Dt:
12/01/2009
Publication #:
Pub Dt:
06/02/2011
Title:
REDUCING EFFECTS OF ERASE DISTURB IN A MEMORY DEVICE
41
Patent #:
Issue Dt:
03/29/2011
Application #:
12628709
Filing Dt:
12/01/2009
Publication #:
Pub Dt:
03/25/2010
Title:
MULTIPLE MICROLENS SYSTEM FOR IMAGE SENSORS OR DISPLAY UNITS
42
Patent #:
Issue Dt:
10/05/2010
Application #:
12628910
Filing Dt:
12/01/2009
Publication #:
Pub Dt:
03/25/2010
Title:
SEMICONDUCTOR CONSTRUCTIONS OF MEMORY DEVICE WITH DIFFERENT DEPTH GATE LINE TRENCHES
43
Patent #:
Issue Dt:
10/04/2011
Application #:
12629153
Filing Dt:
12/02/2009
Publication #:
Pub Dt:
06/03/2010
Title:
METHODS FOR FORMING BIT LINE CONTACTS AND BIT LINES DURING THE FORMATION OF A SEMICONDUCTOR DEVICE
44
Patent #:
Issue Dt:
03/27/2012
Application #:
12630332
Filing Dt:
12/03/2009
Publication #:
Pub Dt:
06/09/2011
Title:
DYNAMIC PASS VOLTAGE FOR SENSE OPERATION IN A MEMORY DEVICE
45
Patent #:
Issue Dt:
02/08/2011
Application #:
12630676
Filing Dt:
12/03/2009
Publication #:
Pub Dt:
03/25/2010
Title:
PARAMETER MEASUREMENT USING MULTI-LAYER STRUCTURES
46
Patent #:
Issue Dt:
08/14/2012
Application #:
12631606
Filing Dt:
12/04/2009
Publication #:
Pub Dt:
06/09/2011
Title:
A METHOD FOR KINK COMPENSATION IN A MEMORY
47
Patent #:
Issue Dt:
10/04/2011
Application #:
12631664
Filing Dt:
12/04/2009
Publication #:
Pub Dt:
04/01/2010
Title:
METHODS OF FORMING DRAM ARRAYS
48
Patent #:
Issue Dt:
08/23/2011
Application #:
12632121
Filing Dt:
12/07/2009
Publication #:
Pub Dt:
04/08/2010
Title:
SINGLE LATCH DATA CIRCUIT IN A MULTIPLE LEVEL CELL NON-VOLATILE MEMORY DEVICE
49
Patent #:
Issue Dt:
07/03/2012
Application #:
12632394
Filing Dt:
12/07/2009
Publication #:
Pub Dt:
06/10/2010
Title:
VERTICAL TRANSISTOR MEMORY CELL AND ARRAY
50
Patent #:
Issue Dt:
06/07/2011
Application #:
12632595
Filing Dt:
12/07/2009
Publication #:
Pub Dt:
04/08/2010
Title:
METHODS OF FORMING SEMICONDUCTOR STRUCTURES
51
Patent #:
Issue Dt:
01/25/2011
Application #:
12633226
Filing Dt:
12/08/2009
Publication #:
Pub Dt:
04/08/2010
Title:
READ METHOD FOR MLC
52
Patent #:
Issue Dt:
03/20/2012
Application #:
12633239
Filing Dt:
12/08/2009
Publication #:
Pub Dt:
06/09/2011
Title:
PROGRAMMING METHODS AND MEMORIES
53
Patent #:
Issue Dt:
09/27/2011
Application #:
12633632
Filing Dt:
12/08/2009
Publication #:
Pub Dt:
04/08/2010
Title:
APPARATUS AND METHOD FOR MULTI-PHASE CLOCK GENERATION
54
Patent #:
Issue Dt:
10/11/2011
Application #:
12633674
Filing Dt:
12/08/2009
Publication #:
Pub Dt:
04/29/2010
Title:
METHODS OF FORMING PLASMA-GENERATING STRUCTURES; METHODS OF PLASMA-ASSISTED ETCHING, AND METHODS OF PLASMA-ASSISTED DEPOSITION
55
Patent #:
Issue Dt:
10/04/2011
Application #:
12633694
Filing Dt:
12/08/2009
Publication #:
Pub Dt:
06/09/2011
Title:
METHODS OF FORMING ISOLATION STRUCTURES, AND METHODS OF FORMING NONVOLATILE MEMORY
56
Patent #:
Issue Dt:
12/20/2011
Application #:
12634580
Filing Dt:
12/09/2009
Publication #:
Pub Dt:
04/08/2010
Title:
DETECTION CIRCUIT FOR MIXED ASYNCHRONOUS AND SYNCHRONOUS MEMORY OPERATION
57
Patent #:
Issue Dt:
04/12/2011
Application #:
12634883
Filing Dt:
12/10/2009
Publication #:
Pub Dt:
04/15/2010
Title:
DUAL PANEL PIXEL READOUT IN AN IMAGER
58
Patent #:
Issue Dt:
04/03/2012
Application #:
12635005
Filing Dt:
12/10/2009
Publication #:
Pub Dt:
06/16/2011
Title:
CROSS-POINT DIODE ARRAYS AND METHODS OF MANUFACTURING CROSS-POINT DIODE ARRAYS
59
Patent #:
Issue Dt:
07/26/2016
Application #:
12635961
Filing Dt:
12/11/2009
Title:
Wireless Communication Link Using Near Field Coupling
60
Patent #:
Issue Dt:
12/25/2012
Application #:
12636317
Filing Dt:
12/11/2009
Publication #:
Pub Dt:
04/15/2010
Title:
METHOD TO ALIGN MASK PATTERNS
61
Patent #:
Issue Dt:
06/26/2012
Application #:
12637163
Filing Dt:
12/14/2009
Publication #:
Pub Dt:
04/15/2010
Title:
COUPLINGS WITHIN MEMORY DEVICES
62
Patent #:
Issue Dt:
11/29/2011
Application #:
12637604
Filing Dt:
12/14/2009
Publication #:
Pub Dt:
04/15/2010
Title:
PHASE SHIFT MASK WITH TWO-PHASE CLEAR FEATURE
63
Patent #:
Issue Dt:
07/24/2012
Application #:
12637989
Filing Dt:
12/15/2009
Publication #:
Pub Dt:
04/15/2010
Title:
ONE-TRANSISTOR COMPOSITE-GATE MEMORY
64
Patent #:
Issue Dt:
07/01/2014
Application #:
12638094
Filing Dt:
12/15/2009
Publication #:
Pub Dt:
06/16/2011
Title:
Imaging Methods In Scanning Photolithography And A Scanning Photolithography Device Used In Printing An Image Of A Reticle Onto A Photosensitive Substrate
65
Patent #:
Issue Dt:
03/29/2011
Application #:
12638572
Filing Dt:
12/15/2009
Publication #:
Pub Dt:
04/15/2010
Title:
MEMORY SYSTEM FOR DATA STORAGE AND RETRIEVAL
66
Patent #:
Issue Dt:
01/18/2011
Application #:
12638603
Filing Dt:
12/15/2009
Publication #:
Pub Dt:
04/15/2010
Title:
M+N BIT PROGRAMMING AND M+L BIT READ FOR M BIT MEMORY CELLS
67
Patent #:
Issue Dt:
11/22/2016
Application #:
12638751
Filing Dt:
12/15/2009
Publication #:
Pub Dt:
06/16/2011
Title:
METHODS AND APPARATUSES FOR REDUCING POWER CONSUMPTION IN A PATTERN RECOGNITION PROCESSOR
68
Patent #:
Issue Dt:
04/26/2016
Application #:
12638759
Filing Dt:
12/15/2009
Publication #:
Pub Dt:
06/16/2011
Title:
MULTI-LEVEL HIERARCHICAL ROUTING MATRICES FOR PATTERN-RECOGNITION PROCESSORS
69
Patent #:
Issue Dt:
07/16/2013
Application #:
12638767
Filing Dt:
12/15/2009
Publication #:
Pub Dt:
06/16/2011
Title:
ADAPTIVE CONTENT INSPECTION
70
Patent #:
Issue Dt:
09/08/2015
Application #:
12638950
Filing Dt:
12/15/2009
Publication #:
Pub Dt:
06/16/2011
Title:
PERSISTENT CONTENT IN NONVOLATILE MEMORY
71
Patent #:
Issue Dt:
05/10/2016
Application #:
12638953
Filing Dt:
12/15/2009
Publication #:
Pub Dt:
06/16/2011
Title:
NONVOLATILE MEMORY INTERNAL SIGNATURE GENERATION
72
Patent #:
Issue Dt:
08/26/2014
Application #:
12639158
Filing Dt:
12/16/2009
Publication #:
Pub Dt:
06/16/2011
Title:
TRANSISTORS WITH AN EXTENSION REGION HAVING STRIPS OF DIFFERING CONDUCTIVITY TYPE AND METHODS OF FORMING THE SAME
73
Patent #:
Issue Dt:
12/04/2012
Application #:
12639223
Filing Dt:
12/16/2009
Publication #:
Pub Dt:
04/15/2010
Title:
MEMORY CELL STORAGE NODE LENGTH
74
Patent #:
Issue Dt:
11/13/2012
Application #:
12639547
Filing Dt:
12/16/2009
Publication #:
Pub Dt:
06/16/2011
Title:
TECHNIQUES FOR REDUCING IMPACT OF ARRAY DISTURBS IN A SEMICONDUCTOR MEMORY DEVICE
75
Patent #:
Issue Dt:
03/31/2015
Application #:
12641520
Filing Dt:
12/18/2009
Publication #:
Pub Dt:
06/23/2011
Title:
STACKED DEVICE DETECTION AND IDENTIFICATION
76
Patent #:
Issue Dt:
09/20/2011
Application #:
12642356
Filing Dt:
12/18/2009
Publication #:
Pub Dt:
04/22/2010
Title:
SEMICONDUCTOR SUBSTRATE FOR BUILD-UP PACKAGES
77
Patent #:
Issue Dt:
12/14/2010
Application #:
12643835
Filing Dt:
12/21/2009
Publication #:
Pub Dt:
04/22/2010
Title:
ON-DIE SYSTEM AND METHOD FOR CONTROLLING TERMINATION IMPEDANCE OF MEMORY DEVICE DATA BUS TERMINALS
78
Patent #:
Issue Dt:
04/12/2011
Application #:
12644250
Filing Dt:
12/22/2009
Publication #:
Pub Dt:
04/22/2010
Title:
TUNNEL DIELECTRIC COMPRISING NITROGEN FOR USE WITH A SEMICONDUCTOR DEVICE AND A PROCESS FOR FORMING THE DEVICE
79
Patent #:
Issue Dt:
02/05/2013
Application #:
12646136
Filing Dt:
12/23/2009
Publication #:
Pub Dt:
06/23/2011
Title:
ERASE OPERATIONS AND APPARATUS FOR A MEMORY DEVICE
80
Patent #:
Issue Dt:
10/11/2011
Application #:
12646246
Filing Dt:
12/23/2009
Publication #:
Pub Dt:
04/22/2010
Title:
SYSTEMS AND METHODS FOR FORMING METAL OXIDES USING METAL DIKETONATES AND/OR KETOIMINES
81
Patent #:
Issue Dt:
09/30/2014
Application #:
12647020
Filing Dt:
12/24/2009
Publication #:
Pub Dt:
06/30/2011
Title:
STRUCTURES FOR RESISTANCE RANDOM ACCESS MEMORY AND METHODS OF FORMING THE SAME
82
Patent #:
Issue Dt:
02/14/2012
Application #:
12647879
Filing Dt:
12/28/2009
Title:
SERIAL PARALLEL INTERFACE FOR DATA WORD ARCHITECTURE
83
Patent #:
Issue Dt:
08/02/2011
Application #:
12647994
Filing Dt:
12/28/2009
Publication #:
Pub Dt:
04/22/2010
Title:
SELF-ALIGNED, INTEGRATED CIRCUIT CONTACT
84
Patent #:
Issue Dt:
03/13/2012
Application #:
12648084
Filing Dt:
12/28/2009
Publication #:
Pub Dt:
07/01/2010
Title:
SEMICONDUCTOR DEVICE FOR SUPPLYING STABLE VOLTAGE TO CONTROL ELECTRODE OF TRANSISTOR
85
Patent #:
Issue Dt:
08/28/2012
Application #:
12648762
Filing Dt:
12/29/2009
Title:
MULTI-CHANNEL MEMORY AND POWER SUPPLY-DRIVEN CHANNEL SELECTION
86
Patent #:
Issue Dt:
04/03/2012
Application #:
12648864
Filing Dt:
12/29/2009
Publication #:
Pub Dt:
06/03/2010
Title:
METHODS FOR FORMING CONDUCTIVE VIAS IN SEMICONDUCTOR DEVICE COMPONENTS
87
Patent #:
Issue Dt:
04/30/2013
Application #:
12648979
Filing Dt:
12/29/2009
Title:
VIA FORMATION FOR CROSS-POINT MEMORY
88
Patent #:
Issue Dt:
09/13/2016
Application #:
12649954
Filing Dt:
12/30/2009
Title:
SELF-ADAPTIVE SOLID STATE DRIVE CONTROLLER
89
Patent #:
Issue Dt:
08/19/2014
Application #:
12650029
Filing Dt:
12/30/2009
Publication #:
Pub Dt:
04/29/2010
Title:
NANO-CRYSTAL ETCH PROCESS
90
Patent #:
Issue Dt:
04/04/2017
Application #:
12650035
Filing Dt:
12/30/2009
Title:
SOLID STATE DRIVE CONTROLLER
91
Patent #:
Issue Dt:
11/01/2016
Application #:
12650952
Filing Dt:
12/31/2009
Publication #:
Pub Dt:
06/30/2011
Title:
SUB-OS VIRTUAL MEMORY MANAGEMENT LAYER
92
Patent #:
Issue Dt:
09/30/2014
Application #:
12651097
Filing Dt:
12/31/2009
Publication #:
Pub Dt:
06/30/2011
Title:
SELF-SELECTING PCM DEVICE NOT REQUIRING A DEDICATED SELECTOR TRANSISTOR
93
Patent #:
Issue Dt:
09/17/2013
Application #:
12651122
Filing Dt:
12/31/2009
Title:
SUPPLY VOLTAGE OR GROUND CONNECTIONS FOR INTEGRATED CIRCUIT DEVICE
94
Patent #:
Issue Dt:
03/04/2014
Application #:
12651827
Filing Dt:
01/04/2010
Publication #:
Pub Dt:
07/08/2010
Title:
MEMORY DEVICE CONTROLLER
95
Patent #:
Issue Dt:
12/04/2012
Application #:
12651910
Filing Dt:
01/04/2010
Publication #:
Pub Dt:
07/07/2011
Title:
ERROR CORRECTION IN A STACKED MEMORY
96
Patent #:
Issue Dt:
04/16/2013
Application #:
12652524
Filing Dt:
01/05/2010
Publication #:
Pub Dt:
07/07/2011
Title:
MEMORY CELL ARRAY WITH SEMICONDUCTOR SELECTION DEVICE FOR MULTIPLE MEMORY CELLS
97
Patent #:
NONE
Issue Dt:
Application #:
12652666
Filing Dt:
01/05/2010
Publication #:
Pub Dt:
07/07/2011
Title:
Nonvolatile Storage with Disparate Memory Types
98
Patent #:
Issue Dt:
08/28/2012
Application #:
12652733
Filing Dt:
01/05/2010
Publication #:
Pub Dt:
05/05/2011
Title:
METHOD FOR DETECTING STATUSES OF COMPONENTS OF SEMICONDUCTOR EQUIPMENT AND ASSOCIATED APPARATUS
99
Patent #:
Issue Dt:
12/13/2011
Application #:
12652955
Filing Dt:
01/06/2010
Publication #:
Pub Dt:
04/29/2010
Title:
METHODS FOR FORMING SEMICONDUCTOR CONSTRUCTIONS, AND METHODS FOR SELECTIVELY ETCHING SILICON NITRIDE RELATIVE TO CONDUCTIVE MATERIAL
100
Patent #:
Issue Dt:
01/08/2013
Application #:
12655377
Filing Dt:
12/30/2009
Title:
APPARATUSES AND METHODS FOR SENSING A PHASE-CHANGE TEST CELL AND DETERMINING CHANGES TO THE TEST CELL RESISTANCE DUE TO THERMAL EXPOSURE
Assignor
1
Exec Dt:
07/31/2019
Assignees
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
2
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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