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Total properties:
17
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Patent #:
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Issue Dt:
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02/05/2002
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Application #:
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09795849
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Filing Dt:
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02/28/2001
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Title:
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Data retention characteristics as a result of high temperature bake
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Patent #:
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Issue Dt:
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10/04/2005
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Application #:
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09855868
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Filing Dt:
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05/14/2001
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Title:
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PROTECTING ACCESS TO MICROCONTROLLER MEMORY BLOCKS
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Patent #:
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Issue Dt:
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11/04/2003
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Application #:
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09973743
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Filing Dt:
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10/11/2001
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Publication #:
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Pub Dt:
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08/08/2002
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Title:
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SEMICONDUCTOR MEMORY CAPABLE OF BEING DRIVEN AT LOW VOLTAGE AND ITS MANUFACTURE METHOD
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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10050257
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Filing Dt:
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01/16/2002
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Title:
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SOURCE SIDE SENSING SCHEME FOR VIRTUAL GROUND READ OF FLASH EPROM ARRAY WITH ADJACENT BIT PRECHARGE
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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10050483
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Filing Dt:
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01/16/2002
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Title:
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CHARGE INJECTION
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Patent #:
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Issue Dt:
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09/16/2003
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Application #:
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10136033
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Filing Dt:
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04/29/2002
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Title:
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SYSTEM FOR PROGRAMMING A FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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10259761
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Filing Dt:
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09/30/2002
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Publication #:
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Pub Dt:
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06/12/2003
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Title:
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NONVOLATILE SEMICONDUCTOR MEMORY AND METHOD FOR CONTROLLING PROGRAMMING VOLTAGE OF NONVOLATILE SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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05/11/2004
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Application #:
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10357879
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Filing Dt:
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02/04/2003
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Title:
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METHOD OF IMPROVING DYNAMIC REFERENCE TRACKING FOR FLASH MEMORY UNIT
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10649994
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
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03/11/2004
| | | | |
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Title:
|
SEMICONDUCTOR MEMORY CAPABLE OF BEING DRIVEN AT LOW VOLTAGE AND ITS MANUFACTURE METHOD
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Patent #:
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Issue Dt:
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10/31/2006
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Application #:
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11034642
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Filing Dt:
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01/13/2005
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Publication #:
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Pub Dt:
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07/13/2006
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Title:
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MULTI-LEVEL ONO FLASH PROGRAM ALGORITHM FOR THRESHOLD WIDTH CONTROL
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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11229530
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Filing Dt:
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09/20/2005
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Title:
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CHARGE SHARING TECHNIQUE DURING FLASH MEMORY PROGRAMMING
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Patent #:
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Issue Dt:
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05/17/2011
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Application #:
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11444216
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Filing Dt:
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05/30/2006
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Publication #:
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Pub Dt:
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12/14/2006
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Title:
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SEMICONDUCTOR DEVICE HAVING LAMINATED ELECTRONIC CONDUCTOR ON BIT LINE
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Patent #:
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Issue Dt:
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03/29/2011
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Application #:
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11493468
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Filing Dt:
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07/25/2006
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Publication #:
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Pub Dt:
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01/25/2007
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Title:
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FABRICATION AND METHOD OF OPERATION OF MULTI-LEVEL MEMORY CELL ON SOI SUBSTRATE
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Patent #:
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Issue Dt:
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08/23/2011
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Application #:
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12195324
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Filing Dt:
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08/20/2008
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Publication #:
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Pub Dt:
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08/20/2009
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Title:
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SEPERATION METHODS FOR SEMICONDUCTOR CHARGE ACCUMULATION LAYERS AND STRUCTURES THEREOF
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Patent #:
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Issue Dt:
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02/05/2013
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Application #:
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13026075
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Filing Dt:
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02/11/2011
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Publication #:
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Pub Dt:
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06/16/2011
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Title:
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SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREFOR
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Patent #:
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Issue Dt:
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10/02/2012
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Application #:
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13081777
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Filing Dt:
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04/07/2011
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Publication #:
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Pub Dt:
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07/28/2011
| | | | |
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Title:
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FABRICATION METHOD FOR SEMICONDUCTOR DEVICE HAVING LAMINATED ELECTRONIC CONDUCTOR ON BIT LINE
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|
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Patent #:
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Issue Dt:
|
11/27/2012
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Application #:
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13156122
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Filing Dt:
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06/08/2011
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Publication #:
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Pub Dt:
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09/29/2011
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Title:
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METHOD TO SEPERATE STORAGE REGIONS IN THE MIRROR BIT DEVICE
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