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Reel/Frame:051383/0740   Pages: 3
Recorded: 12/30/2019
Attorney Dkt #:TSM13-1170
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 3
1
Patent #:
Issue Dt:
09/29/2015
Application #:
14056649
Filing Dt:
10/17/2013
Publication #:
Pub Dt:
04/23/2015
Title:
Fin Spacer Protected Source and Drain Regions in FinFETs
2
Patent #:
Issue Dt:
04/03/2018
Application #:
14851535
Filing Dt:
09/11/2015
Publication #:
Pub Dt:
01/07/2016
Title:
Fin Spacer Protected Source and Drain Regions in FinFETs
3
Patent #:
Issue Dt:
06/09/2020
Application #:
15911488
Filing Dt:
03/05/2018
Publication #:
Pub Dt:
07/12/2018
Title:
Fin Spacer Protected Source and Drain Regions in FinFETs
Assignors
1
Exec Dt:
09/18/2019
2
Exec Dt:
09/18/2019
3
Exec Dt:
09/18/2019
4
Exec Dt:
09/18/2019
Assignee
1
8, LI-HSIN RD. 6
HSINCHU SCIENCE PARK
HSINCHU, TAIWAN 300-78
Correspondence name and address
SLATER MATSIL LLP/TSMC
17950 PRESTON ROAD, SUITE 1000
DALLAS, TX 75252

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