skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:051821/0991   Pages: 7
Recorded: 02/14/2020
Attorney Dkt #:20151393/24061.3344US03
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
12/08/2020
Application #:
16687152
Filing Dt:
11/18/2019
Publication #:
Pub Dt:
03/12/2020
Title:
METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT FABRICATION
Assignors
1
Exec Dt:
09/30/2016
2
Exec Dt:
10/18/2016
3
Exec Dt:
10/18/2016
4
Exec Dt:
10/03/2016
5
Exec Dt:
10/03/2016
6
Exec Dt:
09/30/2016
Assignee
1
NO. 8, LI-HSIN RD. 6
SCIENCE-BASED INDUSTRIAL PARK
HSIN-CHU, TAIWAN 300-77
Correspondence name and address
HAYNES AND BOONE, LLP IP SECTION
2323 VICTORY AVENUE
SUITE 700
DALLAS, TX 75219

Search Results as of: 05/14/2024 09:23 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT