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Reel/Frame:052496/0764   Pages: 4
Recorded: 04/26/2020
Attorney Dkt #:3630-SHHL-2020001US
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
NONE
Issue Dt:
Application #:
16759350
Filing Dt:
04/26/2020
Publication #:
Pub Dt:
10/01/2020
Title:
OPTIMIZATION METHOD FOR INTEGRATED CIRCUIT WAFER TEST
Assignors
1
Exec Dt:
04/21/2020
2
Exec Dt:
04/21/2020
3
Exec Dt:
04/21/2020
4
Exec Dt:
04/21/2020
5
Exec Dt:
04/21/2020
6
Exec Dt:
04/21/2020
Assignee
1
FIRST FLOOR, BUILDING 2, NO. 351 GUOSHOUJING ROAD
PUDONG NEW AREA
SHANGHAI, CHINA
Correspondence name and address
IPRO, PLLC
12332 TOWNCENTER PLAZA
PMB# 816
STERLING, VA 20164

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