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Patent #:
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Issue Dt:
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09/17/2013
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Application #:
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11007896
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Filing Dt:
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12/08/2004
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Publication #:
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Pub Dt:
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12/01/2005
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Title:
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INTEGRATED CIRCUIT LEADFRAME AND FABRICATION METHOD THEREFOR
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Patent #:
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Issue Dt:
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09/17/2013
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Application #:
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11163035
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Filing Dt:
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10/03/2005
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Publication #:
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Pub Dt:
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04/05/2007
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTI-SURFACE DIE ATTACH PAD
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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11163116
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Filing Dt:
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10/05/2005
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Publication #:
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Pub Dt:
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04/05/2007
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Title:
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ULTRA-THIN WAFER SYSTEM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/18/2012
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Application #:
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11163156
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Filing Dt:
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10/07/2005
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Publication #:
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Pub Dt:
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04/12/2007
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Title:
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WAFER LEVEL LASER MARKING SYSTEM FOR ULTRA-THIN WAFERS USING SUPPORT TAPE
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Patent #:
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Issue Dt:
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03/19/2013
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Application #:
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11164335
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Filing Dt:
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11/18/2005
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Publication #:
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Pub Dt:
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05/24/2007
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Title:
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NON-LEADED INTEGRATED CIRCUIT PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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08/20/2013
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Application #:
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11276645
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Filing Dt:
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03/08/2006
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Publication #:
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Pub Dt:
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09/13/2007
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Title:
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INTEGRATED CIRCUIT LEADED STACKED PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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02/05/2013
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Application #:
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11276942
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Filing Dt:
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03/17/2006
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Publication #:
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Pub Dt:
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09/20/2007
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Title:
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INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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03/12/2013
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Application #:
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11278008
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Filing Dt:
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03/30/2006
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Publication #:
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Pub Dt:
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10/11/2007
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEATSPREADER
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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11330930
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Filing Dt:
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01/11/2006
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Publication #:
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Pub Dt:
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07/12/2007
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Title:
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INTER-STACKING MODULE SYSTEM
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Patent #:
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Issue Dt:
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01/14/2014
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Application #:
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11339176
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Filing Dt:
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01/23/2006
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Publication #:
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Pub Dt:
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07/26/2007
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Title:
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PADLESS DIE SUPPORT INTEGRATED CIRCUIT PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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10/01/2013
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Application #:
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11379336
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Filing Dt:
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04/19/2006
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Publication #:
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Pub Dt:
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10/25/2007
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Title:
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EMBEDDED INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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03/12/2013
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Application #:
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11382983
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Filing Dt:
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05/12/2006
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Publication #:
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Pub Dt:
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05/17/2007
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE TO PACKAGE STACKING SYSTEM
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Patent #:
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Issue Dt:
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11/12/2013
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Application #:
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11456554
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Filing Dt:
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07/10/2006
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Publication #:
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Pub Dt:
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01/10/2008
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ULTRA-THIN DIE
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Patent #:
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Issue Dt:
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04/30/2013
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Application #:
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11462607
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Filing Dt:
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08/04/2006
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Publication #:
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Pub Dt:
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02/07/2008
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Title:
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STACKABLE MULTI-CHIP PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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11465769
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Filing Dt:
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08/18/2006
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Publication #:
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Pub Dt:
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03/20/2008
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Title:
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WORKPIECE DISPLACEMENT SYSTEM
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Patent #:
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Issue Dt:
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02/04/2014
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Application #:
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11536502
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Filing Dt:
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09/28/2006
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Publication #:
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Pub Dt:
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04/03/2008
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Title:
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DUAL-DIE PACKAGE STRUCTURE HAVING DIES EXTERNALLY AND SIMULTANEOUSLY CONNECTED VIA BUMP ELECTRODES AND BOND WIRES
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Patent #:
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Issue Dt:
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11/06/2012
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Application #:
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11608826
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Filing Dt:
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12/09/2006
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Publication #:
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Pub Dt:
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06/12/2008
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Title:
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STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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04/16/2013
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Application #:
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11610401
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Filing Dt:
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12/13/2006
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Publication #:
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Pub Dt:
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06/19/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING A SUPPORT STRUCTURE WITH A RECESS
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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11673558
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Filing Dt:
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02/09/2007
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Publication #:
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Pub Dt:
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08/14/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH BUMP OVER VIA
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Patent #:
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Issue Dt:
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06/25/2013
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Application #:
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11677487
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Filing Dt:
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02/21/2007
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Publication #:
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Pub Dt:
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08/23/2007
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH L-SHAPED LEADFINGERS
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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11687357
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Filing Dt:
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03/16/2007
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Publication #:
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Pub Dt:
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09/18/2008
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING MULTI-PACKAGE MODULE TECHNIQUES
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Patent #:
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Issue Dt:
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03/12/2013
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Application #:
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11769296
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Filing Dt:
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06/27/2007
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Publication #:
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Pub Dt:
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01/01/2009
| | | | |
Title:
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CIRCUIT SYSTEM WITH CIRCUIT ELEMENT AND REFERENCE PLANE
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Patent #:
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Issue Dt:
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07/23/2013
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Application #:
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11769520
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Filing Dt:
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06/27/2007
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Publication #:
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Pub Dt:
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01/01/2009
| | | | |
Title:
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PACKAGING SYSTEM WITH HOLLOW PACKAGE AND METHOD FOR THE SAME
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Patent #:
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Issue Dt:
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01/28/2014
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Application #:
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11773886
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Filing Dt:
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07/05/2007
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Publication #:
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Pub Dt:
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01/08/2009
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FLEX BUMP
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Patent #:
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Issue Dt:
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04/16/2013
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Application #:
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11856841
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Filing Dt:
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09/18/2007
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Publication #:
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Pub Dt:
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03/19/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EXTERNAL INTERCONNECTS AT HIGH DENSITY
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Patent #:
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Issue Dt:
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08/13/2013
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Application #:
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11952968
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Filing Dt:
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12/07/2007
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Publication #:
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Pub Dt:
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06/11/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SHIELD
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Patent #:
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Issue Dt:
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09/17/2013
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Application #:
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11954601
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Filing Dt:
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12/12/2007
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Publication #:
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Pub Dt:
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06/18/2009
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Title:
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MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOUNTABLE INTEGRATED CIRCUIT DIE
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Patent #:
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Issue Dt:
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08/06/2013
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Application #:
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11965550
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Filing Dt:
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12/27/2007
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Publication #:
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Pub Dt:
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07/02/2009
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EXTENDED CORNER LEADS
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Patent #:
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Issue Dt:
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12/31/2013
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Application #:
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12022296
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Filing Dt:
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01/30/2008
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Publication #:
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Pub Dt:
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07/30/2009
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WAFER SCALE HEAT SLUG
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Patent #:
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Issue Dt:
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11/06/2012
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Application #:
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12037343
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Filing Dt:
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02/26/2008
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Publication #:
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Pub Dt:
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08/27/2009
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OVERHANG FILM
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Patent #:
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Issue Dt:
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12/10/2013
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Application #:
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12051246
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Filing Dt:
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03/19/2008
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Publication #:
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Pub Dt:
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09/24/2009
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Title:
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FLIP CHIP INTERCONNECTION SYSTEM HAVING SOLDER POSITION CONTROL MECHANISM
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Patent #:
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Issue Dt:
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01/07/2014
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Application #:
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12055665
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Filing Dt:
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03/26/2008
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Publication #:
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Pub Dt:
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10/01/2009
| | | | |
Title:
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MOCK BUMP SYSTEM FOR FLIP CHIP INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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12057360
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Filing Dt:
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03/27/2008
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Publication #:
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Pub Dt:
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10/23/2008
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM FOR PACKAGE STACKING AND METHOD OF MANUFACTURE THEREFOR
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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12059077
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Filing Dt:
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03/31/2008
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Publication #:
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Pub Dt:
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07/31/2008
| | | | |
Title:
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SEMICONDUCTOR MULTI-PACKAGE MODULE INCLUDING TAPE SUBSTRATE LAND GRID ARRAY PACKAGE STACKED OVER BALL GRID ARRAY PACKAGE
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Patent #:
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Issue Dt:
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01/15/2013
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Application #:
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12060115
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Filing Dt:
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03/31/2008
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Publication #:
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Pub Dt:
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10/01/2009
| | | | |
Title:
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METHOD AND APPARATUS FOR A PACKAGE HAVING MULTIPLE STACKED DIE
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Patent #:
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Issue Dt:
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10/29/2013
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Application #:
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12166169
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Filing Dt:
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07/01/2008
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Publication #:
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Pub Dt:
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01/07/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEAD-FRAME PADDLE SCHEME FOR SINGLE AXIS PARTIAL SAW ISOLATION
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Patent #:
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Issue Dt:
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06/04/2013
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Application #:
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12168803
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Filing Dt:
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07/07/2008
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Publication #:
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Pub Dt:
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01/07/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH BUMPED LEAD AND NONBUMPED LEAD
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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12184219
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Filing Dt:
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07/31/2008
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Publication #:
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Pub Dt:
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10/01/2009
| | | | |
Title:
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MOCK BUMP SYSTEM FOR FLIP CHIP INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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11/06/2012
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Application #:
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12185061
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Filing Dt:
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08/01/2008
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Publication #:
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Pub Dt:
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02/04/2010
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Title:
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FAN-IN INTERPOSER ON LEAD FRAME FOR AN INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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08/20/2013
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Application #:
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12193540
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Filing Dt:
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08/18/2008
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Publication #:
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Pub Dt:
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02/18/2010
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Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM
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Patent #:
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|
Issue Dt:
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09/10/2013
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Application #:
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12236445
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Filing Dt:
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09/23/2008
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Publication #:
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Pub Dt:
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03/25/2010
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Title:
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PLANAR ENCAPSULATION AND MOLD CAVITY PACKAGE IN PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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01/29/2013
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Application #:
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12328764
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Filing Dt:
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12/04/2008
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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WIRE-ON-LEAD PACKAGE SYSTEM HAVING LEADFINGERS POSITIONED BETWEEN PADDLE EXTENSIONS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/26/2013
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Application #:
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12331341
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Filing Dt:
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12/09/2008
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Publication #:
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Pub Dt:
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06/10/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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01/07/2014
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Application #:
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12408670
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Filing Dt:
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03/20/2009
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Publication #:
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Pub Dt:
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09/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTERPOSER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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10/01/2013
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Application #:
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12410213
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Filing Dt:
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03/24/2009
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Publication #:
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Pub Dt:
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03/25/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A WAFER LEVEL PACKAGE WITH TOP AND BOTTOM SOLDER BUMP INTERCONNECTION
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Patent #:
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Issue Dt:
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03/26/2013
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Application #:
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12410983
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Filing Dt:
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03/25/2009
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Publication #:
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Pub Dt:
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09/30/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED CONFIGURATION AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/27/2013
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Application #:
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12411390
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Filing Dt:
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03/25/2009
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Publication #:
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Pub Dt:
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09/30/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTI-STACKED FLIP CHIPS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/09/2013
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Application #:
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12412315
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Filing Dt:
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03/26/2009
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Publication #:
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Pub Dt:
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09/30/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT SPREADER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/23/2013
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Application #:
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12484158
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Filing Dt:
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06/12/2009
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Publication #:
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Pub Dt:
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12/16/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A STACK PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/16/2013
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Application #:
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12489122
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Filing Dt:
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06/22/2009
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Publication #:
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Pub Dt:
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12/23/2010
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH UNDERFILL AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/27/2013
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Application #:
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12489177
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Filing Dt:
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06/22/2009
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Publication #:
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Pub Dt:
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12/23/2010
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED HEAT SPREADER FRAME WITH EMBEDDED SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
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02/05/2013
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Application #:
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12537824
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Filing Dt:
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08/07/2009
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Publication #:
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Pub Dt:
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02/10/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING CAVITY IN BUILD-UP INTERCONNECT STRUCTURE FOR SHORT SIGNAL PATH BETWEEN DIE
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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12544578
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Filing Dt:
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08/20/2009
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Publication #:
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Pub Dt:
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12/17/2009
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM
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Patent #:
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Issue Dt:
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12/18/2012
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Application #:
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12562874
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Filing Dt:
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09/18/2009
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Publication #:
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Pub Dt:
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03/24/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH QUAD FLAT NO-LEAD PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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09/17/2013
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Application #:
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12564852
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Filing Dt:
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09/22/2009
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Publication #:
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Pub Dt:
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03/24/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CAP LAYER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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03/05/2013
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Application #:
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12582582
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Filing Dt:
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10/20/2009
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Publication #:
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Pub Dt:
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04/21/2011
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Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CAVITY AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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09/10/2013
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Application #:
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12605292
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Filing Dt:
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10/23/2009
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Publication #:
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Pub Dt:
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04/28/2011
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SHIELDING LAYER OVER A SEMICONDUCTOR DIE DISPOSED IN A CAVITY OF AN INTERCONNECT STRUCTURE AND GROUNDED THROUGH THE DIE TSV
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Patent #:
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Issue Dt:
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12/31/2013
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Application #:
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12612603
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Filing Dt:
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11/04/2009
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Publication #:
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Pub Dt:
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02/25/2010
| | | | |
Title:
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STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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11/06/2012
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Application #:
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12618417
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Filing Dt:
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11/13/2009
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Publication #:
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Pub Dt:
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05/19/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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12/18/2012
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Application #:
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12629877
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Filing Dt:
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12/02/2009
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Publication #:
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Pub Dt:
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06/02/2011
| | | | |
Title:
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PACKAGE SYSTEM WITH A SHIELDED INVERTED INTERNAL STACKING MODULE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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08/27/2013
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Application #:
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12629881
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Filing Dt:
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12/02/2009
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Publication #:
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Pub Dt:
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06/02/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKABLE PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
01/01/2013
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Application #:
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12636696
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Filing Dt:
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12/11/2009
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Publication #:
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Pub Dt:
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06/16/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
11/06/2012
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Application #:
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12636703
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Filing Dt:
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12/11/2009
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Publication #:
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Pub Dt:
|
06/16/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELDED PACKAGE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
03/26/2013
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Application #:
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12636779
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Filing Dt:
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12/13/2009
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Publication #:
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Pub Dt:
|
06/16/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
11/06/2012
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Application #:
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12637746
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Filing Dt:
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12/14/2009
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Publication #:
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Pub Dt:
|
06/16/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BOND WIRE PADS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
03/05/2013
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Application #:
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12639984
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Filing Dt:
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12/16/2009
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Publication #:
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Pub Dt:
|
06/16/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKING INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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|
Issue Dt:
|
07/02/2013
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Application #:
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12639997
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Filing Dt:
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12/17/2009
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Publication #:
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Pub Dt:
|
06/23/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EMBEDDED INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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02/05/2013
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Application #:
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12699431
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Filing Dt:
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02/03/2010
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Publication #:
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Pub Dt:
|
08/04/2011
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING AIR GAP ADJACENT TO STRESS SENSITIVE REGION OF THE DIE
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Patent #:
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Issue Dt:
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11/13/2012
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Application #:
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12704366
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Filing Dt:
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02/11/2010
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Publication #:
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|
Pub Dt:
|
06/10/2010
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD FOR FORMING PASSIVE CIRCUIT ELEMENTS WITH THROUGH SILICON VIAS TO BACKSIDE INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
|
07/30/2013
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Application #:
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12710359
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Filing Dt:
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02/22/2010
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Publication #:
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|
Pub Dt:
|
08/25/2011
| | | | |
Title:
|
SEMICONDUCTOR PACKAGING SYSTEM WITH AN ALIGNED INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
11/20/2012
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Application #:
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12711250
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Filing Dt:
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02/23/2010
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Publication #:
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|
Pub Dt:
|
08/25/2011
| | | | |
Title:
|
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELD AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
01/07/2014
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Application #:
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12714431
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Filing Dt:
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02/26/2010
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Publication #:
|
|
Pub Dt:
|
09/01/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATED CONNECTOR AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
04/16/2013
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Application #:
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12716271
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Filing Dt:
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03/02/2010
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Publication #:
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Pub Dt:
|
09/08/2011
| | | | |
Title:
|
CIRCUIT SYSTEM WITH LEADS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/16/2013
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Application #:
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12717085
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Filing Dt:
|
03/03/2010
|
Publication #:
|
|
Pub Dt:
|
09/09/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FLEX TAPE AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
04/02/2013
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Application #:
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12720057
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Filing Dt:
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03/09/2010
|
Publication #:
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|
Pub Dt:
|
09/15/2011
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER AROUND SEMICONDUCTOR DIE
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Patent #:
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Issue Dt:
|
09/24/2013
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Application #:
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12720667
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Filing Dt:
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03/09/2010
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Publication #:
|
|
Pub Dt:
|
09/15/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VIA AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
01/21/2014
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Application #:
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12723596
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Filing Dt:
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03/12/2010
|
Publication #:
|
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Pub Dt:
|
07/08/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREOF
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|
Patent #:
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|
Issue Dt:
|
04/16/2013
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Application #:
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12726342
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Filing Dt:
|
03/17/2010
|
Publication #:
|
|
Pub Dt:
|
09/22/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BUMP CONTACT ON PACKAGE LEADS AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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|
Issue Dt:
|
11/06/2012
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Application #:
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12729204
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Filing Dt:
|
03/22/2010
|
Publication #:
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|
Pub Dt:
|
07/15/2010
| | | | |
Title:
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SEMICONDUCTOR PACKAGE SYSTEM WITH THERMAL DIE BONDING
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Patent #:
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Issue Dt:
|
10/29/2013
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Application #:
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12729841
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Filing Dt:
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03/23/2010
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Publication #:
|
|
Pub Dt:
|
09/29/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
09/03/2013
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Application #:
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12731330
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Filing Dt:
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03/25/2010
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Publication #:
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|
Pub Dt:
|
07/15/2010
| | | | |
Title:
|
FUSIBLE I/O INTERCONNECTION SYSTEMS AND METHODS FOR FLIP-CHIP PACKAGING INVOLVING SUBSTRATE-MOUNTED STUD BUMPS
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Patent #:
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Issue Dt:
|
07/23/2013
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Application #:
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12731472
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Filing Dt:
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03/25/2010
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Publication #:
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|
Pub Dt:
|
09/29/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADFRAME AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
02/19/2013
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Application #:
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12731870
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Filing Dt:
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03/25/2010
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Publication #:
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|
Pub Dt:
|
09/29/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKING OPTION AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
11/06/2012
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Application #:
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12748335
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Filing Dt:
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03/26/2010
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Publication #:
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|
Pub Dt:
|
09/29/2011
| | | | |
Title:
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INTEGRATED CIRCUIT SYSTEM WITH STRESS REDISTRIBUTION LAYER AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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11/27/2012
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Application #:
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12757889
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Filing Dt:
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04/09/2010
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Publication #:
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Pub Dt:
|
08/23/2012
| | | | |
Title:
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FLIP CHIP INTERCONNECTION HAVING NARROW INTERCONNECTION SITES ON THE SUBSTRATE
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Patent #:
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Issue Dt:
|
11/05/2013
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Application #:
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12760428
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Filing Dt:
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04/14/2010
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Publication #:
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Pub Dt:
|
10/20/2011
| | | | |
Title:
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Semiconductor Device and Method of Forming Electrical Interconnection Between Semiconductor Die and Substrate with Continuous Body of Solder Tape
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|
Patent #:
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Issue Dt:
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02/05/2013
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Application #:
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12764805
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Filing Dt:
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04/21/2010
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Publication #:
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Pub Dt:
|
10/27/2011
| | | | |
Title:
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SEMICONDUCTOR METHOD OF FORMING BUMP ON SUBSTRATE TO PREVENT ELK ILD DELAMINATION DURING REFLOW PROCESS
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Patent #:
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Issue Dt:
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03/19/2013
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Application #:
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12768177
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Filing Dt:
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04/27/2010
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Publication #:
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Pub Dt:
|
10/27/2011
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING ADJACENT CHANNEL AND DAM MATERIAL AROUND DIE ATTACH AREA OF SUBSTRATE TO CONTROL OUTWARD FLOW OF UNDERFILL MATERIAL
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Patent #:
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Issue Dt:
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09/03/2013
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Application #:
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12771833
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Filing Dt:
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04/30/2010
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Publication #:
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Pub Dt:
|
11/03/2011
| | | | |
Title:
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Semiconductor Device and Method of Forming Protective Coating Material Over Semiconductor Wafer to Reduce Lamination Tape Residue
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Patent #:
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Issue Dt:
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07/23/2013
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Application #:
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12775324
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Filing Dt:
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05/06/2010
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Publication #:
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Pub Dt:
|
08/26/2010
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH VIAS WITH REFLOWED CONDUCTIVE MATERIAL
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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12775338
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Filing Dt:
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05/06/2010
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Publication #:
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Pub Dt:
|
08/26/2010
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH VIAS WITH REFLOWED CONDUCTIVE MATERIAL
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Patent #:
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Issue Dt:
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12/10/2013
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Application #:
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12777415
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Filing Dt:
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05/11/2010
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Publication #:
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Pub Dt:
|
11/18/2010
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH REINFORCED ENCAPSULANT HAVING EMBEDDED INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
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04/16/2013
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Application #:
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12781772
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Filing Dt:
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05/17/2010
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Publication #:
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Pub Dt:
|
09/09/2010
| | | | |
Title:
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INTEGRATED CIRCUIT HEAT SPREADER STACKING SYSTEM
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Patent #:
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Issue Dt:
|
04/16/2013
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Application #:
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12785951
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Filing Dt:
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05/24/2010
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Publication #:
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Pub Dt:
|
11/24/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL SIDE CONNECTION AND METHOD OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
06/04/2013
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Application #:
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12789077
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Filing Dt:
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05/27/2010
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Publication #:
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|
Pub Dt:
|
12/01/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTIPLE ROW LEADS AND METHOD OF MANUFACTURE THEREOF
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|
|
Patent #:
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|
Issue Dt:
|
07/09/2013
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Application #:
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12789203
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Filing Dt:
|
05/27/2010
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Publication #:
|
|
Pub Dt:
|
12/01/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL SIDE CONNECTION AND METHOD OF MANUFACTURE THEREOF
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|
Patent #:
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|
Issue Dt:
|
09/24/2013
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Application #:
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12791867
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Filing Dt:
|
06/02/2010
|
Publication #:
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|
Pub Dt:
|
12/08/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
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|
Patent #:
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|
Issue Dt:
|
08/06/2013
|
Application #:
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12813315
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Filing Dt:
|
06/10/2010
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Publication #:
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Pub Dt:
|
09/30/2010
| | | | |
Title:
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SYSTEM-IN-PACKAGE HAVING INTEGRATED PASSIVE DEVICES AND METHOD THEREFOR
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|
|
Patent #:
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|
Issue Dt:
|
11/12/2013
|
Application #:
|
12818750
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Filing Dt:
|
06/18/2010
|
Publication #:
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|
Pub Dt:
|
12/22/2011
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADFRAME AND METHOD OF MANUFACTURE THEREOF
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|
Patent #:
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|
Issue Dt:
|
11/06/2012
|
Application #:
|
12821404
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Filing Dt:
|
06/23/2010
|
Publication #:
|
|
Pub Dt:
|
12/29/2011
| | | | |
Title:
|
SEMICONDUCTOR PACKAGING SYSTEM WITH MULTIPART CONDUCTIVE PILLARS AND METHOD OF MANUFACTURE THEREOF
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|