skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:052850/0237   Pages: 31
Recorded: 06/05/2020
Attorney Dkt #:2515.5050
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 250
Page 1 of 3
Pages: 1 2 3
1
Patent #:
Issue Dt:
09/17/2013
Application #:
11007896
Filing Dt:
12/08/2004
Publication #:
Pub Dt:
12/01/2005
Title:
INTEGRATED CIRCUIT LEADFRAME AND FABRICATION METHOD THEREFOR
2
Patent #:
Issue Dt:
09/17/2013
Application #:
11163035
Filing Dt:
10/03/2005
Publication #:
Pub Dt:
04/05/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTI-SURFACE DIE ATTACH PAD
3
Patent #:
Issue Dt:
11/26/2013
Application #:
11163116
Filing Dt:
10/05/2005
Publication #:
Pub Dt:
04/05/2007
Title:
ULTRA-THIN WAFER SYSTEM AND METHOD OF MANUFACTURE THEREOF
4
Patent #:
Issue Dt:
12/18/2012
Application #:
11163156
Filing Dt:
10/07/2005
Publication #:
Pub Dt:
04/12/2007
Title:
WAFER LEVEL LASER MARKING SYSTEM FOR ULTRA-THIN WAFERS USING SUPPORT TAPE
5
Patent #:
Issue Dt:
03/19/2013
Application #:
11164335
Filing Dt:
11/18/2005
Publication #:
Pub Dt:
05/24/2007
Title:
NON-LEADED INTEGRATED CIRCUIT PACKAGE SYSTEM
6
Patent #:
Issue Dt:
08/20/2013
Application #:
11276645
Filing Dt:
03/08/2006
Publication #:
Pub Dt:
09/13/2007
Title:
INTEGRATED CIRCUIT LEADED STACKED PACKAGE SYSTEM
7
Patent #:
Issue Dt:
02/05/2013
Application #:
11276942
Filing Dt:
03/17/2006
Publication #:
Pub Dt:
09/20/2007
Title:
INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
8
Patent #:
Issue Dt:
03/12/2013
Application #:
11278008
Filing Dt:
03/30/2006
Publication #:
Pub Dt:
10/11/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEATSPREADER
9
Patent #:
Issue Dt:
04/02/2013
Application #:
11330930
Filing Dt:
01/11/2006
Publication #:
Pub Dt:
07/12/2007
Title:
INTER-STACKING MODULE SYSTEM
10
Patent #:
Issue Dt:
01/14/2014
Application #:
11339176
Filing Dt:
01/23/2006
Publication #:
Pub Dt:
07/26/2007
Title:
PADLESS DIE SUPPORT INTEGRATED CIRCUIT PACKAGE SYSTEM
11
Patent #:
Issue Dt:
10/01/2013
Application #:
11379336
Filing Dt:
04/19/2006
Publication #:
Pub Dt:
10/25/2007
Title:
EMBEDDED INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM
12
Patent #:
Issue Dt:
03/12/2013
Application #:
11382983
Filing Dt:
05/12/2006
Publication #:
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE TO PACKAGE STACKING SYSTEM
13
Patent #:
Issue Dt:
11/12/2013
Application #:
11456554
Filing Dt:
07/10/2006
Publication #:
Pub Dt:
01/10/2008
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ULTRA-THIN DIE
14
Patent #:
Issue Dt:
04/30/2013
Application #:
11462607
Filing Dt:
08/04/2006
Publication #:
Pub Dt:
02/07/2008
Title:
STACKABLE MULTI-CHIP PACKAGE SYSTEM
15
Patent #:
Issue Dt:
01/21/2014
Application #:
11465769
Filing Dt:
08/18/2006
Publication #:
Pub Dt:
03/20/2008
Title:
WORKPIECE DISPLACEMENT SYSTEM
16
Patent #:
Issue Dt:
02/04/2014
Application #:
11536502
Filing Dt:
09/28/2006
Publication #:
Pub Dt:
04/03/2008
Title:
DUAL-DIE PACKAGE STRUCTURE HAVING DIES EXTERNALLY AND SIMULTANEOUSLY CONNECTED VIA BUMP ELECTRODES AND BOND WIRES
17
Patent #:
Issue Dt:
11/06/2012
Application #:
11608826
Filing Dt:
12/09/2006
Publication #:
Pub Dt:
06/12/2008
Title:
STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM
18
Patent #:
Issue Dt:
04/16/2013
Application #:
11610401
Filing Dt:
12/13/2006
Publication #:
Pub Dt:
06/19/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING A SUPPORT STRUCTURE WITH A RECESS
19
Patent #:
Issue Dt:
11/26/2013
Application #:
11673558
Filing Dt:
02/09/2007
Publication #:
Pub Dt:
08/14/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH BUMP OVER VIA
20
Patent #:
Issue Dt:
06/25/2013
Application #:
11677487
Filing Dt:
02/21/2007
Publication #:
Pub Dt:
08/23/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH L-SHAPED LEADFINGERS
21
Patent #:
Issue Dt:
12/17/2013
Application #:
11687357
Filing Dt:
03/16/2007
Publication #:
Pub Dt:
09/18/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING MULTI-PACKAGE MODULE TECHNIQUES
22
Patent #:
Issue Dt:
03/12/2013
Application #:
11769296
Filing Dt:
06/27/2007
Publication #:
Pub Dt:
01/01/2009
Title:
CIRCUIT SYSTEM WITH CIRCUIT ELEMENT AND REFERENCE PLANE
23
Patent #:
Issue Dt:
07/23/2013
Application #:
11769520
Filing Dt:
06/27/2007
Publication #:
Pub Dt:
01/01/2009
Title:
PACKAGING SYSTEM WITH HOLLOW PACKAGE AND METHOD FOR THE SAME
24
Patent #:
Issue Dt:
01/28/2014
Application #:
11773886
Filing Dt:
07/05/2007
Publication #:
Pub Dt:
01/08/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH FLEX BUMP
25
Patent #:
Issue Dt:
04/16/2013
Application #:
11856841
Filing Dt:
09/18/2007
Publication #:
Pub Dt:
03/19/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EXTERNAL INTERCONNECTS AT HIGH DENSITY
26
Patent #:
Issue Dt:
08/13/2013
Application #:
11952968
Filing Dt:
12/07/2007
Publication #:
Pub Dt:
06/11/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SHIELD
27
Patent #:
Issue Dt:
09/17/2013
Application #:
11954601
Filing Dt:
12/12/2007
Publication #:
Pub Dt:
06/18/2009
Title:
MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOUNTABLE INTEGRATED CIRCUIT DIE
28
Patent #:
Issue Dt:
08/06/2013
Application #:
11965550
Filing Dt:
12/27/2007
Publication #:
Pub Dt:
07/02/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EXTENDED CORNER LEADS
29
Patent #:
Issue Dt:
12/31/2013
Application #:
12022296
Filing Dt:
01/30/2008
Publication #:
Pub Dt:
07/30/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WAFER SCALE HEAT SLUG
30
Patent #:
Issue Dt:
11/06/2012
Application #:
12037343
Filing Dt:
02/26/2008
Publication #:
Pub Dt:
08/27/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OVERHANG FILM
31
Patent #:
Issue Dt:
12/10/2013
Application #:
12051246
Filing Dt:
03/19/2008
Publication #:
Pub Dt:
09/24/2009
Title:
FLIP CHIP INTERCONNECTION SYSTEM HAVING SOLDER POSITION CONTROL MECHANISM
32
Patent #:
Issue Dt:
01/07/2014
Application #:
12055665
Filing Dt:
03/26/2008
Publication #:
Pub Dt:
10/01/2009
Title:
MOCK BUMP SYSTEM FOR FLIP CHIP INTEGRATED CIRCUITS
33
Patent #:
Issue Dt:
04/02/2013
Application #:
12057360
Filing Dt:
03/27/2008
Publication #:
Pub Dt:
10/23/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR PACKAGE STACKING AND METHOD OF MANUFACTURE THEREFOR
34
Patent #:
Issue Dt:
04/02/2013
Application #:
12059077
Filing Dt:
03/31/2008
Publication #:
Pub Dt:
07/31/2008
Title:
SEMICONDUCTOR MULTI-PACKAGE MODULE INCLUDING TAPE SUBSTRATE LAND GRID ARRAY PACKAGE STACKED OVER BALL GRID ARRAY PACKAGE
35
Patent #:
Issue Dt:
01/15/2013
Application #:
12060115
Filing Dt:
03/31/2008
Publication #:
Pub Dt:
10/01/2009
Title:
METHOD AND APPARATUS FOR A PACKAGE HAVING MULTIPLE STACKED DIE
36
Patent #:
Issue Dt:
10/29/2013
Application #:
12166169
Filing Dt:
07/01/2008
Publication #:
Pub Dt:
01/07/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEAD-FRAME PADDLE SCHEME FOR SINGLE AXIS PARTIAL SAW ISOLATION
37
Patent #:
Issue Dt:
06/04/2013
Application #:
12168803
Filing Dt:
07/07/2008
Publication #:
Pub Dt:
01/07/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH BUMPED LEAD AND NONBUMPED LEAD
38
Patent #:
Issue Dt:
01/21/2014
Application #:
12184219
Filing Dt:
07/31/2008
Publication #:
Pub Dt:
10/01/2009
Title:
MOCK BUMP SYSTEM FOR FLIP CHIP INTEGRATED CIRCUITS
39
Patent #:
Issue Dt:
11/06/2012
Application #:
12185061
Filing Dt:
08/01/2008
Publication #:
Pub Dt:
02/04/2010
Title:
FAN-IN INTERPOSER ON LEAD FRAME FOR AN INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
40
Patent #:
Issue Dt:
08/20/2013
Application #:
12193540
Filing Dt:
08/18/2008
Publication #:
Pub Dt:
02/18/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
41
Patent #:
Issue Dt:
09/10/2013
Application #:
12236445
Filing Dt:
09/23/2008
Publication #:
Pub Dt:
03/25/2010
Title:
PLANAR ENCAPSULATION AND MOLD CAVITY PACKAGE IN PACKAGE SYSTEM
42
Patent #:
Issue Dt:
01/29/2013
Application #:
12328764
Filing Dt:
12/04/2008
Publication #:
Pub Dt:
06/10/2010
Title:
WIRE-ON-LEAD PACKAGE SYSTEM HAVING LEADFINGERS POSITIONED BETWEEN PADDLE EXTENSIONS AND METHOD OF MANUFACTURE THEREOF
43
Patent #:
Issue Dt:
03/26/2013
Application #:
12331341
Filing Dt:
12/09/2008
Publication #:
Pub Dt:
06/10/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM AND METHOD OF MANUFACTURE THEREOF
44
Patent #:
Issue Dt:
01/07/2014
Application #:
12408670
Filing Dt:
03/20/2009
Publication #:
Pub Dt:
09/23/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH AN INTERPOSER AND METHOD OF MANUFACTURE THEREOF
45
Patent #:
Issue Dt:
10/01/2013
Application #:
12410213
Filing Dt:
03/24/2009
Publication #:
Pub Dt:
03/25/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A WAFER LEVEL PACKAGE WITH TOP AND BOTTOM SOLDER BUMP INTERCONNECTION
46
Patent #:
Issue Dt:
03/26/2013
Application #:
12410983
Filing Dt:
03/25/2009
Publication #:
Pub Dt:
09/30/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED CONFIGURATION AND METHOD OF MANUFACTURE THEREOF
47
Patent #:
Issue Dt:
08/27/2013
Application #:
12411390
Filing Dt:
03/25/2009
Publication #:
Pub Dt:
09/30/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTI-STACKED FLIP CHIPS AND METHOD OF MANUFACTURE THEREOF
48
Patent #:
Issue Dt:
04/09/2013
Application #:
12412315
Filing Dt:
03/26/2009
Publication #:
Pub Dt:
09/30/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH HEAT SPREADER AND METHOD OF MANUFACTURE THEREOF
49
Patent #:
Issue Dt:
04/23/2013
Application #:
12484158
Filing Dt:
06/12/2009
Publication #:
Pub Dt:
12/16/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A STACK PACKAGE AND METHOD OF MANUFACTURE THEREOF
50
Patent #:
Issue Dt:
04/16/2013
Application #:
12489122
Filing Dt:
06/22/2009
Publication #:
Pub Dt:
12/23/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH UNDERFILL AND METHOD OF MANUFACTURE THEREOF
51
Patent #:
Issue Dt:
08/27/2013
Application #:
12489177
Filing Dt:
06/22/2009
Publication #:
Pub Dt:
12/23/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED HEAT SPREADER FRAME WITH EMBEDDED SEMICONDUCTOR DIE
52
Patent #:
Issue Dt:
02/05/2013
Application #:
12537824
Filing Dt:
08/07/2009
Publication #:
Pub Dt:
02/10/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CAVITY IN BUILD-UP INTERCONNECT STRUCTURE FOR SHORT SIGNAL PATH BETWEEN DIE
53
Patent #:
Issue Dt:
04/02/2013
Application #:
12544578
Filing Dt:
08/20/2009
Publication #:
Pub Dt:
12/17/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
54
Patent #:
Issue Dt:
12/18/2012
Application #:
12562874
Filing Dt:
09/18/2009
Publication #:
Pub Dt:
03/24/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH QUAD FLAT NO-LEAD PACKAGE AND METHOD OF MANUFACTURE THEREOF
55
Patent #:
Issue Dt:
09/17/2013
Application #:
12564852
Filing Dt:
09/22/2009
Publication #:
Pub Dt:
03/24/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CAP LAYER AND METHOD OF MANUFACTURE THEREOF
56
Patent #:
Issue Dt:
03/05/2013
Application #:
12582582
Filing Dt:
10/20/2009
Publication #:
Pub Dt:
04/21/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CAVITY AND METHOD OF MANUFACTURE THEREOF
57
Patent #:
Issue Dt:
09/10/2013
Application #:
12605292
Filing Dt:
10/23/2009
Publication #:
Pub Dt:
04/28/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SHIELDING LAYER OVER A SEMICONDUCTOR DIE DISPOSED IN A CAVITY OF AN INTERCONNECT STRUCTURE AND GROUNDED THROUGH THE DIE TSV
58
Patent #:
Issue Dt:
12/31/2013
Application #:
12612603
Filing Dt:
11/04/2009
Publication #:
Pub Dt:
02/25/2010
Title:
STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREOF
59
Patent #:
Issue Dt:
11/06/2012
Application #:
12618417
Filing Dt:
11/13/2009
Publication #:
Pub Dt:
05/19/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
60
Patent #:
Issue Dt:
12/18/2012
Application #:
12629877
Filing Dt:
12/02/2009
Publication #:
Pub Dt:
06/02/2011
Title:
PACKAGE SYSTEM WITH A SHIELDED INVERTED INTERNAL STACKING MODULE AND METHOD OF MANUFACTURE THEREOF
61
Patent #:
Issue Dt:
08/27/2013
Application #:
12629881
Filing Dt:
12/02/2009
Publication #:
Pub Dt:
06/02/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKABLE PACKAGE AND METHOD OF MANUFACTURE THEREOF
62
Patent #:
Issue Dt:
01/01/2013
Application #:
12636696
Filing Dt:
12/11/2009
Publication #:
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
63
Patent #:
Issue Dt:
11/06/2012
Application #:
12636703
Filing Dt:
12/11/2009
Publication #:
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELDED PACKAGE AND METHOD OF MANUFACTURE THEREOF
64
Patent #:
Issue Dt:
03/26/2013
Application #:
12636779
Filing Dt:
12/13/2009
Publication #:
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
65
Patent #:
Issue Dt:
11/06/2012
Application #:
12637746
Filing Dt:
12/14/2009
Publication #:
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BOND WIRE PADS AND METHOD OF MANUFACTURE THEREOF
66
Patent #:
Issue Dt:
03/05/2013
Application #:
12639984
Filing Dt:
12/16/2009
Publication #:
Pub Dt:
06/16/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKING INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
67
Patent #:
Issue Dt:
07/02/2013
Application #:
12639997
Filing Dt:
12/17/2009
Publication #:
Pub Dt:
06/23/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EMBEDDED INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
68
Patent #:
Issue Dt:
02/05/2013
Application #:
12699431
Filing Dt:
02/03/2010
Publication #:
Pub Dt:
08/04/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING AIR GAP ADJACENT TO STRESS SENSITIVE REGION OF THE DIE
69
Patent #:
Issue Dt:
11/13/2012
Application #:
12704366
Filing Dt:
02/11/2010
Publication #:
Pub Dt:
06/10/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING PASSIVE CIRCUIT ELEMENTS WITH THROUGH SILICON VIAS TO BACKSIDE INTERCONNECT STRUCTURES
70
Patent #:
Issue Dt:
07/30/2013
Application #:
12710359
Filing Dt:
02/22/2010
Publication #:
Pub Dt:
08/25/2011
Title:
SEMICONDUCTOR PACKAGING SYSTEM WITH AN ALIGNED INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
71
Patent #:
Issue Dt:
11/20/2012
Application #:
12711250
Filing Dt:
02/23/2010
Publication #:
Pub Dt:
08/25/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELD AND METHOD OF MANUFACTURE THEREOF
72
Patent #:
Issue Dt:
01/07/2014
Application #:
12714431
Filing Dt:
02/26/2010
Publication #:
Pub Dt:
09/01/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATED CONNECTOR AND METHOD OF MANUFACTURE THEREOF
73
Patent #:
Issue Dt:
04/16/2013
Application #:
12716271
Filing Dt:
03/02/2010
Publication #:
Pub Dt:
09/08/2011
Title:
CIRCUIT SYSTEM WITH LEADS AND METHOD OF MANUFACTURE THEREOF
74
Patent #:
Issue Dt:
04/16/2013
Application #:
12717085
Filing Dt:
03/03/2010
Publication #:
Pub Dt:
09/09/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FLEX TAPE AND METHOD OF MANUFACTURE THEREOF
75
Patent #:
Issue Dt:
04/02/2013
Application #:
12720057
Filing Dt:
03/09/2010
Publication #:
Pub Dt:
09/15/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER AROUND SEMICONDUCTOR DIE
76
Patent #:
Issue Dt:
09/24/2013
Application #:
12720667
Filing Dt:
03/09/2010
Publication #:
Pub Dt:
09/15/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VIA AND METHOD OF MANUFACTURE THEREOF
77
Patent #:
Issue Dt:
01/21/2014
Application #:
12723596
Filing Dt:
03/12/2010
Publication #:
Pub Dt:
07/08/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREOF
78
Patent #:
Issue Dt:
04/16/2013
Application #:
12726342
Filing Dt:
03/17/2010
Publication #:
Pub Dt:
09/22/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BUMP CONTACT ON PACKAGE LEADS AND METHOD OF MANUFACTURE THEREOF
79
Patent #:
Issue Dt:
11/06/2012
Application #:
12729204
Filing Dt:
03/22/2010
Publication #:
Pub Dt:
07/15/2010
Title:
SEMICONDUCTOR PACKAGE SYSTEM WITH THERMAL DIE BONDING
80
Patent #:
Issue Dt:
10/29/2013
Application #:
12729841
Filing Dt:
03/23/2010
Publication #:
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF
81
Patent #:
Issue Dt:
09/03/2013
Application #:
12731330
Filing Dt:
03/25/2010
Publication #:
Pub Dt:
07/15/2010
Title:
FUSIBLE I/O INTERCONNECTION SYSTEMS AND METHODS FOR FLIP-CHIP PACKAGING INVOLVING SUBSTRATE-MOUNTED STUD BUMPS
82
Patent #:
Issue Dt:
07/23/2013
Application #:
12731472
Filing Dt:
03/25/2010
Publication #:
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADFRAME AND METHOD OF MANUFACTURE THEREOF
83
Patent #:
Issue Dt:
02/19/2013
Application #:
12731870
Filing Dt:
03/25/2010
Publication #:
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKING OPTION AND METHOD OF MANUFACTURE THEREOF
84
Patent #:
Issue Dt:
11/06/2012
Application #:
12748335
Filing Dt:
03/26/2010
Publication #:
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT SYSTEM WITH STRESS REDISTRIBUTION LAYER AND METHOD OF MANUFACTURE THEREOF
85
Patent #:
Issue Dt:
11/27/2012
Application #:
12757889
Filing Dt:
04/09/2010
Publication #:
Pub Dt:
08/23/2012
Title:
FLIP CHIP INTERCONNECTION HAVING NARROW INTERCONNECTION SITES ON THE SUBSTRATE
86
Patent #:
Issue Dt:
11/05/2013
Application #:
12760428
Filing Dt:
04/14/2010
Publication #:
Pub Dt:
10/20/2011
Title:
Semiconductor Device and Method of Forming Electrical Interconnection Between Semiconductor Die and Substrate with Continuous Body of Solder Tape
87
Patent #:
Issue Dt:
02/05/2013
Application #:
12764805
Filing Dt:
04/21/2010
Publication #:
Pub Dt:
10/27/2011
Title:
SEMICONDUCTOR METHOD OF FORMING BUMP ON SUBSTRATE TO PREVENT ELK ILD DELAMINATION DURING REFLOW PROCESS
88
Patent #:
Issue Dt:
03/19/2013
Application #:
12768177
Filing Dt:
04/27/2010
Publication #:
Pub Dt:
10/27/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING ADJACENT CHANNEL AND DAM MATERIAL AROUND DIE ATTACH AREA OF SUBSTRATE TO CONTROL OUTWARD FLOW OF UNDERFILL MATERIAL
89
Patent #:
Issue Dt:
09/03/2013
Application #:
12771833
Filing Dt:
04/30/2010
Publication #:
Pub Dt:
11/03/2011
Title:
Semiconductor Device and Method of Forming Protective Coating Material Over Semiconductor Wafer to Reduce Lamination Tape Residue
90
Patent #:
Issue Dt:
07/23/2013
Application #:
12775324
Filing Dt:
05/06/2010
Publication #:
Pub Dt:
08/26/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH VIAS WITH REFLOWED CONDUCTIVE MATERIAL
91
Patent #:
Issue Dt:
11/26/2013
Application #:
12775338
Filing Dt:
05/06/2010
Publication #:
Pub Dt:
08/26/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH VIAS WITH REFLOWED CONDUCTIVE MATERIAL
92
Patent #:
Issue Dt:
12/10/2013
Application #:
12777415
Filing Dt:
05/11/2010
Publication #:
Pub Dt:
11/18/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH REINFORCED ENCAPSULANT HAVING EMBEDDED INTERCONNECT AND METHOD OF MANUFACTURE THEREOF
93
Patent #:
Issue Dt:
04/16/2013
Application #:
12781772
Filing Dt:
05/17/2010
Publication #:
Pub Dt:
09/09/2010
Title:
INTEGRATED CIRCUIT HEAT SPREADER STACKING SYSTEM
94
Patent #:
Issue Dt:
04/16/2013
Application #:
12785951
Filing Dt:
05/24/2010
Publication #:
Pub Dt:
11/24/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL SIDE CONNECTION AND METHOD OF MANUFACTURE THEREOF
95
Patent #:
Issue Dt:
06/04/2013
Application #:
12789077
Filing Dt:
05/27/2010
Publication #:
Pub Dt:
12/01/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTIPLE ROW LEADS AND METHOD OF MANUFACTURE THEREOF
96
Patent #:
Issue Dt:
07/09/2013
Application #:
12789203
Filing Dt:
05/27/2010
Publication #:
Pub Dt:
12/01/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DUAL SIDE CONNECTION AND METHOD OF MANUFACTURE THEREOF
97
Patent #:
Issue Dt:
09/24/2013
Application #:
12791867
Filing Dt:
06/02/2010
Publication #:
Pub Dt:
12/08/2011
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
98
Patent #:
Issue Dt:
08/06/2013
Application #:
12813315
Filing Dt:
06/10/2010
Publication #:
Pub Dt:
09/30/2010
Title:
SYSTEM-IN-PACKAGE HAVING INTEGRATED PASSIVE DEVICES AND METHOD THEREFOR
99
Patent #:
Issue Dt:
11/12/2013
Application #:
12818750
Filing Dt:
06/18/2010
Publication #:
Pub Dt:
12/22/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADFRAME AND METHOD OF MANUFACTURE THEREOF
100
Patent #:
Issue Dt:
11/06/2012
Application #:
12821404
Filing Dt:
06/23/2010
Publication #:
Pub Dt:
12/29/2011
Title:
SEMICONDUCTOR PACKAGING SYSTEM WITH MULTIPART CONDUCTIVE PILLARS AND METHOD OF MANUFACTURE THEREOF
Assignor
1
Exec Dt:
05/03/2019
Assignees
1
46429 LANDING PARKWAY
FREMONT, CALIFORNIA 94538
2
5 YISHUN STREET 23
SINGAPORE, SINGAPORE 768442
Correspondence name and address
PATENT LAW GROUP: ATKINS AND ASSOCIATES
123 W. CHANDLER HEIGHTS ROAD, #12535
CHANDLER, AZ 85248

Search Results as of: 05/14/2024 11:57 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT