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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:052918/0001   Pages: 529
Recorded: 02/20/2020
Attorney Dkt #:5059-500027
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 6426
Page 2 of 65
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1
Patent #:
Issue Dt:
09/24/2002
Application #:
09607904
Filing Dt:
06/30/2000
Title:
NOVEL TECHNIQUE TO CONSTRUCT 32/33 AND OTHER RLL CODES
2
Patent #:
Issue Dt:
06/11/2002
Application #:
09609007
Filing Dt:
06/22/2000
Title:
Controllable integrator
3
Patent #:
Issue Dt:
10/14/2003
Application #:
09615062
Filing Dt:
07/12/2000
Title:
METHOD AND APPARATUS FOR MEASURING AN OUTPUT SIGNAL OF A FLOATING TRANSDUCER
4
Patent #:
Issue Dt:
04/13/2004
Application #:
09615063
Filing Dt:
07/12/2000
Title:
METHOD AND APPARATUS FOR TESTING AN INTERFACE BETWEEN SEPARATE HARDWARE COMPONENTS
5
Patent #:
Issue Dt:
11/04/2003
Application #:
09615767
Filing Dt:
07/13/2000
Title:
UNIVERSAL BOOT CODE FOR A COMPUTER NETWORK
6
Patent #:
Issue Dt:
07/06/2004
Application #:
09617558
Filing Dt:
07/17/2000
Title:
PROGRAMMABLE COMPENSATED DELAY FOR DDR SDRAM INTERFACE USING PROGRAMMABLE DELAY LOOP FOR REFERENCE CALIBRATION
7
Patent #:
Issue Dt:
02/22/2005
Application #:
09620545
Filing Dt:
07/20/2000
Title:
MEMORY ARCHITECTURE AND SYSTEM AND MULTIPORT INTERFACE PROTOCOL
8
Patent #:
Issue Dt:
08/10/2004
Application #:
09629092
Filing Dt:
07/31/2000
Title:
ACTIVE RESISTIVE SUMMER FOR A TRANSFORMER HYBRID
9
Patent #:
Issue Dt:
06/10/2003
Application #:
09629095
Filing Dt:
07/31/2000
Title:
CALIBRATION CIRCUIT
10
Patent #:
Issue Dt:
11/30/2004
Application #:
09643636
Filing Dt:
08/22/2000
Title:
DISK CONTROLLER CONFIGURED TO PERFORM OUT OF ORDER EXECUTION OF WRITE OPERATIONS
11
Patent #:
Issue Dt:
08/27/2002
Application #:
09643819
Filing Dt:
08/22/2000
Title:
ANALOG TO DIGITAL CONVERTER WITH ENHANCED DIFFERENTIAL NON-LINEARITY
12
Patent #:
Issue Dt:
07/09/2002
Application #:
09648462
Filing Dt:
08/28/2000
Title:
HIGH SPEED REFERENCE BUFFER
13
Patent #:
Issue Dt:
05/28/2002
Application #:
09648464
Filing Dt:
08/28/2000
Title:
CHARGE PUMP FOR REFERENCE VOLTAGES IN ANALOG TO DIGITAL CONVERTER
14
Patent #:
Issue Dt:
06/04/2002
Application #:
09648770
Filing Dt:
08/28/2000
Title:
SWITCHED CAPACITOR FILTER FOR REFERENCE VOLTAGES IN ANALOG TO DIGITAL CONVERTER
15
Patent #:
Issue Dt:
04/09/2002
Application #:
09654392
Filing Dt:
09/01/2000
Title:
A LINEAR REGULATOR WHICH PROVIDES STABILIZED CURRENT FLOW
16
Patent #:
Issue Dt:
07/15/2003
Application #:
09660392
Filing Dt:
09/12/2000
Title:
ACQUISTION TIMING LOOP FOR READ CHANNEL
17
Patent #:
Issue Dt:
04/09/2002
Application #:
09660929
Filing Dt:
09/13/2000
Title:
RACE AVOIDANCE IN DISK HEAD READ CIRCUIT
18
Patent #:
Issue Dt:
03/22/2005
Application #:
09661912
Filing Dt:
09/14/2000
Title:
HIGH LATENCY INTERFACE BETWEEN HARDWARE COMPONENTS
19
Patent #:
Issue Dt:
12/02/2003
Application #:
09669117
Filing Dt:
09/25/2000
Title:
COMPILABLE ADDRESS MAGNITUDE COMPARATOR FOR MEMORY ARRAY SELF-TESTING
20
Patent #:
Issue Dt:
09/11/2007
Application #:
09675194
Filing Dt:
09/29/2000
Title:
PRINTER FORMATTER IN A CABLE
21
Patent #:
Issue Dt:
11/27/2007
Application #:
09675920
Filing Dt:
09/29/2000
Title:
PRINTER FORMATTER IN A REMOVABLE CARD
22
Patent #:
Issue Dt:
10/24/2006
Application #:
09678728
Filing Dt:
10/04/2000
Title:
MOVABLE TAP FINITE IMPULSE RESPONSE FILTER
23
Patent #:
Issue Dt:
08/06/2002
Application #:
09682638
Filing Dt:
10/01/2001
Title:
EMBEDDED CAM TEST STRUCTURE FOR FULLY TESTING ALL MATCHLINES
24
Patent #:
Issue Dt:
09/16/2003
Application #:
09683808
Filing Dt:
02/19/2002
Publication #:
Pub Dt:
08/21/2003
Title:
REDUNDANT ANTIFUSE SEGMENTS FOR IMPROVED PROGRAMMING EFFICIENCY
25
Patent #:
Issue Dt:
04/29/2003
Application #:
09690674
Filing Dt:
10/17/2000
Title:
SOI HYBRID STRUCTURE WITH SELECTIVE EPITAXIAL GROWTH OF SILICON
26
Patent #:
Issue Dt:
10/14/2003
Application #:
09697714
Filing Dt:
10/27/2000
Title:
GATE CAPACITOR STRESS REDUCTION IN CMOS/BICMOS CIRCUIT
27
Patent #:
Issue Dt:
12/03/2002
Application #:
09698236
Filing Dt:
10/30/2000
Title:
REDUCTION OF OFFSET VOLTAGE IN CURRENT MIRROR CIRCUIT
28
Patent #:
Issue Dt:
01/07/2003
Application #:
09699513
Filing Dt:
10/31/2000
Title:
METHOD AND APPARATUS FOR ENCODING/DECODING DATA
29
Patent #:
Issue Dt:
06/15/2004
Application #:
09699772
Filing Dt:
10/30/2000
Title:
LOW PHASE NOISE MOS LC OSCILLATOR
30
Patent #:
Issue Dt:
11/20/2001
Application #:
09710255
Filing Dt:
11/10/2000
Title:
Variable slope charge pump control
31
Patent #:
Issue Dt:
06/11/2002
Application #:
09710256
Filing Dt:
11/10/2000
Title:
FAST CHANGE CHARGE PUMP HAVING SWITCHABLE BOOST FUNCTION
32
Patent #:
Issue Dt:
08/12/2003
Application #:
09713199
Filing Dt:
11/16/2000
Title:
METHOD AND APPARATUS FOR EQUALIZING THE DIGITAL PERFORMANCE OF MULTIPLE ADC'S
33
Patent #:
Issue Dt:
05/13/2003
Application #:
09715628
Filing Dt:
11/17/2000
Title:
SERVICE STATION FOR PRINTERS HAVING FIRING NOZZLES PERPENDICULAR TO DIRECTION OF CARRIAGE MOTION
34
Patent #:
Issue Dt:
10/12/2004
Application #:
09717240
Filing Dt:
11/22/2000
Title:
METHOD AND APPARATUS FOR CONSTRAINING TAP COEFFICIENTS IN AN ADAPTIVE FINITE IMPULSE RESPONSE FILTER
35
Patent #:
Issue Dt:
05/04/2004
Application #:
09725818
Filing Dt:
11/30/2000
Title:
HIGH LATENCY TIMING CIRCUIT
36
Patent #:
Issue Dt:
11/15/2005
Application #:
09730597
Filing Dt:
12/07/2000
Title:
ADDRESS GENERATOR FOR LDPC ENCODER AND DECODER AND METHOD THEREOF
37
Patent #:
Issue Dt:
02/14/2006
Application #:
09730598
Filing Dt:
12/07/2000
Title:
PARITY CHECK MATRIX AND METHOD OF FORMING THEREOF
38
Patent #:
Issue Dt:
02/27/2007
Application #:
09730603
Filing Dt:
12/07/2000
Title:
LDPC ENCODER AND DECODER AND METHOD THEREOF
39
Patent #:
Issue Dt:
07/04/2006
Application #:
09730752
Filing Dt:
12/07/2000
Title:
LDPC ENCODER AND METHOD THEREOF
40
Patent #:
Issue Dt:
06/10/2003
Application #:
09731147
Filing Dt:
12/05/2000
Publication #:
Pub Dt:
08/01/2002
Title:
METHOD AND APPARATUS FOR INITIALIZING AN INTEGRATED CIRCUIT USING COMPRESSED DATA FROM A REMOTE FUSEBOX
41
Patent #:
Issue Dt:
12/17/2002
Application #:
09733295
Filing Dt:
12/08/2000
Publication #:
Pub Dt:
08/15/2002
Title:
METHOD AND APPARATUS FOR TESTING A WRITE FUNCTION OF A DUAL-PORT STATIC MEMORY CELL
42
Patent #:
Issue Dt:
02/18/2003
Application #:
09737012
Filing Dt:
12/14/2000
Publication #:
Pub Dt:
08/15/2002
Title:
METHOD FOR SUPPLY VOLTAGE DROP ANALYSIS DURING PLACEMENT PHASE OF CHIP DESIGN
43
Patent #:
Issue Dt:
10/08/2002
Application #:
09737474
Filing Dt:
12/18/2000
Title:
DIRECT DRIVE PROGRAMMABLE HIGH SPEED POWER DIGITAL-TO-ANALOG CONVERTER
44
Patent #:
Issue Dt:
03/20/2007
Application #:
09737743
Filing Dt:
12/18/2000
Title:
ACTIVE REPLICA TRANSFORMER HYBRID
45
Patent #:
Issue Dt:
05/14/2002
Application #:
09738715
Filing Dt:
12/15/2000
Title:
REGULATOR WITH LEAKAGE COMPENSATION
46
Patent #:
Issue Dt:
03/15/2005
Application #:
09746675
Filing Dt:
12/22/2000
Publication #:
Pub Dt:
06/27/2002
Title:
ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHOD THEREFOR
47
Patent #:
Issue Dt:
04/30/2002
Application #:
09746687
Filing Dt:
12/22/2000
Title:
SELF-LIMITING PAD DRIVER
48
Patent #:
Issue Dt:
10/15/2002
Application #:
09757107
Filing Dt:
01/08/2001
Publication #:
Pub Dt:
07/11/2002
Title:
LINEAR VOLTAGE CONTROLLED OSCILLATOR TRANSCONDUCTOR WITH GAIN COMPENSATION
49
Patent #:
Issue Dt:
07/16/2002
Application #:
09757267
Filing Dt:
01/09/2001
Publication #:
Pub Dt:
07/11/2002
Title:
PROGRAMMABLE LATCH DEVICE WITH INTEGRATED PROGRAMMABLE ELEMENT
50
Patent #:
Issue Dt:
10/09/2007
Application #:
09759151
Filing Dt:
01/16/2001
Title:
LONG LATENCY INTERFACE PROTOCOL
51
Patent #:
Issue Dt:
05/28/2002
Application #:
09760705
Filing Dt:
01/17/2001
Title:
HIGH-SPEED, LOW POWER, MEDIUM RESOLUTION ANALOG-TO-DIGITAL CONVERTER AND METHOD OF STABILIZATION
52
Patent #:
Issue Dt:
10/10/2006
Application #:
09761190
Filing Dt:
01/18/2001
Title:
MOVABLE TAP FINITE IMPULSE RESPONSE FILTER
53
Patent #:
Issue Dt:
04/16/2002
Application #:
09765035
Filing Dt:
01/17/2001
Title:
INTEGRATED FUSE LATCH AND SHIFT REGISTER FOR EFFICIENT PROGRAMMING AND FUSE READOUT
54
Patent #:
Issue Dt:
09/23/2003
Application #:
09765200
Filing Dt:
01/18/2001
Title:
FRINGING CAPACITOR STRUCTURE
55
Patent #:
Issue Dt:
03/16/2004
Application #:
09768122
Filing Dt:
01/23/2001
Publication #:
Pub Dt:
07/25/2002
Title:
METHOD FOR GUARANTEEING A MINIMUM DATA STROBE VALID WINDOW AND A MINIMUM DATA VALID WINDOW FOR DDR MEMORY DEVICES
56
Patent #:
Issue Dt:
09/23/2003
Application #:
09785920
Filing Dt:
02/17/2001
Publication #:
Pub Dt:
08/22/2002
Title:
DIGITALLY CONTROLLING THE OUTPUT VOLTAGE OF A PLURALITY OF VOLTAGE SOURCES
57
Patent #:
Issue Dt:
06/22/2004
Application #:
09791003
Filing Dt:
02/22/2001
Publication #:
Pub Dt:
08/22/2002
Title:
SYSTEM AND METHOD TO PREDETERMINE A BITMAP OF A SELF-TESTED EMBEDDED ARRAY
58
Patent #:
Issue Dt:
03/11/2003
Application #:
09795610
Filing Dt:
02/27/2001
Publication #:
Pub Dt:
08/29/2002
Title:
INTRINSIC DUAL GATE OXIDE MOSFET USING A DAMASCENE GATE PROCESS
59
Patent #:
Issue Dt:
08/23/2005
Application #:
09802464
Filing Dt:
03/09/2001
Publication #:
Pub Dt:
01/22/2004
Title:
METHOD AND APPARATUS FOR EMPLOYING A LIGHT SHIELD TO MODULATE PIXEL COLOR RESPONSIVITY
60
Patent #:
Issue Dt:
08/08/2006
Application #:
09805027
Filing Dt:
03/12/2001
Publication #:
Pub Dt:
09/12/2002
Title:
COPPER TO ALUMINUM INTERLAYER INTERCONNECT USING STUD AND VIA LINER
61
Patent #:
Issue Dt:
08/13/2002
Application #:
09805420
Filing Dt:
03/13/2001
Title:
CLOCKED MEMORY DEVICE THAT INCLUDES A PROGRAMMING MECHANISM FOR SETTING WRITE RECOVERY TIME AS A FUNCTION OF THE INPUT CLOCK
62
Patent #:
Issue Dt:
12/03/2002
Application #:
09810133
Filing Dt:
03/16/2001
Publication #:
Pub Dt:
09/19/2002
Title:
CROSSTALK SUPPRESSION IN DIFFERENTIAL AC COUPLED MULTICHANNEL IC AMPLIFIERS
63
Patent #:
Issue Dt:
10/22/2002
Application #:
09810763
Filing Dt:
03/16/2001
Publication #:
Pub Dt:
09/19/2002
Title:
SUBSTITUTION OF NON-MINIMUM GROUNDRULE CELLS FOR NON-CRITICAL MINIMUM GROUNDRULE CELLS TO INCREASE YIELD
64
Patent #:
Issue Dt:
06/15/2004
Application #:
09827073
Filing Dt:
04/05/2001
Publication #:
Pub Dt:
11/21/2002
Title:
ULTRA HIGH-SPEED DDP-SRAM CACHE
65
Patent #:
Issue Dt:
03/18/2003
Application #:
09832583
Filing Dt:
04/11/2001
Publication #:
Pub Dt:
10/17/2002
Title:
INKJET PRINTING SYSTEM USING SINGLE MOTOR FOR PRINT MEDIA ADVANCE AND CARRIAGE MOTION
66
Patent #:
Issue Dt:
04/22/2003
Application #:
09832607
Filing Dt:
04/11/2001
Publication #:
Pub Dt:
10/17/2002
Title:
CORED ROLLER FOR IMAGE FORMING DEVICE
67
Patent #:
Issue Dt:
12/14/2004
Application #:
09862427
Filing Dt:
05/21/2001
Publication #:
Pub Dt:
11/21/2002
Title:
SYSTEM AND METHOD FOR ANALYZING POWER DISTRIBUTION USING STATIC TIMING ANALYSIS
68
Patent #:
Issue Dt:
09/30/2003
Application #:
09865611
Filing Dt:
05/25/2001
Publication #:
Pub Dt:
11/28/2002
Title:
INPUT/OUTPUT MULTIPLEX SYSTEM FOR A READ/WRITE CHANNEL IN A DISK DRIVE
69
Patent #:
Issue Dt:
04/22/2003
Application #:
09865651
Filing Dt:
05/25/2001
Publication #:
Pub Dt:
11/28/2002
Title:
DIAGNOSTIC SYSTEM FOR A READ/WRITE CHANNEL IN A DISK DRIVE
70
Patent #:
Issue Dt:
02/11/2003
Application #:
09865757
Filing Dt:
05/25/2001
Publication #:
Pub Dt:
11/28/2002
Title:
VIEW DAC FEEDBACK INSIDE ANALOG FRONT CIRCUIT
71
Patent #:
Issue Dt:
10/14/2003
Application #:
09865790
Filing Dt:
05/25/2001
Publication #:
Pub Dt:
11/28/2002
Title:
METHOD AND APPARATUS FOR COMPENSATION OF SECOND ORDER DISTORTION
72
Patent #:
Issue Dt:
12/09/2003
Application #:
09865860
Filing Dt:
05/25/2001
Publication #:
Pub Dt:
11/28/2002
Title:
EFFICIENT ANALOG FRONT END FOR A READ/WRITE CHANNEL OF A HARD DISK DRIVE RUNNING FROM A HIGHLY REGULATED POWER SUPPLY
73
Patent #:
Issue Dt:
02/24/2004
Application #:
09865861
Filing Dt:
05/25/2001
Publication #:
Pub Dt:
11/28/2002
Title:
METHOD AND APPARATUS FOR OPERATING A CONTINUOUS TIME FILTER OF A READ/WRITE CHANNEL FOR A HARD DISK DRIVE
74
Patent #:
Issue Dt:
10/25/2005
Application #:
09867028
Filing Dt:
05/30/2001
Publication #:
Pub Dt:
02/14/2002
Title:
SYSTEM AND METHOD FOR ENHANCING THE INTELLIGIBILITY OF RECEIVED SPEECH IN A NOISE ENVIRONMENT
75
Patent #:
Issue Dt:
08/20/2002
Application #:
09870559
Filing Dt:
05/31/2001
Title:
STABILIZED DIRECT SENSING MEMORY ARCHITECTURE
76
Patent #:
Issue Dt:
08/23/2005
Application #:
09870623
Filing Dt:
05/31/2001
Publication #:
Pub Dt:
12/05/2002
Title:
METHOD AND APPARATUS FOR INTERFACE SIGNALING USING SINGLE-ENDED AND DIFFERENTIAL DATA SIGNALS
77
Patent #:
Issue Dt:
04/22/2003
Application #:
09870755
Filing Dt:
05/31/2001
Publication #:
Pub Dt:
12/05/2002
Title:
SINGLE BITLINE DIRECT SENSING ARCHITECTURE FOR HIGH SPEED MEMORY DEVICE
78
Patent #:
Issue Dt:
06/18/2002
Application #:
09872174
Filing Dt:
05/31/2001
Publication #:
Pub Dt:
10/25/2001
Title:
MULTI-BIT SCOREBOARDING TO HANDLE WRITE-AFTER-WRITE HAZARDS AND ELIMINATE BYPASS COMPARATORS
79
Patent #:
Issue Dt:
04/13/2004
Application #:
09874949
Filing Dt:
06/05/2001
Title:
PRECOMPENSATION CIRCUIT FOR MAGNETIC RECORDING
80
Patent #:
Issue Dt:
10/01/2002
Application #:
09880599
Filing Dt:
06/13/2001
Title:
VOLTAGE REGULATOR
81
Patent #:
Issue Dt:
05/27/2003
Application #:
09881474
Filing Dt:
06/14/2001
Title:
LOGIC PROCESS DRAM
82
Patent #:
Issue Dt:
11/09/2004
Application #:
09882084
Filing Dt:
06/13/2001
Publication #:
Pub Dt:
02/21/2002
Title:
PSEUDO-SYNCHRONOUS INTERPOLATED TIMING RECOVERY FOR A SAMPLED AMPLITUDE READ CHANNEL
83
Patent #:
Issue Dt:
06/27/2006
Application #:
09885853
Filing Dt:
06/20/2001
Publication #:
Pub Dt:
12/26/2002
Title:
EXTENSION OF FATIGUE LIFE FOR C4 SOLDER BALL TO CHIP CONNECTION
84
Patent #:
Issue Dt:
08/31/2004
Application #:
09887792
Filing Dt:
06/22/2001
Publication #:
Pub Dt:
12/26/2002
Title:
PROCESS INDEPENDENT SOURCE SYNCHRONOUS DATA CAPTURE APPARATUS AND METHOD
85
Patent #:
Issue Dt:
04/22/2003
Application #:
09892396
Filing Dt:
06/27/2001
Publication #:
Pub Dt:
01/02/2003
Title:
SAVING CONTENT ADDRESSABLE MEMORY POWER THROUGH CONDITIONAL COMPARISONS
86
Patent #:
Issue Dt:
09/13/2005
Application #:
09895343
Filing Dt:
06/29/2001
Publication #:
Pub Dt:
01/02/2003
Title:
FLIP-FLOP HAVING MULTIPLE CLOCK SOURCES AND METHOD THEREFORE
87
Patent #:
Issue Dt:
08/29/2006
Application #:
09901507
Filing Dt:
07/09/2001
Title:
SOFT-OUTPUT DECODING METHOD AND APPARATUS FOR CONTROLLED INTERSYMBOL INTERFERENCE CHANNELS
88
Patent #:
Issue Dt:
07/24/2007
Application #:
09903201
Filing Dt:
07/10/2001
Publication #:
Pub Dt:
01/16/2003
Title:
POINT-OF-SALE DEMONSTRATION OF COMPUTER PERIPHERALS
89
Patent #:
Issue Dt:
12/21/2004
Application #:
09907387
Filing Dt:
07/17/2001
Publication #:
Pub Dt:
01/23/2003
Title:
INTEGRATED REAL-TIME DATA TRACING WITH LOW PIN COUNT OUTPUT
90
Patent #:
Issue Dt:
02/11/2003
Application #:
09917059
Filing Dt:
07/27/2001
Publication #:
Pub Dt:
01/30/2003
Title:
SENSE AMPLIFIER THRESHOLD COMPENSATION
91
Patent #:
Issue Dt:
08/26/2008
Application #:
09917972
Filing Dt:
07/30/2001
Publication #:
Pub Dt:
01/30/2003
Title:
BUILT-IN-SELF-TEST USING EMBEDDED MEMORY AND PROCESSOR IN AN APPLICATION SPECIFIC INTEGRATED CIRCUIT
92
Patent #:
Issue Dt:
11/08/2005
Application #:
09918809
Filing Dt:
07/31/2001
Publication #:
Pub Dt:
02/06/2003
Title:
ADAPTIVE PHASE LOCKED LOOP
93
Patent #:
Issue Dt:
08/14/2007
Application #:
09919518
Filing Dt:
07/31/2001
Publication #:
Pub Dt:
02/06/2003
Title:
SYSTEM AND METHOD FOR ENHANCED PIRACY PROTECTION IN A WIRELESS PERSONAL COMMUNICATION DEVICE
94
Patent #:
Issue Dt:
10/20/2009
Application #:
09920240
Filing Dt:
08/01/2001
Title:
ACTIVE RESISTANCE SUMMER FOR A TRANSFORMER HYBRID
95
Patent #:
Issue Dt:
10/07/2008
Application #:
09920241
Filing Dt:
08/01/2001
Title:
APPARATUS AND METHOD FOR CONVERTING SINGLE-ENDED SIGNALS TO A DIFFERENTIAL SIGNAL, AND TRANSCEIVER EMPLOYING SAME
96
Patent #:
Issue Dt:
05/14/2002
Application #:
09941829
Filing Dt:
08/29/2001
Publication #:
Pub Dt:
03/14/2002
Title:
TAP CONNECTIONS FOR CIRCUITS WITH LEAKAGE SUPPRESSION CAPABILITY
97
Patent #:
Issue Dt:
03/09/2004
Application #:
09950086
Filing Dt:
09/12/2001
Title:
CONTROLLABLE INTEGRATOR
98
Patent #:
Issue Dt:
03/04/2008
Application #:
09962424
Filing Dt:
09/25/2001
Publication #:
Pub Dt:
03/27/2003
Title:
POWER SAVING IN COMMUNICATION TERMINALS
99
Patent #:
Issue Dt:
12/27/2005
Application #:
09966914
Filing Dt:
09/27/2001
Title:
INTEGRATED CHIP PACKAGE HAVING INTERMEDIATE SUBSTRATE
100
Patent #:
Issue Dt:
10/11/2005
Application #:
09967543
Filing Dt:
09/28/2001
Publication #:
Pub Dt:
04/03/2003
Title:
REGISTERING EVENTS WHILE CLOCKING MULTIPLE DOMAINS
Assignor
1
Exec Dt:
12/31/2019
Assignee
1
PO BOX 1350, CLIFTON HOUSE
75 FORT STREET
GRAND CAYMAN, CAYMAN ISLANDS KYI-1108
Correspondence name and address
HARNESS, DICKEY & PIERCE, P.L.C.
P.O. BOX 828
BLOOMFIELD HILLS, MI 48303

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