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04/24/2001
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09/28/1998
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04/17/2001
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02/08/1999
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07/13/2004
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02/19/1999
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07/04/2000
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02/23/1999
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05/08/2001
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03/09/1999
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09/12/2006
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03/24/1999
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03/16/2004
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03/26/1999
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05/15/2001
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05/28/1999
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03/20/2001
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07/31/1999
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04/24/2001
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08/09/1999
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10/29/2002
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08/17/1999
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05/25/2004
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08/17/1999
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02/25/2003
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09/03/1999
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08/01/2000
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09/03/1999
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12/12/2000
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09/08/1999
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08/20/2002
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09/20/1999
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12/11/2001
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09/22/1999
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SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS AND A MEMORY ARRAY MADE THEREBY
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02/25/2003
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09/22/1999
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08/15/2002
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12/26/2000
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09/24/1999
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01/21/2003
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09/24/1999
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06/12/2001
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09/28/1999
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08/13/2002
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10/01/1999
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02/06/2001
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10/05/1999
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09/18/2001
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10/19/1999
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MEMORY MANAGEMENT METHOD AND APPARATUS FOR PARTITIONING HOMOGENEOUS MEMORY AND RESTRICTING ACCESS OF INSTALLED APPLICATIONS TO PREDETERMINED MEMORY RANGES
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08/07/2001
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10/19/1999
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06/05/2001
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10/27/1999
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11/05/2002
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11/08/1999
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07/22/2003
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11/19/1999
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05/20/2003
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12/06/1999
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04/23/2002
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12/09/1999
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06/14/2001
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DUAL-DIE INTEGRATED CIRCUIT PACKAGE
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05/27/2003
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12/17/1999
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12/23/2003
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12/14/1999
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POS-PHY INTERFACE FOR INTERCONNECTION OF PHYSICAL LAYER DEVICES AND LINK LAYER DEVICES
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04/01/2003
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12/16/1999
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10/01/2002
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12/16/1999
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SYSTEM AND METHOD FOR DATA STORAGE ARCHIVE BIT UPDATE AFTER SNAPSHOT BACKUP
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01/21/2003
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12/16/1999
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10/14/2003
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12/23/1999
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MULTITHREADED ADDRESS RESOLUTION SYSTEM
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06/24/2003
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12/27/1999
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SCALEABLE BANDWIDTH INTERCONNECT FOR SIMULTANEOUS TRANSFER OF MIXED PLEISIOCHRONOUS DIGITAL HIERARCY (PDH) CLIENTS
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07/29/2003
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12/30/1999
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08/10/2004
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01/18/2000
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12/13/2001
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04/02/2002
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01/24/2000
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09/17/2002
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01/26/2000
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CAPACITIVE SENSOR AND ARRAY
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07/31/2001
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02/18/2000
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09/09/2003
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02/18/2000
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AN IMPROVED OSCILLATOR AND CURRENT SOURCE
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07/31/2001
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02/18/2000
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Output stage for a charge pump and a charge pump made thereby
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05/06/2003
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09507234
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02/18/2000
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METHOD AND APPARATUS FOR TESTING A NON-VOLATILE MEMORY ARRAY HAVING A LOW NUMBER OF OUTPUT PINS
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04/24/2001
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02/18/2000
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Non-volatile flip-flop circuit
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03/05/2002
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09515961
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02/29/2000
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Low voltage rail-to-rail cmos output stage
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04/02/2002
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09516008
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02/29/2000
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Low voltage rail-to-rail CMOS input stage
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02/05/2002
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09521299
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03/09/2000
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Method of forming a stacked-die integrated circuit chip package on a wafer level
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06/18/2002
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09523592
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03/10/2000
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MOS VARACTOR STRUCTURE WITH ENGINEERED VOLTAGE CONTROL RANGE
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10/23/2001
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09527298
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03/16/2000
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Stress reducing lead-frame for plastic encapsulation
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10/28/2003
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09527373
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03/16/2000
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Differential non-volatile content addressable memory cell and array
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07/16/2002
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03/17/2000
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METHOD AND APPARATUS FOR DETECTING A TAMPER CONDITION AND ISOLATING A CIRCUIT THEREFROM
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09/18/2001
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09536387
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03/28/2000
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Isolation circuit and method for controlling discharge of high-voltage in a flash EEPROM
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04/17/2001
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09537626
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03/29/2000
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Operational amplifier phase reversal protection
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03/19/2002
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09542434
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04/04/2000
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Page mode erase in a flash memory array
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09/18/2001
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09544769
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04/07/2000
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Method and apparatus for programmable current sharing
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01/29/2002
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09548745
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04/13/2000
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High-speed, adaptive IDDQ measurement
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06/19/2001
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09550556
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04/17/2000
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Direct digital synthesis in a qam demodulator
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04/08/2003
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09550883
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04/17/2000
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Timing recovery circuit in a QAM Demodulator
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06/19/2001
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09550885
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04/17/2000
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Phase noise and additive noise estimation in a QAM demodulator
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02/10/2004
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04/19/2000
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INPUT/OUTPUT COMMUNICATION NETWORKS AND BOOTING PROTOCOLS
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04/17/2001
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05/01/2000
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Reduction of data dependent power supply noise when sensing the state of a memory cell
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06/12/2001
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09562490
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05/01/2000
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Integrated memory circuit having a flash memory array and at least one sram memory array with internal address and data bus for transfer of signals therebetween
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03/04/2003
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09564105
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05/03/2000
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INTELLIGENT EXPANSION ROM SHARING BUS SUBSYSTEM
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06/04/2002
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09564324
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05/03/2000
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Electronically-eraseable programmable read-only memory having reduced-page-size program and erase
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05/08/2001
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09574387
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05/19/2000
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Voltage regulating circuit with a clamp up circuit and a clamp down circuit operating in tandem
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07/30/2002
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09576394
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05/22/2000
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FLASH MEMORY CELL WITH CONTACTLESS BIT LINE, AND PROCESS OF FABRICATION
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02/17/2004
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06/02/2000
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REED-SOLOMON ENCODER AND DECODER
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09/18/2001
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09586660
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06/01/2000
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Method for depositing a selected thickness of an interlevel dielectric material to achieve optimum global planarity on a
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08/19/2003
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09587538
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06/01/2000
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Title:
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TWO-DIMENSIONAL EXECUTION QUEUE FOR HOST ADAPTERS
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Patent #:
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Issue Dt:
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10/16/2001
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Application #:
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09593934
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Filing Dt:
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06/15/2000
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Title:
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DC power converter having bipolar output and BI-Directional reactive current transfer
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Patent #:
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Issue Dt:
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02/03/2004
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Application #:
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09602291
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Filing Dt:
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06/23/2000
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Title:
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METHOD, SYSTEM AND APPARATUS FOR CALIBRATING A PULSE POSITION MODULATION (PPM) DECODER TO A PPM SIGNAL
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Patent #:
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Issue Dt:
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07/31/2001
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Application #:
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09603245
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Filing Dt:
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06/23/2000
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Title:
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Dual bit error rate estimation in a qam demodulator
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Patent #:
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Issue Dt:
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05/11/2004
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Application #:
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09603801
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Filing Dt:
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06/26/2000
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Title:
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WIRELESS TRANSCEIVER WITH SUBTRACTIVE FILTER COMPENSATING BOTH TRANSMIT AND RECEIVE ARTIFACTS
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Patent #:
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Issue Dt:
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01/29/2002
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Application #:
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09604119
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Filing Dt:
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06/26/2000
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Title:
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Digital trimming of analog components using non-volatile memory
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09604120
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Filing Dt:
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06/26/2000
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Title:
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DIGITAL TRIMMING OF OP AMP OFFSET VOLTAGE AND QUIESCENT CURRENT USING NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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01/28/2003
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Application #:
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09604203
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Filing Dt:
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06/27/2000
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Title:
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SYSTEM AND METHOD FOR DETECTING OF UNCHANGED PARITY DATA
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Patent #:
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Issue Dt:
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07/23/2002
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Application #:
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09604347
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Filing Dt:
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06/27/2000
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Title:
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SYSTEM AND METHOD FOR ZEROING DATA STORAGE BLOCKS IN A RAID STORAGE IMPLEMENTATION
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09604348
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Filing Dt:
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06/27/2000
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Title:
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SYSTEM AND METHOD FOR DETECTION OF DISK STORAGE BLOCKS CONTAINING UNIQUE VALUES
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Patent #:
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Issue Dt:
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12/30/2003
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Application #:
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09608294
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Filing Dt:
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06/30/2000
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Title:
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BUS INTERFACE FOR CELL AND/OR PACKET DATA TRANSFER
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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09613174
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Filing Dt:
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07/10/2000
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Title:
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METHODS FOR ASSOCIATING END NODES ON A FABRIC
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Patent #:
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Issue Dt:
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11/13/2001
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Application #:
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09617201
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Filing Dt:
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07/14/2000
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Title:
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Low charge-injection charge pump
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Patent #:
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Issue Dt:
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05/22/2001
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Application #:
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09617280
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Filing Dt:
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07/17/2000
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Title:
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Improved programming method for a memory cell
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Patent #:
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Issue Dt:
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04/24/2001
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Application #:
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09617281
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Filing Dt:
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07/17/2000
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Title:
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Method for minimizing program disturb in a memory cell
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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09621964
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Filing Dt:
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07/21/2000
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Title:
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SWITCHED CAPACITOR TRANSMITTER PRE-DRIVER
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Patent #:
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Issue Dt:
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12/18/2001
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Application #:
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09627351
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Filing Dt:
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07/28/2000
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Title:
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Secure programmable logic device
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Patent #:
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Issue Dt:
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05/28/2002
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Application #:
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09627917
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Filing Dt:
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07/28/2000
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Title:
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TESTING OF MULTILEVEL SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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10/25/2005
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Application #:
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09627927
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Filing Dt:
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07/28/2000
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Title:
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CRYPTOGRAPHY PRIVATE KEY STORAGE AND RECOVERY METHOD AND APPARATUS
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Patent #:
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Issue Dt:
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08/12/2003
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Application #:
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09639840
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Filing Dt:
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08/16/2000
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Title:
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CIRCUIT SERIAL PROGRAMMING OF DEFAULT CONFIGURATION
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09639841
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Filing Dt:
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08/16/2000
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Title:
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PROGRAMMABLE AUTO-CONVERTING ANAALOG TO DIGITAL CONVERTSION MODULE
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Patent #:
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Issue Dt:
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03/19/2002
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Application #:
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09650561
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Filing Dt:
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08/30/2000
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Title:
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High-speed, low-power sample and hold circuit
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Patent #:
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Issue Dt:
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04/06/2004
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Application #:
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09650774
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Filing Dt:
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08/29/2000
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Title:
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CONTENTION-BASED METHODS FOR GENERATING REDUCED NUMBER OF INTERRUPTS
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Patent #:
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Issue Dt:
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07/02/2002
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Application #:
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09661681
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Filing Dt:
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09/14/2000
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Title:
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BIAS GENERATING CIRCUIT FOR USE WITH AN OSCILLATING CIRCUIT IN AN INTEGRATED CIRCUIT CHARGE PUMP
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09675355
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Filing Dt:
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09/29/2000
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Title:
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COMPARATOR PROGRAMMABLE FOR HIGH-SPEED OR LOW-POWER OPERATION
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Patent #:
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Issue Dt:
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02/04/2003
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Application #:
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09675356
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Filing Dt:
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09/29/2000
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Title:
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INPUT VOLTAGE OFFSET CALIBRATION OF AN ANALOG DEVICE USING A MICROCONTROLLER
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Patent #:
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Issue Dt:
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10/01/2002
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Application #:
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09676389
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Filing Dt:
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09/29/2000
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Title:
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AUTO-CALIBRATION CIRCUIT TO MINIMIZE INPUT OFFSET VOLTAGE IN AN INTEGRATED CIRCUIT ANALOG INPUT DEVICE
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Patent #:
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Issue Dt:
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05/18/2004
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Application #:
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09680679
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Filing Dt:
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10/06/2000
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Title:
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A CLOCK RECOVERY UNIT WHICH USES A DETECTED FREQUENCY DIFFERENCE SIGNAL TO HELP ESTABLISH PHASE LOCK BETWEEN A TRANSMITTED DATA SIGNAL AND A RECOVERED CLOCK SIGNAL
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Patent #:
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Issue Dt:
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08/31/2004
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Application #:
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09680834
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Filing Dt:
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10/06/2000
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Title:
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DUAL-CHANNEL SCSI CHIPS AND METHODS FOR CONFIGURING SEPARATE INTEROPERABILITY OF EACH CHANNEL OF THE SCSI CHIP
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Patent #:
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Issue Dt:
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10/16/2001
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Application #:
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09687391
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Filing Dt:
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10/13/2000
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Title:
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Shunt resistance device for monitoring battery state of charge
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