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Total properties:
11
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Patent #:
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Issue Dt:
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01/03/2006
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Application #:
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09186388
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Filing Dt:
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11/05/1998
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Title:
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N TYPE IMPURITY DOPING USING IMPLANTATION OF P2+ IONS OR AS2+ IONS
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Patent #:
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Issue Dt:
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08/02/2005
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Application #:
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10361934
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Filing Dt:
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02/10/2003
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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METHOD OF FORMING A POCKET IMPLANT REGION AFTER FORMATION OF COMPOSITE INSULATOR SPACERS
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Patent #:
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Issue Dt:
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06/14/2005
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Application #:
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10628913
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Filing Dt:
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07/29/2003
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Publication #:
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Pub Dt:
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02/03/2005
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Title:
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METHOD OF FORMING A PARTIALLY DEPLETED SILICON ON INSULATOR (PDSOI) TRANSISTOR WITH A PAD LOCK BODY EXTENSION
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10662674
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Filing Dt:
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09/15/2003
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Publication #:
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Pub Dt:
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03/17/2005
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Title:
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METHOD OF FORMING DOUBLE-GATED SILICON-ON-INSULATOR (SOI) TRANSISTORS WITH CORNER ROUNDING
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Patent #:
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Issue Dt:
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06/10/2008
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Application #:
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10973526
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Filing Dt:
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10/25/2004
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Publication #:
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Pub Dt:
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04/27/2006
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Title:
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ANTI-REFLECTIVE SIDEWALL COATED ALTERNATING PHASE SHIFT MASK AND FABRICATION METHOD
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Patent #:
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Issue Dt:
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02/14/2006
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Application #:
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11128010
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Filing Dt:
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05/12/2005
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Publication #:
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Pub Dt:
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09/22/2005
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Title:
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METHOD OF FORMING A PARTIALLY DEPLETED SILICON ON INSULATOR (PDSOI) TRANSISTOR WITH A PAD LOCK BODY EXTENSION
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Patent #:
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Issue Dt:
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11/28/2006
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Application #:
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11174857
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Filing Dt:
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07/05/2005
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Publication #:
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Pub Dt:
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01/19/2006
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Title:
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DOUBLE-GATED SILICON-ON-INSULATOR (SOI) TRANSISTORS WITH CORNER ROUNDING
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Patent #:
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Issue Dt:
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11/10/2009
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Application #:
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11304455
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Filing Dt:
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12/15/2005
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Publication #:
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Pub Dt:
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06/21/2007
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Title:
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DOUBLE ANNEAL WITH IMPROVED RELIABILITY FOR DUAL CONTACT ETCH STOP LINER SCHEME
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Patent #:
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Issue Dt:
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08/10/2010
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Application #:
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11383951
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Filing Dt:
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05/17/2006
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Publication #:
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Pub Dt:
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11/22/2007
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Title:
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STRAINED CHANNEL TRANSISTOR AND METHOD OF FABRICATION THEREOF
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Patent #:
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Issue Dt:
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06/01/2010
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Application #:
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11615980
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Filing Dt:
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12/24/2006
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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SELECTIVE STI STRESS RELAXATION THROUGH ION IMPLANTATION
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Patent #:
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Issue Dt:
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01/11/2011
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Application #:
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11855168
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Filing Dt:
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09/14/2007
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Publication #:
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Pub Dt:
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03/19/2009
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Title:
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SEMICONDUCTOR STRUCTURE INCLUDING HIGH VOLTAGE DEVICE
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