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Patent #:
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Issue Dt:
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03/30/2004
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Application #:
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09618057
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Filing Dt:
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07/17/2000
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Title:
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IN-BAND MANAGEMENT OF A STACKED GROUP OF SWITCHES BY A SINGLE CPU
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09624494
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Filing Dt:
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07/24/2000
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Title:
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DYNAMIC PULSE WIDTH PROGRAMMING OF PROGRAMMABLE LOGIC DEVICES
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Patent #:
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Issue Dt:
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04/29/2003
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Application #:
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09660723
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Filing Dt:
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09/13/2000
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Title:
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DRY ISOTROPIC REMOVAL OF INORGANIC ANTI-REFLECTIVE COATING AFTER POLY GATE ETCHING
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Patent #:
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Issue Dt:
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06/17/2003
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Application #:
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09664238
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Filing Dt:
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09/18/2000
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Title:
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METHOD OF FORMING CONDUCTIVE INTERCONNECTIONS ON AN INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09725412
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Filing Dt:
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11/29/2000
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Title:
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Embedded vertical dram cells and dual workfunction logic gates
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09731031
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Filing Dt:
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12/07/2000
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Publication #:
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Pub Dt:
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08/01/2002
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Title:
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DAMASCENE NISI METAL GATE HIGH-K TRANSISTOR
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Patent #:
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Issue Dt:
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01/29/2002
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Application #:
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09734189
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Filing Dt:
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12/12/2000
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Title:
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Damascene NiSi metal gate high-K transistor
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Patent #:
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Issue Dt:
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11/12/2013
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Application #:
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09750475
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Filing Dt:
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12/28/2000
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Publication #:
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Pub Dt:
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04/04/2002
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Title:
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DATA SOURCE INTERFACE ENHANCED ERROR RECOVERY
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Patent #:
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Issue Dt:
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02/03/2004
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Application #:
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09764833
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Filing Dt:
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01/17/2001
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Publication #:
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Pub Dt:
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07/18/2002
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Title:
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STRUCTURE AND METHOD OF FORMING BITLINE CONTACTS FOR A VERTICAL DRAM ARRAY USING A LINE BITLINE CONTACT MASK
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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09772577
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Filing Dt:
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01/30/2001
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Publication #:
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Pub Dt:
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08/01/2002
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Title:
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PHASE SHIFT MASK AND SYSTEM AND METHOD FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09776736
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Filing Dt:
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02/06/2001
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Title:
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METHOD FOR MAKING A SLOT VIA FILLED DUAL DAMASCENE LOW K INTERCONNECT STRUCTURE WITHOUT MIDDLE STOP LAYER
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Patent #:
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Issue Dt:
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03/09/2004
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Application #:
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09811501
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Filing Dt:
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03/19/2001
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Title:
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TEST CONTACT MECHANISM
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Patent #:
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Issue Dt:
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04/23/2002
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Application #:
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09812695
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Filing Dt:
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03/21/2001
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Title:
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REDUCTION OF METAL SILICIDE/SILICON INTERFACE ROUGHNESS BY DOPANT IMPLANTATION PROCESSING
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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09829160
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Filing Dt:
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04/09/2001
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Publication #:
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Pub Dt:
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06/13/2002
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Title:
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FIELD EFFECT TRANSISTOR SQUARE MULTIPLIER
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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09847622
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Filing Dt:
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05/02/2001
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Publication #:
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Pub Dt:
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05/16/2002
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Title:
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FIELD EFFECT TRANSISTOR WITH REDUCED GATE DELAY AND METHOD OF FABRICATING THE SAME
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Patent #:
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Issue Dt:
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11/18/2003
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Application #:
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09893824
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Filing Dt:
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06/28/2001
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Publication #:
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Pub Dt:
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08/14/2003
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Title:
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SYSTEM AND METHOD FOR ACTIVE CONTROL OF SPACER DEPOSITION
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Patent #:
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Issue Dt:
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11/16/2004
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Application #:
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10016439
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Filing Dt:
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12/11/2001
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Title:
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METHOD OF EXTENDING THE AREAS OF CLEAR FIELD PHASE SHIFT GENERATION
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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10022847
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Filing Dt:
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12/20/2001
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Title:
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ELECTRICALLY PROGRAMMED MOS TRANSISTOR SOURCE/DRAIN SERIES RESISTANCE
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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10039525
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Filing Dt:
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11/07/2001
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Title:
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FEEDFORWARD TEMPERATURE CONTROL OF DEVICE UNDER TEST
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Patent #:
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Issue Dt:
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08/28/2007
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Application #:
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10066948
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Filing Dt:
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02/04/2002
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Title:
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REMOTE MANAGEMENT MECHANISM TO PREVENT ILLEGAL SYSTEM COMMANDS
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Patent #:
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Issue Dt:
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09/14/2004
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Application #:
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10104675
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Filing Dt:
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03/21/2002
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Title:
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SCATTEROMETRY STRUCTURE WITH EMBEDDED RING OSCILLATOR, AND METHODS OF USING SAME
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Patent #:
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Issue Dt:
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08/05/2003
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Application #:
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10105509
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Filing Dt:
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03/26/2002
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Publication #:
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Pub Dt:
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08/08/2002
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Title:
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SLOT VIA FILLED DUAL DAMASCENE INTERCONNECT STRUCTURE WITHOUT MIDDLE ETCH STOP LAYER
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10310759
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Filing Dt:
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12/06/2002
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Publication #:
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Pub Dt:
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06/10/2004
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Title:
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METHOD AND APPARATUS FOR OPTICAL FILM MEASUREMENTS IN A CONTROLLED ENVIRONMENT
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Patent #:
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Issue Dt:
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10/18/2005
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Application #:
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10328112
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Filing Dt:
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12/20/2002
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Publication #:
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Pub Dt:
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06/24/2004
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Title:
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MODEL CHECKING WITH LAYERED LOCALIZATION REDUCTION
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Patent #:
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Issue Dt:
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06/29/2004
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Application #:
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10335522
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Filing Dt:
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12/31/2002
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Title:
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STRAINED SILICON MOSFET HAVING IMPROVED SOURCE/DRAIN EXTENSION DOPANT DIFFUSION RESISTANCE AND METHOD FOR ITS FABRICATION
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Patent #:
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Issue Dt:
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11/02/2004
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10420635
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04/22/2003
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Pub Dt:
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03/04/2004
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Title:
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METHOD OF FORMING A LOW LEAKAGE DIELECTRIC LAYER PROVIDING AN INCREASED CAPACITIVE COUPLING
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Patent #:
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Issue Dt:
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03/17/2009
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10597432
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07/25/2006
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10/09/2008
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Title:
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FOLDED NODE TRENCH CAPACITOR
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Patent #:
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Issue Dt:
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10/02/2007
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Application #:
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10604141
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06/27/2003
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Pub Dt:
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12/30/2004
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Title:
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METHOD AND SYSTEM FOR OPTIMIZED INSTRUCTION FETCH TO PROTECT AGAINST SOFT AND HARD ERRORS
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Patent #:
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02/07/2006
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10604204
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07/01/2003
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01/06/2005
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Title:
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SILICON-ON-INSULATOR LATCH-UP PULSE-RADIATION DETECTOR
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Issue Dt:
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11/21/2006
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10605483
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10/02/2003
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04/07/2005
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Title:
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ELECTROSTATIC DISCHARGE PROTECTION NETWORKS FOR TRIPLE WELL SEMICONDUCTOR DEVICES
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06/20/2006
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10605885
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11/04/2003
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05/05/2005
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Title:
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STRUCTURE AND PROGRAMMING OF LASER FUSE
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06/20/2006
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10624712
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07/22/2003
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08/05/2004
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Title:
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TECHNIQUE FOR FORMING CONTACTS FOR BURIED DOPED REGIONS IN A SEMICONDUCTOR DEVICE
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10/10/2006
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10707722
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01/07/2004
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07/14/2005
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TUNABLE SEMICONDUCTOR DIODES
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05/15/2007
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10709905
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06/04/2004
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12/08/2005
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BIPOLAR TRANSISTOR WITH ISOLATION AND DIRECT CONTACTS
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03/25/2008
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10711182
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08/31/2004
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08/09/2007
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STRUCTURE AND METHOD OF MAKING DOUBLE-GATED SELF-ALIGNED FINFET HAVING GATES OF DIFFERENT LENGTHS
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09/04/2007
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10711486
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09/21/2004
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03/23/2006
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METHOD TO BUILD SELF-ALIGNED NPN IN ADVANCED BICMOS TECHNOLOGY
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06/20/2006
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10753989
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01/08/2004
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07/14/2005
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POSITIVE PHOTORESIST COMPOSITION WITH A POLYMER INCLUDING A FLUOROSULFONAMIDE GROUP AND PROCESS FOR ITS USE
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01/31/2006
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10773930
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02/06/2004
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08/11/2005
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NEGATIVE PHOTORESIST COMPOSITION INVOLVING NON-CROSSLINKING CHEMISTRY
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10/17/2006
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10904582
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11/17/2004
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05/18/2006
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METHOD OF FABRICATING A BOTTLE TRENCH AND A BOTTLE TRENCH CAPACITOR
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07/08/2008
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10905041
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12/13/2004
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06/15/2006
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07/03/2007
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10907494
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04/04/2005
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10/05/2006
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11/09/2010
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10908601
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05/18/2005
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11/23/2006
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11/07/2006
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10981155
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11/04/2004
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05/04/2006
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05/27/2008
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11/23/2004
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05/25/2006
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09/09/2008
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11064561
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02/24/2005
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08/24/2006
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07/08/2014
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03/16/2005
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01/05/2006
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08/17/2010
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04/20/2005
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03/04/2008
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12/07/2006
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04/15/2008
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06/23/2005
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12/28/2006
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10/20/2009
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09/22/2005
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03/22/2007
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12/15/2009
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11/09/2005
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05/10/2007
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02/02/2010
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11/21/2005
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05/24/2007
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06/03/2008
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07/14/2005
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01/18/2007
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06/24/2014
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11189765
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07/27/2005
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07/14/2009
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08/26/2005
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03/01/2007
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09/02/2008
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03/08/2007
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04/13/2006
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SERVO SYSTEM FOR A TWO-DIMENSIONAL MICRO-ELECTROMECHANICAL SYSTEM (MEMS)-BASED SCANNER AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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02/02/2010
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Application #:
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11251604
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Filing Dt:
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10/14/2005
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Title:
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PRODUCT-RELATED FEEDBACK FOR PROCESS CONTROL
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Patent #:
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Issue Dt:
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02/02/2010
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Application #:
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11259644
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Filing Dt:
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10/26/2005
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Publication #:
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Pub Dt:
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04/26/2007
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Title:
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LOW THRESHOLD VOLTAGE SEMICONDUCTOR DEVICE WITH DUAL THRESHOLD VOLTAGE CONTROL MEANS
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Patent #:
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Issue Dt:
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02/05/2008
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Application #:
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11271032
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Filing Dt:
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11/10/2005
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Publication #:
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Pub Dt:
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05/18/2006
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Title:
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PROCESS OPTIONS OF FORMING SILICIDED METAL GATES FOR ADVANCED CMOS DEVICES
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Patent #:
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Issue Dt:
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01/06/2009
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Application #:
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11275514
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Filing Dt:
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01/11/2006
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Publication #:
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Pub Dt:
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07/12/2007
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Title:
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SEMICONDUCTOR TRANSISTORS WITH EXPANDED TOP PORTIONS OF GATES
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Patent #:
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Issue Dt:
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03/22/2011
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Application #:
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11276282
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Filing Dt:
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02/22/2006
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Publication #:
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Pub Dt:
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08/23/2007
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Title:
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METHOD OF FABRICATING A PRECISION BURIED RESISTOR
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Patent #:
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Issue Dt:
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07/14/2009
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Application #:
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11276369
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Filing Dt:
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02/27/2006
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Publication #:
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Pub Dt:
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08/30/2007
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Title:
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HIGH PERFORMANCE TAPERED VARACTOR
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Patent #:
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Issue Dt:
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04/28/2009
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Application #:
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11277306
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Filing Dt:
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03/23/2006
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Publication #:
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Pub Dt:
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10/18/2007
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Title:
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ERROR DETECTION AND CORRECTION IN SEMICONDUCTOR STRUCTURES
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Patent #:
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Issue Dt:
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09/09/2008
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11279312
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Filing Dt:
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04/11/2006
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Publication #:
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Pub Dt:
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10/18/2007
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Title:
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METHOD FOR VERIFYING PERFORMANCE OF AN ARRAY BY SIMULATING OPERATION OF EDGE CELLS IN A FULL ARRAY MODEL
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Patent #:
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Issue Dt:
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04/29/2008
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Application #:
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11279434
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Filing Dt:
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04/12/2006
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Publication #:
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Pub Dt:
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10/18/2007
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Title:
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VERTICAL PARALLEL PLATE CAPACITOR USING SPACER SHAPED ELECTRODES AND METHOD FOR FABRICATION THEREOF
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Patent #:
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Issue Dt:
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07/31/2007
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Application #:
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11306663
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Filing Dt:
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01/05/2006
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Publication #:
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09/21/2006
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Title:
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SELECTABLE OPEN CIRCUIT AND ANTI-FUSE ELEMENT
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Patent #:
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Issue Dt:
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04/14/2009
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11308408
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03/22/2006
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Publication #:
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Pub Dt:
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09/27/2007
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Title:
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GROUNDING FRONT-END-OF-LINE STRUCTURES ON A SOI SUBSTRATE
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Patent #:
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Issue Dt:
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11/13/2007
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11308541
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Filing Dt:
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04/04/2006
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Publication #:
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Pub Dt:
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10/11/2007
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Title:
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SILICON GERMANIUM EMITTER
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Patent #:
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Issue Dt:
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08/20/2013
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11313594
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12/21/2005
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06/21/2007
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Title:
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Enhanced state estimation based upon information credibility
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Patent #:
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Issue Dt:
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11/16/2010
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11323564
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Filing Dt:
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12/30/2005
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Publication #:
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Pub Dt:
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07/05/2007
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Title:
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A METHOD OF FABRICATING A SEMICONDUCTOR STRUCTURE INCLUDING ONE DEVICE REGION HAVING A METAL GATE ELECTRODE LOCATED ATOP A THINNED POLYGATE ELECTRODE
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04/21/2009
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11329560
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01/11/2006
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07/12/2007
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Title:
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SICOH FILM PREPARATION USING PRECURSORS WITH BUILT-IN POROGEN FUNCTIONALITY
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02/03/2009
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11332564
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01/13/2006
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07/19/2007
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Title:
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STRAINED SEMICONDUCTOR-ON-INSULATOR (SSOI) BY A SIMOX METHOD
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Patent #:
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Issue Dt:
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05/12/2009
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11333997
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01/18/2006
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Pub Dt:
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07/19/2007
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Title:
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UTILIZING SIDEWALL SPACER FEATURES TO FORM MAGNETIC TUNNEL JUNCTIONS IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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09/01/2009
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11341701
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01/27/2006
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Pub Dt:
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08/02/2007
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Title:
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METHOD AND APPARATUS FOR MANUFACTURING DATA INDEXING
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Patent #:
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Issue Dt:
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06/10/2008
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11362680
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Filing Dt:
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02/27/2006
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Pub Dt:
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07/06/2006
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Title:
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STRUCTURE AND PROGRAMMING OF LASER FUSE
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Patent #:
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Issue Dt:
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11/10/2009
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11380688
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Filing Dt:
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04/28/2006
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Pub Dt:
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11/01/2007
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Title:
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HIGH PERFORMANCE STRESS-ENHANCE MOSFET AND METHOD OF MANUFACTURE
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Issue Dt:
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03/02/2010
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11381219
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05/02/2006
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Pub Dt:
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11/08/2007
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Title:
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METHODS OF FORMING CONTACT OPENINGS
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Patent #:
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Issue Dt:
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09/08/2009
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11382135
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05/08/2006
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02/01/2007
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Title:
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TECHNIQUE FOR EFFICIENTLY PATTERNING AN UNDERBUMP METALLIZATION LAYER USING A DRY ETCH PROCESS
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06/09/2009
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11393270
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03/30/2006
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10/11/2007
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Title:
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PROGRAMMABLE VIA STRUCTURE FOR THREE DIMENSIONAL INTEGRATION TECHNOLOGY
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08/12/2008
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11409244
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04/21/2006
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10/25/2007
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Title:
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CONDUCTIVE BONDING MATERIAL FILL TECHNIQUES
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06/08/2010
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11410695
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04/24/2006
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Title:
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METHODS FOR FABRICATING DUAL BIT FLASH MEMORY DEVICES
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06/10/2008
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11411280
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04/26/2006
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11/01/2007
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Title:
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HYBRID ORIENTATION SOI SUBSTRATES, AND METHOD FOR FORMING THE SAME
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11/24/2009
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11411353
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04/25/2006
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SELECTIVE CONTACT FORMATION USING MASKING AND RESIST PATTERNING TECHNIQUES
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11/17/2009
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11415922
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05/01/2006
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11/01/2007
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Title:
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METHOD FOR FORMING SELF-ALIGNED METAL SILICIDE CONTACTS
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04/07/2009
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11419217
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05/19/2006
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11/22/2007
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Title:
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COMPRESSIVE NITRIDE FILM AND METHOD OF MANUFACTURING THEREOF
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09/15/2009
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11419271
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05/19/2006
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12/06/2007
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APPARATUS, SYSTEM, AND METHOD FOR DYNAMIC RECOVERY AND RESTORATION FROM DESIGN DEFECTS IN AN INTEGRATED CIRCUIT
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11/17/2009
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11419852
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05/23/2006
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03/01/2007
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METHOD AND SYSTEM FOR AUTOMATICALLY DETECTING EXPOSED SUBSTRATES HAVING A HIGH PROBABILITY FOR DEFOCUSED EXPOSURE FIELDS
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05/20/2008
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11420527
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05/26/2006
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11/29/2007
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TRENCH WIDENING WITHOUT MERGING
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03/23/2010
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11422979
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06/08/2006
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12/13/2007
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METHODS OF FORMING SOLDER CONNECTIONS AND STRUCTURE THEREOF
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03/25/2008
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11425491
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06/21/2006
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11/30/2006
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Title:
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ELECTROSTATIC DISCHARGE PROTECTION NETWORKS FOR TRIPLE WELL SEMICONDUCTOR DEVICES
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05/12/2009
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11445326
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06/02/2006
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12/06/2007
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Title:
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RADIATION SENSITIVE SELF-ASSEMBLED MONOLAYERS AND USES THEREOF
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10/06/2009
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11451869
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06/13/2006
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12/13/2007
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Title:
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HIGH PERFORMANCE CMOS DEVICES COMPRISING GAPPED DUAL STRESSORS WITH DIELECTRIC GAP FILLERS, AND METHODS OF FABRICATING THE SAME
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06/17/2008
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11458120
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07/18/2006
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12/07/2006
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Title:
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METHOD OF FABRICATING A BOTTLE TRENCH AND A BOTTLE TRENCH CAPACITOR
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08/18/2009
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11470809
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09/07/2006
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03/13/2008
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DEEP TRENCH CAPACITOR THROUGH SOI SUBSTRATE AND METHODS OF FORMING
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07/22/2008
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11496120
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07/31/2006
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01/31/2008
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Title:
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THREE-DIMENSIONAL CASCADED POWER DISTRIBUTION IN A SEMICONDUCTOR DEVICE
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Issue Dt:
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05/08/2012
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11511815
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08/29/2006
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03/06/2008
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THROUGH BOARD STACKING OF MULTIPLE LGA-CONNECTED COMPONENTS
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11/02/2010
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11516208
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09/06/2006
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Pub Dt:
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03/06/2008
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Title:
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VERTICAL FIELD EFFECT TRANSISTOR ARRAYS AND METHODS FOR FABRICATION THEREOF
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Issue Dt:
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03/17/2009
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11536126
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09/28/2006
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04/03/2008
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Title:
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STRESSED FIELD EFFECT TRANSISTOR AND METHODS FOR ITS FABRICATION
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12/29/2009
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11536730
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09/29/2006
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08/02/2007
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Title:
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TECHNIQUE FOR NON-DESTRUCTIVE METAL DELAMINATION MONITORING IN SEMICONDUCTOR DEVICES
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