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Reel/Frame:054479/0842   Pages: 121
Recorded: 11/19/2020
Attorney Dkt #:0941-4477M
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 727
Page 4 of 8
Pages: 1 2 3 4 5 6 7 8
1
Patent #:
Issue Dt:
02/05/2013
Application #:
12707962
Filing Dt:
02/18/2010
Publication #:
Pub Dt:
08/19/2010
Title:
POLARIZATION MONITORING RETICLE DESIGN FOR HIGH NUMERICAL APERTURE LITHOGRAPHY SYSTEMS
2
Patent #:
Issue Dt:
11/11/2014
Application #:
12711322
Filing Dt:
02/24/2010
Publication #:
Pub Dt:
09/02/2010
Title:
STRAIN ENGINEERING IN SEMICONDUCTOR DEVICES BY USING A PIEZOELECTRIC MATERIAL
3
Patent #:
Issue Dt:
09/25/2012
Application #:
12718567
Filing Dt:
03/05/2010
Publication #:
Pub Dt:
09/08/2011
Title:
SPATIAL CORRELATION-BASED ESTIMATION OF YIELD OF INTEGRATED CIRCUITS
4
Patent #:
Issue Dt:
05/28/2013
Application #:
12719058
Filing Dt:
03/08/2010
Publication #:
Pub Dt:
09/08/2011
Title:
GRAPHENE BASED THREE-DIMENSIONAL INTEGRATED CIRCUIT DEVICE
5
Patent #:
Issue Dt:
12/10/2013
Application #:
12723842
Filing Dt:
03/15/2010
Publication #:
Pub Dt:
09/15/2011
Title:
NANOPORE BASED DEVICE FOR CUTTING LONG DNA MOLECULES INTO FRAGMENTS
6
Patent #:
Issue Dt:
05/21/2013
Application #:
12731369
Filing Dt:
03/25/2010
Publication #:
Pub Dt:
07/15/2010
Title:
New Flux Composition and Process For Use Thereof
7
Patent #:
Issue Dt:
01/22/2013
Application #:
12731469
Filing Dt:
03/25/2010
Publication #:
Pub Dt:
09/29/2011
Title:
TEST PAD STRUCTURE FOR REUSE OF INTERCONNECT LEVEL MASKS
8
Patent #:
Issue Dt:
10/14/2014
Application #:
12749890
Filing Dt:
03/30/2010
Publication #:
Pub Dt:
09/30/2010
Title:
ENHANCING ADHESION OF INTERLAYER DIELECTRIC MATERIALS OF SEMICONDUCTOR DEVICES BY SUPPRESSING SILICIDE FORMATION AT THE SUBSTRATE EDGE
9
Patent #:
Issue Dt:
03/05/2013
Application #:
12753270
Filing Dt:
04/02/2010
Publication #:
Pub Dt:
10/06/2011
Title:
CONTROLLING FERROELECTRICITY IN DIELECTRIC FILMS BY PROCESS INDUCED UNIAXIAL STRAIN
10
Patent #:
Issue Dt:
05/07/2013
Application #:
12754917
Filing Dt:
04/06/2010
Publication #:
Pub Dt:
10/06/2011
Title:
FIELD EFFECT TRANSISTOR DEVICE AND FABRICATION
11
Patent #:
Issue Dt:
07/12/2011
Application #:
12759479
Filing Dt:
04/13/2010
Publication #:
Pub Dt:
08/05/2010
Title:
PHASE CHANGE MEMORY WITH DUAL WORD LINES AND SOURCE LINES AND METHOD OF OPERATING SAME
12
Patent #:
Issue Dt:
10/30/2012
Application #:
12764244
Filing Dt:
04/21/2010
Publication #:
Pub Dt:
10/27/2011
Title:
SHIELDING FOR HIGH-VOLTAGE SEMICONDUCTOR-ON-INSULATOR DEVICES
13
Patent #:
Issue Dt:
08/20/2013
Application #:
12765275
Filing Dt:
04/22/2010
Publication #:
Pub Dt:
11/11/2010
Title:
ELECTRICAL FUSES AND RESISTORS HAVING SUBLITHOGRAPHIC DIMENSIONS
14
Patent #:
Issue Dt:
04/09/2013
Application #:
12766468
Filing Dt:
04/23/2010
Publication #:
Pub Dt:
10/27/2011
Title:
USE OF EPITAXIAL NI SILICIDE
15
Patent #:
Issue Dt:
08/21/2012
Application #:
12770420
Filing Dt:
04/29/2010
Publication #:
Pub Dt:
11/03/2011
Title:
CLOCK ALIAS FOR TIMING ANALYSIS OF AN INTEGRATED CIRCUIT DESIGN
16
Patent #:
Issue Dt:
03/25/2014
Application #:
12774223
Filing Dt:
05/20/2010
Publication #:
Pub Dt:
11/24/2011
Title:
Enhanced Modularity in Heterogeneous 3D Stacks
17
Patent #:
Issue Dt:
03/24/2015
Application #:
12776674
Filing Dt:
05/10/2010
Publication #:
Pub Dt:
11/18/2010
Title:
MULTI-STEP DEPOSITION OF A SPACER MATERIAL FOR REDUCING VOID FORMATION IN A DIELECTRIC MATERIAL OF A CONTACT LEVEL OF A SEMICONDUCTOR DEVICE
18
Patent #:
Issue Dt:
03/04/2014
Application #:
12776879
Filing Dt:
05/10/2010
Publication #:
Pub Dt:
11/18/2010
Title:
SEMICONDUCTOR ELEMENT FORMED IN A CRYSTALLINE SUBSTRATE MATERIAL AND COMPRISING AN EMBEDDED IN SITU DOPED SEMICONDUCTOR MATERIAL
19
Patent #:
Issue Dt:
10/15/2013
Application #:
12778130
Filing Dt:
05/12/2010
Publication #:
Pub Dt:
11/17/2011
Title:
CIRCUIT DEVICE WITH SIGNAL LINE TRANSITION ELEMENT
20
Patent #:
Issue Dt:
05/06/2014
Application #:
12779100
Filing Dt:
05/13/2010
Publication #:
Pub Dt:
11/17/2011
Title:
METHODOLOGY FOR FABRICATING ISOTROPICALLY RECESSED SOURCE AND DRAIN REGIONS OF CMOS TRANSISTORS
21
Patent #:
Issue Dt:
02/26/2013
Application #:
12780193
Filing Dt:
05/14/2010
Publication #:
Pub Dt:
11/17/2011
Title:
NON-UNIFORM GATE DIELECTRIC CHARGE FOR PIXEL SENSOR CELLS AND METHODS OF MANUFACTURING
22
Patent #:
Issue Dt:
05/21/2013
Application #:
12787461
Filing Dt:
05/26/2010
Publication #:
Pub Dt:
12/30/2010
Title:
UNIFORM HIGH-K METAL GATE STACKS BY ADJUSTING THRESHOLD VOLTAGE FOR SOPHISTICATED TRANSISTORS BY DIFFUSING A METAL SPECIES PRIOR TO GATE PATTERNING
23
Patent #:
Issue Dt:
01/25/2011
Application #:
12788521
Filing Dt:
05/27/2010
Publication #:
Pub Dt:
09/16/2010
Title:
SEMICONDUCTOR CHIPS WITH CRACK STOP REGIONS FOR REDUCING CRACK PROPAGATION FROM CHIP EDGES/CORNERS
24
Patent #:
Issue Dt:
10/15/2013
Application #:
12793046
Filing Dt:
06/03/2010
Publication #:
Pub Dt:
12/08/2011
Title:
CONTACT RESISTIVITY REDUCTION IN TRANSISTOR DEVICES BY DEEP LEVEL IMPURITY FORMATION
25
Patent #:
Issue Dt:
02/12/2013
Application #:
12795962
Filing Dt:
06/08/2010
Publication #:
Pub Dt:
12/08/2011
Title:
STRUCTURE AND METHOD FOR REPLACEMENT GATE MOSFET WITH SELF-ALIGNED CONTACT USING SACRIFICIAL MANDREL DIELECTRIC
26
Patent #:
Issue Dt:
04/23/2013
Application #:
12797420
Filing Dt:
06/09/2010
Publication #:
Pub Dt:
12/15/2011
Title:
SEMICONDUCTOR DEVICES HAVING STRESSOR REGIONS AND RELATED FABRICATION METHODS
27
Patent #:
Issue Dt:
10/22/2013
Application #:
12818828
Filing Dt:
06/18/2010
Publication #:
Pub Dt:
12/22/2011
Title:
INTERFACE-FREE METAL GATE STACK
28
Patent #:
Issue Dt:
05/21/2013
Application #:
12821507
Filing Dt:
06/23/2010
Publication #:
Pub Dt:
12/29/2011
Title:
SHORT CHANNEL SEMICONDUCTOR DEVICES WITH REDUCED HALO DIFFUSION
29
Patent #:
Issue Dt:
12/03/2013
Application #:
12822021
Filing Dt:
06/23/2010
Publication #:
Pub Dt:
12/29/2011
Title:
PORT ENABLE SIGNAL GENERATION FOR GATING A MEMORY ARRAY DEVICE OUTPUT
30
Patent #:
Issue Dt:
05/28/2013
Application #:
12823660
Filing Dt:
06/25/2010
Publication #:
Pub Dt:
12/30/2010
Title:
NON-INSULATING STRESSED MATERIAL LAYERS IN A CONTACT LEVEL OF SEMICONDUCTOR DEVICES
31
Patent #:
Issue Dt:
05/28/2013
Application #:
12823728
Filing Dt:
06/25/2010
Publication #:
Pub Dt:
12/29/2011
Title:
FERRO-ELECTRIC CAPACITOR MODULES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
32
Patent #:
Issue Dt:
11/19/2013
Application #:
12823984
Filing Dt:
06/25/2010
Publication #:
Pub Dt:
12/29/2011
Title:
Digital Interface for Fast, Inline, Statistical Characterization of Process, MOS Device and Circuit Variations
33
Patent #:
Issue Dt:
07/23/2013
Application #:
12825791
Filing Dt:
06/29/2010
Publication #:
Pub Dt:
12/29/2011
Title:
FIELD EFFECT TRANSISTOR DEVICE
34
Patent #:
Issue Dt:
08/27/2013
Application #:
12832375
Filing Dt:
07/08/2010
Publication #:
Pub Dt:
01/12/2012
Title:
METHOD TO EVALUATE EFFECTIVENESS OF SUBSTRATE CLEANNESS AND QUANTITY OF PIN HOLES IN AN ANTIREFLECTIVE COATING OF A SOLAR CELL
35
Patent #:
Issue Dt:
10/01/2013
Application #:
12835967
Filing Dt:
07/14/2010
Publication #:
Pub Dt:
11/04/2010
Title:
INTERLAYER DIELECTRIC MATERIAL IN A SEMICONDUCTOR DEVICE COMPRISING STRESSED LAYERS WITH AN INTERMEDIATE BUFFER MATERIAL
36
Patent #:
Issue Dt:
03/04/2014
Application #:
12838597
Filing Dt:
07/19/2010
Publication #:
Pub Dt:
01/19/2012
Title:
TECHNIQUES FOR FORMING NARROW COPPER FILLED VIAS HAVING IMPROVED CONDUCTIVITY
37
Patent #:
Issue Dt:
05/28/2013
Application #:
12839026
Filing Dt:
07/19/2010
Publication #:
Pub Dt:
02/03/2011
Title:
METHOD OF FORMING A SEMICONDUCTOR DEVICE INCLUDING A STRESS BUFFER MATERIAL FORMED ABOVE A LOW-K METALLIZATION SYSTEM
38
Patent #:
Issue Dt:
05/21/2013
Application #:
12839455
Filing Dt:
07/20/2010
Publication #:
Pub Dt:
02/03/2011
Title:
METHOD OF MANUFACTURING A CMOS DEVICE INCLUDING MOLECULAR STORAGE ELEMENTS IN A VIA LEVEL
39
Patent #:
Issue Dt:
04/30/2013
Application #:
12840689
Filing Dt:
07/21/2010
Publication #:
Pub Dt:
01/26/2012
Title:
METHOD AND STRUCTURE FOR BALANCING POWER AND PERFORMANCE USING FLUORINE AND NITROGEN DOPED SUBSTRATES
40
Patent #:
Issue Dt:
06/03/2014
Application #:
12842548
Filing Dt:
07/23/2010
Publication #:
Pub Dt:
02/03/2011
Title:
INCREASED DENSITY OF LOW-K DIELECTRIC MATERIALS IN SEMICONDUCTOR DEVICES BY APPLYING A UV TREATMENT
41
Patent #:
Issue Dt:
05/14/2013
Application #:
12844263
Filing Dt:
07/27/2010
Publication #:
Pub Dt:
02/03/2011
Title:
THREE-DIMENSIONAL SEMICONDUCTOR DEVICE COMPRISING AN INTER-DIE CONNECTION ON THE BASIS OF FUNCTIONAL MOLECULES
42
Patent #:
Issue Dt:
09/11/2012
Application #:
12849171
Filing Dt:
08/03/2010
Publication #:
Pub Dt:
02/09/2012
Title:
FRACTURING CONTINUOUS PHOTOLITHOGRAPHY MASKS
43
Patent #:
Issue Dt:
02/07/2012
Application #:
12851232
Filing Dt:
08/05/2010
Publication #:
Pub Dt:
12/02/2010
Title:
VERTICAL FIELD EFFECT TRANSISTOR ARRAYS INCLUDING GATE ELECTRODES ANNULARLY SURROUNDING SEMICONDUCTOR PILLARS
44
Patent #:
Issue Dt:
03/06/2012
Application #:
12853354
Filing Dt:
08/10/2010
Publication #:
Pub Dt:
12/23/2010
Title:
METHODS TO MITIGATE PLASMA DAMAGE IN ORGANOSILICATE DIELECTRICS USING A PROTECTIVE SIDEWALL SPACER
45
Patent #:
Issue Dt:
08/27/2013
Application #:
12854995
Filing Dt:
08/12/2010
Publication #:
Pub Dt:
03/03/2011
Title:
UV IRRADIANCE MONITORING IN SEMICONDUCTOR PROCESSING USING A TEMPERATURE DEPENDENT SIGNAL
46
Patent #:
Issue Dt:
04/23/2013
Application #:
12862203
Filing Dt:
08/24/2010
Publication #:
Pub Dt:
03/03/2011
Title:
STRESS ADJUSTMENT IN STRESSED DIELECTRIC MATERIALS OF SEMICONDUCTOR DEVICES BY STRESS RELAXATION BASED ON RADIATION
47
Patent #:
Issue Dt:
03/04/2014
Application #:
12869973
Filing Dt:
08/27/2010
Publication #:
Pub Dt:
03/01/2012
Title:
CONTROLLING NON-PROCESS OF RECORD (POR) PROCESS LIMITING YIELD (PLY) INSPECTION WORK
48
Patent #:
Issue Dt:
11/05/2013
Application #:
12873058
Filing Dt:
08/31/2010
Publication #:
Pub Dt:
03/01/2012
Title:
POST-FABRICATION SELF-ALIGNED INITIALIZATION OF INTEGRATED DEVICES
49
Patent #:
Issue Dt:
01/28/2014
Application #:
12876518
Filing Dt:
09/07/2010
Publication #:
Pub Dt:
12/30/2010
Title:
SOLUTION FOR FORMING POLISHING SLURRY, POLISHING SLURRY AND RELATED METHODS
50
Patent #:
Issue Dt:
07/23/2013
Application #:
12878297
Filing Dt:
09/09/2010
Publication #:
Pub Dt:
03/15/2012
Title:
Implementing Interleaved-Dielectric Joining of Multi-Layer Laminates
51
Patent #:
Issue Dt:
02/18/2014
Application #:
12880085
Filing Dt:
09/11/2010
Publication #:
Pub Dt:
03/15/2012
Title:
Transistor having replacement metal gate and process for fabricating the same
52
Patent #:
Issue Dt:
07/23/2013
Application #:
12885665
Filing Dt:
09/20/2010
Publication #:
Pub Dt:
03/22/2012
Title:
STRUCTURE FOR NANO-SCALE METALLIZATION AND METHOD FOR FABRICATING SAME
53
Patent #:
Issue Dt:
07/09/2013
Application #:
12888828
Filing Dt:
09/23/2010
Publication #:
Pub Dt:
03/29/2012
Title:
ASYMMETRIC WEDGE JFET, RELATED METHOD AND DESIGN STRUCTURE
54
Patent #:
Issue Dt:
05/13/2014
Application #:
12890051
Filing Dt:
09/24/2010
Publication #:
Pub Dt:
03/29/2012
Title:
STRUCTURES AND TECHNIQUES FOR ATOMIC LAYER DEPOSITION
55
Patent #:
Issue Dt:
05/06/2014
Application #:
12891403
Filing Dt:
09/27/2010
Publication #:
Pub Dt:
03/31/2011
Title:
SUPERIOR FILL CONDITIONS IN A REPLACEMENT GATE APPROACH BY CORNER ROUNDING BASED ON A SACRIFICIAL FILL MATERIAL
56
Patent #:
Issue Dt:
12/17/2013
Application #:
12894469
Filing Dt:
09/30/2010
Publication #:
Pub Dt:
05/05/2011
Title:
METHOD FOR MAKING SEMICONDUCTOR DEVICE COMPRISING REPLACEMENT GATE ELECTRODE STRUCTURES WITH AN ENHANCED DIFFUSION BARRIER
57
Patent #:
Issue Dt:
08/13/2013
Application #:
12897230
Filing Dt:
10/04/2010
Publication #:
Pub Dt:
04/05/2012
Title:
ISOLATION STRUCTURES FOR GLOBAL SHUTTER IMAGER PIXEL, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
58
Patent #:
Issue Dt:
03/27/2012
Application #:
12899333
Filing Dt:
10/06/2010
Publication #:
Pub Dt:
06/02/2011
Title:
TRANSISTOR INCLUDING A HIGH-K METAL GATE ELECTRODE STRUCTURE FORMED ON THE BASIS OF A SIMPLIFIED SPACER REGIME
59
Patent #:
Issue Dt:
08/07/2012
Application #:
12899638
Filing Dt:
10/07/2010
Publication #:
Pub Dt:
04/12/2012
Title:
TECHNIQUE TO CREATE A BURIED PLATE IN EMBEDDED DYNAMIC RANDOM ACCESS MEMORY DEVICE
60
Patent #:
Issue Dt:
08/05/2014
Application #:
12901079
Filing Dt:
10/08/2010
Publication #:
Pub Dt:
01/27/2011
Title:
HEATER AND MEMORY CELL, MEMORY DEVICE AND RECORDING HEAD INCLUDING THE HEATER
61
Patent #:
Issue Dt:
09/17/2013
Application #:
12905711
Filing Dt:
10/15/2010
Publication #:
Pub Dt:
06/30/2011
Title:
PREDOPED SEMICONDUCTOR MATERIAL FOR A HIGH-K METAL GATE ELECTRODE STRUCTURE OF P- AND N-CHANNEL TRANSISTORS
62
Patent #:
Issue Dt:
01/28/2014
Application #:
12906707
Filing Dt:
10/18/2010
Publication #:
Pub Dt:
04/19/2012
Title:
METHODOLOGY ON DEVELOPING METAL FILL AS LIBRARY DEVICE AND DESIGN STRUCTURE
63
Patent #:
Issue Dt:
12/02/2014
Application #:
12907186
Filing Dt:
10/19/2010
Publication #:
Pub Dt:
02/10/2011
Title:
SELECTIVE DEPOSITION OF GERMANIUM SPACERS ON NITRIDE
64
Patent #:
Issue Dt:
06/10/2014
Application #:
12907596
Filing Dt:
10/19/2010
Publication #:
Pub Dt:
06/30/2011
Title:
ENHANCED CONFINEMENT OF SENSITIVE MATERIALS OF A HIGH-K METAL GATE ELECTRODE STRUCTURE
65
Patent #:
Issue Dt:
07/09/2013
Application #:
12914123
Filing Dt:
10/28/2010
Publication #:
Pub Dt:
08/04/2011
Title:
SEMICONDUCTOR ELEMENT COMPRISING A LOW VARIATION SUBSTRATE DIODE
66
Patent #:
Issue Dt:
05/07/2013
Application #:
12915168
Filing Dt:
10/29/2010
Publication #:
Pub Dt:
08/04/2011
Title:
SOI SEMICONDUCTOR DEVICE COMPRISING SUBSTRATE DIODES HAVING A TOPOGRAPHY TOLERANT CONTACT STRUCTURE
67
Patent #:
Issue Dt:
01/28/2014
Application #:
12939462
Filing Dt:
11/04/2010
Publication #:
Pub Dt:
05/10/2012
Title:
ASYMMETRIC HETERO-STRUCTURE FET AND METHOD OF MANUFACTURE
68
Patent #:
Issue Dt:
06/13/2017
Application #:
12942011
Filing Dt:
11/08/2010
Publication #:
Pub Dt:
05/10/2012
Title:
OPTIMIZING STORAGE CLOUD ENVIRONMENTS THROUGH ADAPTIVE STATISTICAL MODELING
69
Patent #:
Issue Dt:
06/03/2014
Application #:
12943084
Filing Dt:
11/10/2010
Publication #:
Pub Dt:
05/10/2012
Title:
BUTTED SOI JUNCTION ISOLATION STRUCTURES AND DEVICES AND METHOD OF FABRICATION
70
Patent #:
Issue Dt:
01/21/2014
Application #:
12943987
Filing Dt:
11/11/2010
Publication #:
Pub Dt:
05/17/2012
Title:
CREATING ANISOTROPICALLY DIFFUSED JUNCTIONS IN FIELD EFFECT TRANSISTOR DEVICES
71
Patent #:
Issue Dt:
03/12/2013
Application #:
12946915
Filing Dt:
11/16/2010
Publication #:
Pub Dt:
05/17/2012
Title:
HYDROGEN BARRIER LINER FOR FERRO-ELECTRIC RANDOM ACCESS MEMORY (FRAM) CHIP
72
Patent #:
Issue Dt:
07/24/2012
Application #:
12948092
Filing Dt:
11/17/2010
Publication #:
Pub Dt:
05/17/2012
Title:
NI PLATING OF A BLM EDGE FOR PB-FREE C4 UNDERCUT CONTROL
73
Patent #:
Issue Dt:
08/13/2013
Application #:
12949148
Filing Dt:
11/18/2010
Publication #:
Pub Dt:
05/24/2012
Title:
METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A CUT-WAY HOLE TO EXPOSE A PORTION OF A HARDMASK LAYER
74
Patent #:
Issue Dt:
10/29/2013
Application #:
12949888
Filing Dt:
11/19/2010
Publication #:
Pub Dt:
05/24/2012
Title:
SOURCE/DRAIN-TO-SOURCE/DRAIN RECESSED STRAP AND METHODS OF MANUFACTURE OF SAME
75
Patent #:
Issue Dt:
01/20/2015
Application #:
12955388
Filing Dt:
11/29/2010
Publication #:
Pub Dt:
05/31/2012
Title:
MULTIGATE STRUCTURE FORMED WITH ELECTROLESS METAL DEPOSITION
76
Patent #:
Issue Dt:
08/13/2013
Application #:
12956291
Filing Dt:
11/30/2010
Publication #:
Pub Dt:
04/07/2011
Title:
BODY CONTROLLED DOUBLE CHANNEL TRANSISTOR AND CIRCUITS COMPRISING THE SAME
77
Patent #:
Issue Dt:
03/25/2014
Application #:
12958678
Filing Dt:
12/02/2010
Publication #:
Pub Dt:
06/07/2012
Title:
MECHANICAL FIXTURE OF PELLICLE TO LITHOGRAPHIC PHOTOMASK
78
Patent #:
Issue Dt:
02/11/2014
Application #:
12959824
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
06/07/2012
Title:
METHOD OF FORMING SUBSTRATE CONTACT FOR SEMICONDUCTOR ON INSULATOR (SOI) SUBSTRATE
79
Patent #:
Issue Dt:
05/28/2013
Application #:
12962968
Filing Dt:
12/08/2010
Publication #:
Pub Dt:
10/06/2011
Title:
CONTACT ELEMENTS OF A SEMICONDUCTOR DEVICE FORMED BY ELECTROLESS PLATING AND EXCESS MATERIAL REMOVAL WITH REDUCED SHEER FORCES
80
Patent #:
Issue Dt:
08/27/2013
Application #:
12963054
Filing Dt:
12/08/2010
Publication #:
Pub Dt:
06/14/2012
Title:
SEMICONDUCTOR DEVICE INCLUDING ASYMMETRIC LIGHTLY DOPED DRAIN (LDD) REGION, RELATED METHOD AND DESIGN STRUCTURE
81
Patent #:
Issue Dt:
08/06/2013
Application #:
12963134
Filing Dt:
12/08/2010
Publication #:
Pub Dt:
10/06/2011
Title:
REDUCTION OF MECHANICAL STRESS IN METAL STACKS OF SOPHISTICATED SEMICONDUCTOR DEVICES DURING DIE-SUBSTRATE SOLDERING BY AN ENHANCED COOL DOWN REGIME
82
Patent #:
Issue Dt:
07/23/2013
Application #:
12963139
Filing Dt:
12/08/2010
Publication #:
Pub Dt:
06/14/2012
Title:
SOLDER BUMP CONNECTIONS
83
Patent #:
Issue Dt:
05/08/2012
Application #:
12964136
Filing Dt:
12/09/2010
Publication #:
Pub Dt:
11/03/2011
Title:
REDUCED STI TOPOGRAPHY IN HIGH-K METAL GATE TRANSISTORS BY USING A MASK AFTER CHANNEL SEMICONDUCTOR ALLOY DEPOSITION
84
Patent #:
Issue Dt:
08/13/2013
Application #:
12964359
Filing Dt:
12/09/2010
Publication #:
Pub Dt:
12/01/2011
Title:
CHIP PACKAGE INCLUDING MULTIPLE SECTIONS FOR REDUCING CHIP PACKAGE INTERACTION
85
Patent #:
Issue Dt:
07/30/2013
Application #:
12964448
Filing Dt:
12/09/2010
Publication #:
Pub Dt:
12/01/2011
Title:
STRESS REDUCTION IN CHIP PACKAGING BY A STRESS COMPENSATION REGION FORMED AROUND THE CHIP
86
Patent #:
Issue Dt:
07/22/2014
Application #:
12966302
Filing Dt:
12/13/2010
Publication #:
Pub Dt:
01/05/2012
Title:
Semiconductor Device Including Ultra Low-K (ULK) Metallization Stacks with Reduced Chip-Package Interaction
87
Patent #:
Issue Dt:
08/20/2013
Application #:
12967268
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
12/22/2011
Title:
TRANSISTOR STRUCTURE WITH A SIDEWALL-DEFINED INTRINSIC BASE TO EXTRINSIC BASE LINK-UP REGION AND METHOD OF FORMING THE TRANSISTOR
88
Patent #:
Issue Dt:
04/15/2014
Application #:
12967329
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/14/2012
Title:
PARTIALLY DEPLETED (PD) SEMICONDUCTOR-ON-INSULATOR (SOI) FIELD EFFECT TRANSISTOR (FET) STRUCTURE WITH A GATE-TO-BODY TUNNEL CURRENT REGION FOR THRESHOLD VOLTAGE (VT) LOWERING AND METHOD OF FORMING THE STRUCTURE
89
Patent #:
Issue Dt:
06/17/2014
Application #:
12967625
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/14/2012
Title:
METHOD OF FABRICATING PHOTOCONDUCTOR-ON-ACTIVE PIXEL DEVICE
90
Patent #:
Issue Dt:
11/19/2013
Application #:
12969969
Filing Dt:
12/16/2010
Publication #:
Pub Dt:
11/03/2011
Title:
PLANARIZATION OF A MATERIAL SYSTEM IN A SEMICONDUCTOR DEVICE BY USING A NON-SELECTIVE IN SITU PREPARED SLURRY
91
Patent #:
Issue Dt:
10/23/2012
Application #:
12973377
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
04/14/2011
Title:
BODY TIE TEST STRUCTURE FOR ACCURATE BODY EFFECT MEASUREMENT
92
Patent #:
Issue Dt:
10/22/2013
Application #:
12977134
Filing Dt:
12/23/2010
Publication #:
Pub Dt:
04/21/2011
Title:
ELECTRICALLY CONDUCTIVE PATH FORMING BELOW BARRIER OXIDE LAYER AND INTEGRATED CIRCUIT
93
Patent #:
Issue Dt:
09/24/2013
Application #:
12983352
Filing Dt:
01/03/2011
Publication #:
Pub Dt:
07/05/2012
Title:
SEMICONDUCTOR DEVICE INCLUDING BODY CONNECTED FETS
94
Patent #:
Issue Dt:
04/16/2013
Application #:
12983377
Filing Dt:
01/03/2011
Publication #:
Pub Dt:
04/28/2011
Title:
METHOD FOR DIRECT HEAT SINK ATTACHMENT
95
Patent #:
Issue Dt:
09/09/2014
Application #:
12983477
Filing Dt:
01/03/2011
Publication #:
Pub Dt:
05/12/2011
Title:
METHOD OF FORMING ASYMMETRIC SPACERS AND METHODS OF FABRICATING SEMICONDUCTOR DEVICE USING ASYMMETRIC SPACERS
96
Patent #:
Issue Dt:
12/17/2013
Application #:
13006148
Filing Dt:
01/13/2011
Publication #:
Pub Dt:
01/05/2012
Title:
TRANSISTOR WITH EMBEDDED SI/GE MATERIAL HAVING REDUCED OFFSET AND SUPERIOR UNIFORMITY
97
Patent #:
Issue Dt:
02/25/2014
Application #:
13006522
Filing Dt:
01/14/2011
Publication #:
Pub Dt:
01/05/2012
Title:
METHOD AND SYSTEM FOR EXCURSION MONITORING IN OPTICAL LITHOGRAPHY PROCESSES IN MICRO DEVICE FABRICATION
98
Patent #:
Issue Dt:
05/13/2014
Application #:
13008935
Filing Dt:
01/19/2011
Publication #:
Pub Dt:
07/19/2012
Title:
MINIMIZING THE MAXIMUM REQUIRED LINK CAPACITY FOR THREE-DIMENSIONAL INTERCONNECT ROUTING
99
Patent #:
Issue Dt:
07/02/2013
Application #:
13010009
Filing Dt:
01/20/2011
Publication #:
Pub Dt:
06/30/2011
Title:
GATE CONDUCTOR WITH A DIFFUSION BARRIER
100
Patent #:
Issue Dt:
01/07/2014
Application #:
13012179
Filing Dt:
01/24/2011
Publication #:
Pub Dt:
07/26/2012
Title:
DISCRETE SAMPLING BASED NONLINEAR CONTROL SYSTEM
Assignor
1
Exec Dt:
04/10/2020
Assignee
1
P.O. BOX 309, UGLAND HOUSE
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
BIRCH, STEWART, KOLASCH & BIRCH, LLP
8110 GATEHOUSE ROAD, SUITE 100 EAST
FALLS CHURCH, VA 22042-1248

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