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Patent #:
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Issue Dt:
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08/07/2012
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Application #:
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10703289
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Filing Dt:
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11/06/2003
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Publication #:
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Pub Dt:
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05/12/2005
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Title:
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NON-VOLATILE MEMORY MANUFACTURING METHOD USING STI TRENCH IMPLANTATION
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Patent #:
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Issue Dt:
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04/19/2016
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Application #:
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10923123
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Filing Dt:
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08/21/2004
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Publication #:
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Pub Dt:
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02/23/2006
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Title:
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Slot designs in wide metal lines
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Patent #:
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Issue Dt:
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11/01/2011
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Application #:
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10970077
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Filing Dt:
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10/20/2004
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Publication #:
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Pub Dt:
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04/20/2006
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Title:
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METHOD AND APPARATUS FOR REMOVING RADIATION SIDE LOBES
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Patent #:
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Issue Dt:
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02/02/2010
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Application #:
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11028421
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Filing Dt:
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01/03/2005
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Publication #:
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Pub Dt:
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07/06/2006
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Title:
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MASK AND METHOD TO PATTERN CHROMELESS PHASE LITHOGRAPHY CONTACT HOLE
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Patent #:
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Issue Dt:
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08/02/2011
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Application #:
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11153747
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Filing Dt:
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06/15/2005
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Publication #:
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Pub Dt:
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12/21/2006
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Title:
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GRAIN BOUNDARY BLOCKING FOR STRESS MIGRATION AND ELECTROMIGRATION IMPROVEMENT IN CU INTERCONNECTS
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Patent #:
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Issue Dt:
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02/22/2011
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Application #:
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11195196
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Filing Dt:
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08/02/2005
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Publication #:
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Pub Dt:
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02/08/2007
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Title:
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FORMATION OF STRAINED SI CHANNEL AND SI1-XGEX SOURCE/DRAIN STRUCTURES USING LASER ANNEALING
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Patent #:
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Issue Dt:
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05/10/2011
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Application #:
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11297522
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Filing Dt:
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12/08/2005
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Publication #:
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Pub Dt:
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06/14/2007
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Title:
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EMBEDDED STRESSOR STRUCTURE AND PROCESS
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Patent #:
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Issue Dt:
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02/15/2011
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Application #:
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11302035
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Filing Dt:
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12/13/2005
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Publication #:
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Pub Dt:
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06/14/2007
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Title:
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SELECTIVE STRESS RELAXATION OF CONTACT ETCH STOP LAYER THROUGH LAYOUT DESIGN
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Patent #:
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Issue Dt:
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07/05/2011
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Application #:
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11369239
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Filing Dt:
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03/06/2006
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Publication #:
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Pub Dt:
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09/06/2007
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Title:
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INTEGRATED CIRCUIT ISOLATION SYSTEM
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Patent #:
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Issue Dt:
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09/13/2011
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Application #:
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11399016
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Filing Dt:
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04/05/2006
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Publication #:
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Pub Dt:
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10/11/2007
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Title:
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METHOD TO CONTROL SOURCE/DRAIN STRESSOR PROFILES FOR STRESS ENGINEERING
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Patent #:
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Issue Dt:
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10/09/2012
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Application #:
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11428618
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Filing Dt:
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07/05/2006
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Publication #:
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Pub Dt:
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02/07/2008
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Title:
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INTEGRATED CIRCUIT SYSTEM INCLUDING NITRIDE LAYER TECHNOLOGY
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Patent #:
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Issue Dt:
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04/01/2014
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Application #:
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11462036
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Filing Dt:
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08/02/2006
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Publication #:
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Pub Dt:
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02/07/2008
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Title:
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INTEGRATED CIRCUIT SYSTEM WITH CONTACT DISTRIBUTION FILM
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Patent #:
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Issue Dt:
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07/03/2012
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Application #:
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11465005
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Filing Dt:
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08/16/2006
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Publication #:
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Pub Dt:
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02/21/2008
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Title:
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SEMICONDUCTOR SYSTEM USING GERMANIUM CONDENSATION
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Patent #:
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Issue Dt:
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06/04/2013
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Application #:
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11465793
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Filing Dt:
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08/18/2006
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Publication #:
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Pub Dt:
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02/21/2008
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Title:
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INTEGRATED CIRCUIT SYSTEM EMPLOYING GATE SHIELD AND/OR GROUND SHIELD
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Patent #:
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Issue Dt:
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07/01/2014
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Application #:
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11466018
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Filing Dt:
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08/21/2006
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Publication #:
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Pub Dt:
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04/05/2007
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Title:
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INTEGRATED CIRCUIT WITH SELF-ALIGNED LINE AND VIA
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Patent #:
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Issue Dt:
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11/06/2012
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Application #:
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11466350
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Filing Dt:
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08/22/2006
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Publication #:
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Pub Dt:
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12/14/2006
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Title:
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SEMICONDUCTOR LOCAL INTERCONNECT AND CONTACT
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Patent #:
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Issue Dt:
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05/15/2012
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Application #:
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11556696
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Filing Dt:
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11/05/2006
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Publication #:
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Pub Dt:
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05/08/2008
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Title:
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APPARATUS AND METHODS FOR CLEANING AND DRYING OF WAFERS
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Patent #:
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Issue Dt:
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11/08/2011
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Application #:
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11614961
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Filing Dt:
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12/21/2006
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Publication #:
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Pub Dt:
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06/26/2008
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Title:
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METHOD OF MANUFACTURE OF AN INTEGRATED CIRCUIT SYSTEM WITH SELF-ALIGNED ISOLATION STRUCTURES
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Patent #:
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Issue Dt:
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04/26/2011
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Application #:
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11617552
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Filing Dt:
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12/28/2006
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Publication #:
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Pub Dt:
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07/03/2008
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Title:
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INTEGRATED CIRCUIT HAVING A PLURALITY OF MOSFET DEVICES
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Patent #:
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Issue Dt:
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02/23/2016
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Application #:
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11683655
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Filing Dt:
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03/08/2007
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Publication #:
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Pub Dt:
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09/13/2007
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Title:
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INTEGRATED CIRCUIT SYSTEM WITH DOUBLE DOPED DRAIN TRANSISTOR
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Patent #:
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Issue Dt:
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05/06/2014
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Application #:
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11686475
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Filing Dt:
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03/15/2007
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Publication #:
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Pub Dt:
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09/18/2008
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Title:
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CAPACITOR TOP PLATE OVER SOURCE/DRAIN TO FORM A 1T MEMORY DEVICE
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Patent #:
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Issue Dt:
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05/28/2013
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Application #:
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11696732
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Filing Dt:
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04/05/2007
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Publication #:
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Pub Dt:
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10/09/2008
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Title:
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LARGE TUNING RANGE JUNCTION VARACTOR
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Patent #:
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Issue Dt:
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02/15/2011
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Application #:
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11706891
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Filing Dt:
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02/14/2007
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Publication #:
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Pub Dt:
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08/02/2007
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Title:
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STRUCTURE AND METHOD TO FORM SOURCE AND DRAIN REGIONS OVER DOPED DEPLETION REGIONS
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Patent #:
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Issue Dt:
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08/14/2012
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Application #:
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11779892
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Filing Dt:
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07/19/2007
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Publication #:
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Pub Dt:
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11/20/2008
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Title:
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TRANSFORMER WITH EFFECTIVE HIGH TURN RATIO
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Patent #:
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Issue Dt:
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01/26/2010
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Application #:
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11832642
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Filing Dt:
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08/01/2007
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Publication #:
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Pub Dt:
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11/22/2007
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Title:
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INTEGRATED CIRCUIT SHIELD STRUCTURE
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Patent #:
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Issue Dt:
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03/12/2013
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11843629
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08/22/2007
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Pub Dt:
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03/06/2008
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Title:
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PROCESSING WITH REDUCED LINE END SHORTENING RATIO
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Patent #:
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12/04/2012
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11853156
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09/11/2007
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Publication #:
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Pub Dt:
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03/12/2009
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Title:
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IMPLEMENTATION OF TEMPERATURE-DEPENDENT PHASE SWITCH LAYER FOR IMPROVED TEMPERATURE UNIFORMITY DURING ANNEALING
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Patent #:
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06/28/2011
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11854972
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09/13/2007
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03/20/2008
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Title:
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INTEGRATED CIRCUIT SYSTEM WITH CLEAN SURFACES
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11/08/2011
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11862213
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09/27/2007
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Pub Dt:
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04/02/2009
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Title:
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METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH REDUCED JUNCTION DIFFUSION
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04/19/2011
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11862865
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09/27/2007
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Pub Dt:
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04/02/2009
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Title:
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METHOD OF FABRICATING A NITROGENATED SILICON OXIDE LAYER AND MOS DEVICE HAVING SAME
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08/09/2011
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11865563
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10/01/2007
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04/02/2009
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Title:
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POLY PROFILE ENGINEERING TO MODULATE SPACER INDUCED STRESS FOR DEVICE ENHANCEMENT
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10/23/2012
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11927658
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10/29/2007
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Pub Dt:
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04/30/2009
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Title:
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CRITICAL DIMENSION FOR TRENCH AND VIAS
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12/30/2014
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11933810
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11/01/2007
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05/08/2008
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Title:
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WAFER HANDLING SYSTEM FOR A LOADLOCK
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10/29/2013
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11943591
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11/21/2007
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05/21/2009
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Title:
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STATISTICAL OPTICAL PROXIMITY CORRECTION
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11/15/2011
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11946843
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11/29/2007
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Pub Dt:
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06/04/2009
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Title:
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INTEGRATED CIRCUIT AND METHOD OF FABRICATION THEREOF
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01/15/2013
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11953881
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12/11/2007
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06/11/2009
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Title:
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METHOD OF FORMING HIGH-K DIELECTRIC STOP LAYER FOR CONTACT HOLE OPENING
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02/01/2011
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11959034
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12/18/2007
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06/18/2009
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Title:
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THIN FILM ETCHING METHOD AND SEMICONDUCTOR DEVICE FABRICATION USING SAME
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08/09/2011
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11965415
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12/27/2007
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07/02/2009
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Title:
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PROCESS FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING EMBEDDED EPITAXIAL REGIONS
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08/07/2012
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11967270
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12/31/2007
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07/02/2009
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Title:
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TUNABLE HIGH QUALITY FACTOR INDUCTOR
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08/23/2011
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11972809
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01/11/2008
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07/16/2009
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INTEGRATED CIRCUIT SYSTEM EMPLOYING MULTIPLE EXPOSURE DUMMY PATTERNING TECHNOLOGY
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08/16/2011
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12008841
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01/15/2008
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07/16/2009
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STRAIN-DIRECT-ON-INSULATOR (SDOI) SUBSTRATE AND METHOD OF FORMING
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04/17/2012
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12023037
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01/31/2008
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07/31/2008
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METHODS AND APPARATUS FOR WHITE SPACE REDUCTION IN A PRODUCTION FACILITY
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09/14/2010
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12030598
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02/13/2008
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08/13/2009
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09/06/2011
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12040562
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02/29/2008
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09/03/2009
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METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING AN EPITAXIAL CHANNEL AND TRANSISTOR HAVING SAME
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03/03/2015
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12040761
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02/29/2008
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09/03/2009
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INTEGRATED CIRCUIT SYSTEM EMPLOYING RESISTANCE ALTERING TECHNIQUES
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03/27/2012
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03/11/2008
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09/17/2009
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12/25/2012
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03/14/2008
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07/24/2008
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INTEGRATED CIRCUIT SYSTEM EMPLOYING STRESS-ENGINEERED SPACERS
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09/25/2012
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12050956
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03/19/2008
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09/24/2009
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HYBRID ORIENTATION SUBSTRATE WITH STRESS LAYER
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10/19/2010
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12057072
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03/27/2008
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10/01/2009
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METHODS FOR NORMALIZING STRAIN IN A SEMICONDUCTOR DEVICE
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08/16/2011
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12062534
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04/04/2008
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10/09/2008
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PLANARIZED PASSIVATION LAYER FOR SEMICONDUCTOR DEVICES
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09/06/2011
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12062535
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04/04/2008
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10/08/2009
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AN INTEGRATED CIRCUIT INCLUDING A STRESSED DIELECTRIC LAYER WITH STABLE STRESS
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02/22/2011
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12098751
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04/07/2008
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10/08/2009
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INTEGRATED CIRCUIT SYSTEM EMPLOYING SACRIFICIAL SPACERS
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06/21/2011
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12103690
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04/15/2008
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10/15/2009
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MULTI-VARIABLE REGRESSION FOR METROLOGY
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05/15/2012
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12107751
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04/22/2008
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10/22/2009
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Title:
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METHOD OF FORMING SHALLOW TRENCH ISOLATION STRUCTURES FOR INTEGRATED CIRCUITS
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Patent #:
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11/22/2011
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12115550
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Filing Dt:
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05/06/2008
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Publication #:
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Pub Dt:
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11/12/2009
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Title:
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METHOD FOR PERFORMING A SHELF LIFETIME ACCELERATION TEST
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06/29/2010
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12124177
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05/21/2008
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Publication #:
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Pub Dt:
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11/26/2009
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Title:
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METHOD FOR REDUCING SILICIDE DEFECTS IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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03/11/2014
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12125030
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Filing Dt:
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05/21/2008
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11/26/2009
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Title:
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METHOD OF FORMING A NANOSTRUCTURE
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02/14/2012
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12132342
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06/03/2008
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Pub Dt:
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12/03/2009
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Title:
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INTEGRATED CIRCUIT SYSTEM EMPLOYING BACK END OF LINE VIA TECHNIQUES
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Patent #:
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Issue Dt:
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04/07/2015
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12133375
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06/05/2008
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12/10/2009
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Title:
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STRESS LINER FOR STRESS ENGINEERING
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04/24/2012
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12134860
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06/06/2008
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12/10/2009
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Title:
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HIGH PERFORMANCE LDMOS DEVICE HAVING ENHANCED DIELECTRIC STRAIN LAYER
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12/04/2012
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12144652
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06/24/2008
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12/24/2009
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Title:
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DIFFUSION BARRIER AND METHOD OF FORMATION THEREOF
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04/29/2014
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12147489
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06/27/2008
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Pub Dt:
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12/31/2009
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Title:
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SYSTEM FOR DETERMINING POTENTIAL LOT CONSOLIDATION DURING MANUFACTURING
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Patent #:
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Issue Dt:
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09/29/2015
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12168816
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07/07/2008
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Pub Dt:
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01/07/2010
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Title:
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INTEGRATED CIRCUIT SYSTEM EMPLOYING ALTERNATING CONDUCTIVE LAYERS
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06/07/2011
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12172756
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07/14/2008
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01/14/2010
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Title:
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SEMICONDUCTOR FABRICATION PROCESS INCLUDING AN SIGE REWORK METHOD
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02/12/2013
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12188226
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08/08/2008
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02/11/2010
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Title:
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POLISHING WITH ENHANCED UNIFORMITY
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09/28/2010
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12196291
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08/22/2008
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02/25/2010
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Title:
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RELIABLE INTERCONNECTS
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11/08/2011
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12203924
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09/04/2008
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Pub Dt:
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03/04/2010
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Title:
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INTERCONNECTS WITH IMPROVED TDDB
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Patent #:
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Issue Dt:
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10/23/2012
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12220792
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07/28/2008
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01/28/2010
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Title:
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METHOD AND APPARATUS TO REDUCE THERMAL VARIATIONS WITHIN AN INTEGRATED CIRCUIT DIE USING THERMAL PROXIMITY CORRECTION
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03/18/2014
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12235043
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09/22/2008
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01/15/2009
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Title:
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INTEGRATED CIRCUIT SYSTEM WITH ANTENNA
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08/16/2011
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12241073
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09/30/2008
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01/29/2009
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Title:
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METHOD TO REMOVE SPACER AFTER SALICIDATION TO ENHANCE CONTACT ETCH STOP LINER STRESS ON MOS
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05/29/2012
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12241105
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09/30/2008
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Pub Dt:
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07/02/2009
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Title:
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INTEGRATED CIRCUIT STRUCTURE WITH ELECTRICAL STRAP AND ITS METHOD OF FORMING
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05/29/2012
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12242570
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09/30/2008
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01/29/2009
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Title:
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OPTICAL COLOR SENSOR SYSTEM
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04/17/2012
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12247479
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10/08/2008
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Pub Dt:
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04/08/2010
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Title:
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INTEGRATED CIRCUIT SYSTEM EMPLOYING BACKSIDE ENERGY SOURCE FOR ELECTRICAL CONTACT FORMATION
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04/10/2012
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12249970
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10/13/2008
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04/15/2010
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Title:
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METHOD FOR REDUCING SIDEWALL ETCH RESIDUE
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05/31/2011
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12262120
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10/30/2008
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05/06/2010
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INTEGRATED CIRCUIT SYSTEM EMPLOYING AN ELEVATED DRAIN
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02/15/2011
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12271262
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11/14/2008
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05/20/2010
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METHOD FOR FORMING A SHALLOW JUNCTION REGION USING DEFECT ENGINEERING AND LASER ANNEALING
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08/07/2012
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12336544
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12/17/2008
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06/17/2010
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TUNABLE SPACERS FOR IMPROVED GAPFILL
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06/26/2012
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12354777
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01/16/2009
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07/22/2010
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METHOD TO PREVENT CORROSION OF BOND PAD STRUCTURE
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08/16/2011
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12361521
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01/28/2009
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07/29/2010
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MEMORY CELL STRUCTURE AND METHOD FOR FABRICATION THEREOF
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11/01/2011
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12378513
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02/17/2009
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08/19/2010
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FABRICATING METHOD FOR CRACK STOP STRUCTURE ENHANCEMENT OF INTEGRATED CIRCUIT SEAL RING
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11/08/2011
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12390509
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02/23/2009
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08/26/2010
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METHOD OF FORMING A HIGH VOLTAGE DEVICE
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05/28/2013
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12392093
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02/24/2009
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08/27/2009
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METHODS FOR ENHANCING PHOTOLITHOGRAPHY PATTERNING
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12/16/2014
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12396441
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03/02/2009
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09/02/2010
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LASER ANNEALING
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10/11/2011
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12401622
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03/11/2009
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09/16/2010
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RELIABLE MEMORY CELL
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08/14/2012
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12422694
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04/13/2009
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10/14/2010
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INTEGRATED CIRCUIT SYSTEM WITH A FLOATING DIELECTRIC REGION AND METHOD OF MANUFACTURE THEREOF
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02/22/2011
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12429916
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04/24/2009
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10/28/2010
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INTEGRATED CIRCUIT PACKAGING SYSTEM AND METHOD OF MANUFACTURE THEREOF
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02/04/2014
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12432162
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04/29/2009
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11/04/2010
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02/01/2011
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12436793
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05/07/2009
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11/11/2010
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06/10/2014
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12456440
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06/16/2009
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12/16/2010
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NON-VOLATILE MEMORY UTILIZING IMPACT IONIZATION AND TUNNELLING AND METHOD OF MANUFACTURING THEREOF
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04/02/2013
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12465431
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05/13/2009
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11/18/2010
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01/24/2012
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12466391
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05/15/2009
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11/19/2009
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METHOD FOR FABRICATING SEMICONDUCTOR DEVICES WITH SHALLOW DIFFUSION REGIONS
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06/14/2011
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05/21/2009
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11/25/2010
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09/20/2011
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12471007
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05/22/2009
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11/25/2010
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INTEGRATED CIRCUIT SYSTEM WITH HIERARCHICAL CAPACITOR AND METHOD OF MANUFACTURE THEREOF
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10/11/2011
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12473232
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05/27/2009
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12/02/2010
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RELIABLE INTERCONNECTION
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10/23/2012
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06/03/2009
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12/17/2009
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03/20/2012
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06/19/2009
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12/23/2010
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INTEGRATED CIRCUIT SYSTEM WITH HIGH VOLTAGE TRANSISTOR AND METHOD OF MANUFACTURE THEREOF
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07/17/2012
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07/10/2009
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08/26/2010
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HIGH VOLTAGE DEVICE
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01/08/2013
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07/27/2009
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01/27/2011
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SEMICONDUCTOR INTRA-FIELD DOSE CORRECTION
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02/21/2012
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12510276
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07/28/2009
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11/19/2009
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09/18/2012
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12537268
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08/07/2009
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02/10/2011
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LOCALIZED ANNEAL
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