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Reel/Frame:	054633/0001			Pages:	1245
		Recorded:	11/02/2020
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 8468
Page 19 of 85
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Patent #:	7535069	Issue Dt:	05/19/2009	Application #:	11452741	Filing Dt:	06/14/2006
Publication #:	US20070297218	Pub Dt:	12/27/2007
Title:	MAGNETIC TUNNEL JUNCTION WITH ENHANCED MAGNETIC SWITCHING CHARACTERISTICS

Patent #:	7893493	Issue Dt:	02/22/2011	Application #:	11456326	Filing Dt:	07/10/2006
Publication #:	US20080006876	Pub Dt:	01/10/2008
Title:	STACKING FAULT REDUCTION IN EPITAXIALLY GROWN SILICON

Patent #:	7456702	Issue Dt:	11/25/2008	Application #:	11456351	Filing Dt:	07/10/2006
Publication #:	US20080258849	Pub Dt:	10/23/2008
Title:	LOW PASS METAL POWDER FILTER

Patent #:	7759606	Issue Dt:	07/20/2010	Application #:	11458161	Filing Dt:	07/18/2006
Publication #:	US20060243712	Pub Dt:	11/02/2006
Title:	METHOD AND APPARATUS FOR REPAIR OF REFLECTIVE PHOTOMASKS

Patent #:	7542329	Issue Dt:	06/02/2009	Application #:	11458616	Filing Dt:	07/19/2006
Publication #:	US20080123458	Pub Dt:	05/29/2008
Title:	VIRTUAL POWER RAILS FOR INTEGRATED CIRCUITS

Patent #:	7473633	Issue Dt:	01/06/2009	Application #:	11458726	Filing Dt:	07/20/2006
Publication #:	US20060292861	Pub Dt:	12/28/2006
Title:	METHOD FOR MAKING INTEGRATED CIRCUIT CHIP HAVING CARBON NANOTUBE COMPOSITE INTERCONNECTION VIAS

Patent #:	7718503	Issue Dt:	05/18/2010	Application #:	11459316	Filing Dt:	07/21/2006
Publication #:	US20080017906	Pub Dt:	01/24/2008
Title:	SOI DEVICE AND METHOD FOR ITS FABRICATION

Patent #:	7345901	Issue Dt:	03/18/2008	Application #:	11459968	Filing Dt:	07/26/2006
Publication #:	US20080025130	Pub Dt:	01/31/2008
Title:	COMPUTER SYSTEM HAVING DAISY CHAINED SELF TIMED MEMORY CHIPS

Patent #:	7342816	Issue Dt:	03/11/2008	Application #:	11459994	Filing Dt:	07/26/2006
Publication #:	US20080031077	Pub Dt:	02/07/2008
Title:	DAISY CHAINABLE MEMORY CHIP

Patent #:	7470615	Issue Dt:	12/30/2008	Application #:	11460010	Filing Dt:	07/26/2006
Publication #:	US20080026513	Pub Dt:	01/31/2008
Title:	SEMICONDUCTOR STRUCTURE WITH SELF-ALIGNED DEVICE CONTACTS

Patent #:	7482261	Issue Dt:	01/27/2009	Application #:	11460011	Filing Dt:	07/26/2006
Publication #:	US20080026554	Pub Dt:	01/31/2008
Title:	INTERCONNECT STRUCTURE FOR BEOL APPLICATIONS

Patent #:	7307911	Issue Dt:	12/11/2007	Application #:	11460464	Filing Dt:	07/27/2006
Title:	APPARATUS AND METHOD FOR IMPROVING SENSING MARGIN OF ELECTRICALLY PROGRAMMABLE FUSES

Patent #:	7480883	Issue Dt:	01/20/2009	Application #:	11460537	Filing Dt:	07/27/2006
Publication #:	US20070028193	Pub Dt:	02/01/2007
Title:	MULTIPLE VOLTAGE INTEGRATED CIRCUIT AND DESIGN METHOD THEREFOR

Patent #:	8030649	Issue Dt:	10/04/2011	Application #:	11460751	Filing Dt:	07/28/2006
Publication #:	US20080023700	Pub Dt:	01/31/2008
Title:	SCAN TESTING IN SINGLE-CHIP MULTICORE SYSTEMS

Patent #:	7488679	Issue Dt:	02/10/2009	Application #:	11461137	Filing Dt:	07/31/2006
Publication #:	US20080026568	Pub Dt:	01/31/2008
Title:	INTERCONNECT STRUCTURE AND PROCESS OF MAKING THE SAME

Patent #:	8809936	Issue Dt:	08/19/2014	Application #:	11461428	Filing Dt:	07/31/2006
Publication #:	US20080023750	Pub Dt:	01/31/2008
Title:	MEMORY CELL SYSTEM WITH MULTIPLE NITRIDE LAYERS

Patent #:	7847358	Issue Dt:	12/07/2010	Application #:	11462648	Filing Dt:	08/04/2006
Publication #:	US20060270136	Pub Dt:	11/30/2006
Title:	HIGH PERFORMANCE STRAINED CMOS DEVICES

Patent #:	7444277	Issue Dt:	10/28/2008	Application #:	11464009	Filing Dt:	08/11/2006
Publication #:	US20070078639	Pub Dt:	04/05/2007
Title:	FACILITATING SIMULATION OF A MODEL WITHIN A DISTRIBUTED ENVIRONMENT

Patent #:	7439120	Issue Dt:	10/21/2008	Application #:	11464090	Filing Dt:	08/11/2006
Publication #:	US20080038886	Pub Dt:	02/14/2008
Title:	METHOD FOR FABRICATING STRESS ENHANCED MOS CIRCUITS

Patent #:	7273770	Issue Dt:	09/25/2007	Application #:	11464959	Filing Dt:	08/16/2006
Publication #:	US20060281224	Pub Dt:	12/14/2006
Title:	COMPLIANT PASSIVATED EDGE SEAL FOR LOW-K INTERCONNECT STRUCTURES

Patent #:	7752480	Issue Dt:	07/06/2010	Application #:	11465639	Filing Dt:	08/18/2006
Publication #:	US20080046776	Pub Dt:	02/21/2008
Title:	SYSTEM AND METHOD FOR SWITCHING DIGITAL CIRCUIT CLOCK NET DRIVER WITHOUT LOSING CLOCK PULSES

Patent #:	7790558	Issue Dt:	09/07/2010	Application #:	11465663	Filing Dt:	08/18/2006
Publication #:	US20060281272	Pub Dt:	12/14/2006
Title:	METHOD AND APPARATUS FOR INCREASE STRAIN EFFECT IN A TRANSISTOR CHANNEL

Patent #:	7394089	Issue Dt:	07/01/2008	Application #:	11467294	Filing Dt:	08/25/2006
Publication #:	US20080048169	Pub Dt:	02/28/2008
Title:	HEAT-SHIELDED LOW POWER PCM-BASED REPROGRAMMABLE EFUSE DEVICE

Patent #:	7462915	Issue Dt:	12/09/2008	Application #:	11467446	Filing Dt:	08/25/2006
Publication #:	US20060286786	Pub Dt:	12/21/2006
Title:	METHOD AND APPARATUS FOR INCREASE STRAIN EFFECT IN A TRANSISTOR CHANNEL

Patent #:	7372158	Issue Dt:	05/13/2008	Application #:	11467593	Filing Dt:	08/28/2006
Publication #:	US20070004206	Pub Dt:	01/04/2007
Title:	IMPROVED HDP-BASED ILD CAPPING LAYER

Patent #:	7560382	Issue Dt:	07/14/2009	Application #:	11467712	Filing Dt:	08/28/2006
Publication #:	US20080048297	Pub Dt:	02/28/2008
Title:	EMBEDDED INTERCONNECTS, AND METHODS FOR FORMING SAME

Patent #:	7403073	Issue Dt:	07/22/2008	Application #:	11469423	Filing Dt:	08/31/2006
Publication #:	US20070075785	Pub Dt:	04/05/2007
Title:	PHASE LOCKED LOOP AND METHOD FOR ADJUSTING THE FREQUENCY AND PHASE IN THE PHASE LOCKED LOOP

Patent #:	7611991	Issue Dt:	11/03/2009	Application #:	11470024	Filing Dt:	09/05/2006
Publication #:	US20070123009	Pub Dt:	05/31/2007
Title:	TECHNIQUE FOR INCREASING ADHESION OF METALLIZATION LAYERS BY PROVIDING DUMMY VIAS

Patent #:	7816069	Issue Dt:	10/19/2010	Application #:	11473338	Filing Dt:	06/23/2006
Publication #:	US20080008955	Pub Dt:	01/10/2008
Title:	GRADED SPIN-ON ORGANIC ANTIREFLECTIVE COATING FOR PHOTOLITHOGRAPHY

Patent #:	7459752	Issue Dt:	12/02/2008	Application #:	11473757	Filing Dt:	06/23/2006
Publication #:	US20060237791	Pub Dt:	10/26/2006
Title:	ULTRA THIN BODY FULLY-DEPLETED SOI MOSFETS

Patent #:	7451411	Issue Dt:	11/11/2008	Application #:	11475675	Filing Dt:	06/26/2006
Publication #:	US20070300200	Pub Dt:	12/27/2007
Title:	INTEGRATED CIRCUIT DESIGN SYSTEM

Patent #:	7733221	Issue Dt:	06/08/2010	Application #:	11478695	Filing Dt:	06/30/2006
Publication #:	US20080001732	Pub Dt:	01/03/2008
Title:	APPARATUS AND METHOD FOR WIRELESS NETWORK PARAMETER LOGGING AND REPORTING WITHIN A PORTABLE DEVICE HAVING WIRELESS COMMUNICATION FUNCTIONALITY

Patent #:	7707438	Issue Dt:	04/27/2010	Application #:	11478901	Filing Dt:	06/30/2006
Title:	INTEGRATED CIRCUIT HAVING AFTER MARKET MODIFIABLE PERFORMANCE

Patent #:	7716016	Issue Dt:	05/11/2010	Application #:	11479485	Filing Dt:	06/30/2006
Publication #:	US20080005304	Pub Dt:	01/03/2008
Title:	METHOD AND APPARATUS FOR AUTOMATIC UNCERTAINTY-BASED MANAGEMENT FEEDBACK CONTROLLER

Patent #:	7473970	Issue Dt:	01/06/2009	Application #:	11481120	Filing Dt:	07/05/2006
Publication #:	US20060249799	Pub Dt:	11/09/2006
Title:	CONCURRENT FIN-FET AND THICK BODY DEVICE FABRICATION

Patent #:	7601602	Issue Dt:	10/13/2009	Application #:	11481514	Filing Dt:	07/06/2006
Publication #:	US20060267144	Pub Dt:	11/30/2006
Title:	TRENCH TYPE BURIED ON-CHIP PRECISION PROGRAMMABLE RESISTOR

Patent #:	7771695	Issue Dt:	08/10/2010	Application #:	11490248	Filing Dt:	07/21/2006
Publication #:	US20100170418	Pub Dt:	07/08/2010
Title:	COMPLEXES OF CARBON NANOTUBES AND FULLERENES WITH MOLECULAR-CLIPS AND USE THEREOF

Patent #:	7285488	Issue Dt:	10/23/2007	Application #:	11492455	Filing Dt:	07/25/2006
Publication #:	US20060261480	Pub Dt:	11/23/2006
Title:	METHOD OF FABRICATING STRAINED CHANNEL FIELD EFFECT TRANSISTOR PAIR HAVING UNDERLAPPED DUAL LINERS

Patent #:	7888753	Issue Dt:	02/15/2011	Application #:	11496383	Filing Dt:	07/31/2006
Publication #:	US20100330687	Pub Dt:	12/30/2010
Title:	ULTRA-SENSITIVE DETECTION TECHNIQUES

Patent #:	7420388	Issue Dt:	09/02/2008	Application #:	11498009	Filing Dt:	08/01/2006
Publication #:	US20060267629	Pub Dt:	11/30/2006
Title:	POWER GATING TECHNIQUES ABLE TO HAVE DATA RETENTION AND VARIABILITY IMMUNITY PROPERTIES

Patent #:	7518229	Issue Dt:	04/14/2009	Application #:	11498689	Filing Dt:	08/03/2006
Publication #:	US20080029886	Pub Dt:	02/07/2008
Title:	VERSATILE SI-BASED PACKAGING WITH INTEGRATED PASSIVE COMPONENTS FOR MMWAVE APPLICATIONS

Patent #:	7402532	Issue Dt:	07/22/2008	Application #:	11499220	Filing Dt:	08/04/2006
Publication #:	US20070148958	Pub Dt:	06/28/2007
Title:	STRUCTURE TO IMPROVE ADHESION BETWEEN TOP CVD LOW-K DIELECTRIC AND DIELECTRIC CAPPING LAYER

Patent #:	7543131	Issue Dt:	06/02/2009	Application #:	11503390	Filing Dt:	08/11/2006
Publication #:	US20070038839	Pub Dt:	02/15/2007
Title:	CONTROLLING AN I/O MMU

Patent #:	7747881	Issue Dt:	06/29/2010	Application #:	11503700	Filing Dt:	08/14/2006
Publication #:	US20080040622	Pub Dt:	02/14/2008
Title:	SYSTEM AND METHOD FOR LIMITING PROCESSOR PERFORMANCE

Patent #:	7618841	Issue Dt:	11/17/2009	Application #:	11506827	Filing Dt:	08/21/2006
Publication #:	US20070099331	Pub Dt:	05/03/2007
Title:	HYDRAZINE-FREE SOLUTION DEPOSITION OF CHALCOGENIDE FILMS

Patent #:	8426279	Issue Dt:	04/23/2013	Application #:	11512000	Filing Dt:	08/29/2006
Publication #:	US20080057635	Pub Dt:	03/06/2008
Title:	ASYMMETRIC TRANSISTOR

Patent #:	7783954	Issue Dt:	08/24/2010	Application #:	11518843	Filing Dt:	09/11/2006
Publication #:	US20080065967	Pub Dt:	03/13/2008
Title:	SYSTEM FOR CONTROLLING HIGH-SPEED BIDIRECTIONAL COMMUNICATION

Patent #:	7999251	Issue Dt:	08/16/2011	Application #:	11519176	Filing Dt:	09/11/2006
Publication #:	US20080061284	Pub Dt:	03/13/2008
Title:	NANOWIRE MOSFET WITH DOPED EPITAXIAL CONTACTS FOR SOURCE AND DRAIN

Patent #:	7560778	Issue Dt:	07/14/2009	Application #:	11519680	Filing Dt:	09/12/2006
Publication #:	US20070008668	Pub Dt:	01/11/2007
Title:	CHARGE MODULATION NETWORK FOR MULTIPLE POWER DOMAINS FOR SILICON-ON-INSULATOR TECHNOLOGY

Patent #:	8093680	Issue Dt:	01/10/2012	Application #:	11521219	Filing Dt:	09/14/2006
Title:	METAL-INSULATOR-METAL-INSULATOR-METAL (MIMIM) MEMORY DEVICE

Patent #:	7676200	Issue Dt:	03/09/2010	Application #:	11522873	Filing Dt:	09/18/2006
Publication #:	US20100013459	Pub Dt:	01/21/2010
Title:	CIRCUITS AND METHODS FOR HIGH-EFFICIENCY ON-CHIP POWER DETECTION

Patent #:	7518067	Issue Dt:	04/14/2009	Application #:	11528253	Filing Dt:	09/27/2006
Publication #:	US20080073115	Pub Dt:	03/27/2008
Title:	METAL CAGE STRUCTURE AND METHOD FOR EMI SHIELDING

Patent #:	7785965	Issue Dt:	08/31/2010	Application #:	11530145	Filing Dt:	09/08/2006
Publication #:	US20080064165	Pub Dt:	03/13/2008
Title:	DUAL STORAGE NODE MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME

Patent #:	7439151	Issue Dt:	10/21/2008	Application #:	11531298	Filing Dt:	09/13/2006
Publication #:	US20080064163	Pub Dt:	03/13/2008
Title:	METHOD AND STRUCTURE FOR INTEGRATING MIM CAPACITORS WITHIN DUAL DAMASCENE PROCESSING TECHNIQUES

Patent #:	7829453	Issue Dt:	11/09/2010	Application #:	11531437	Filing Dt:	09/13/2006
Publication #:	US20070123020	Pub Dt:	05/31/2007
Title:	METHOD FOR FORMING SOLDER BALLS WITH A STABLE OXIDE LAYER BY CONTROLLING THE REFLOW AMBIENT

Patent #:	7456471	Issue Dt:	11/25/2008	Application #:	11532207	Filing Dt:	09/15/2006
Publication #:	US20080067613	Pub Dt:	03/20/2008
Title:	FIELD EFFECT TRANSISTOR WITH RAISED SOURCE/DRAIN FIN STRAPS

Patent #:	8241995	Issue Dt:	08/14/2012	Application #:	11532599	Filing Dt:	09/18/2006
Publication #:	US20100255262	Pub Dt:	10/07/2010
Title:	BONDING OF SUBSTRATES INCLUDING METAL-DIELECTRIC PATTERNS WITH METAL RAISED ABOVE DIELECTRIC

Patent #:	7440353	Issue Dt:	10/21/2008	Application #:	11534070	Filing Dt:	09/21/2006
Publication #:	US20080084774	Pub Dt:	04/10/2008
Title:	FLOATING BODY CONTROL IN SOI DRAM

Patent #:	7429752	Issue Dt:	09/30/2008	Application #:	11534526	Filing Dt:	09/22/2006
Publication #:	US20070020806	Pub Dt:	01/25/2007
Title:	METHOD AND STRUCTURE FOR FORMING STRAINED SI FOR CMOS DEVICES

Patent #:	7670914	Issue Dt:	03/02/2010	Application #:	11536114	Filing Dt:	09/28/2006
Publication #:	US20080090360	Pub Dt:	04/17/2008
Title:	METHODS FOR FABRICATING MULTIPLE FINGER TRANSISTORS

Patent #:	8032150	Issue Dt:	10/04/2011	Application #:	11537497	Filing Dt:	09/29/2006
Publication #:	US20080081605	Pub Dt:	04/03/2008
Title:	CONNECTION MANAGER WITH LOCATION LEARNING

Patent #:	7518225	Issue Dt:	04/14/2009	Application #:	11538567	Filing Dt:	10/04/2006
Publication #:	US20070290315	Pub Dt:	12/20/2007
Title:	CHIP SYSTEM ARCHITECTURE FOR PERFORMANCE ENHANCEMENT, POWER REDUCTION AND COST REDUCTION

Patent #:	7582493	Issue Dt:	09/01/2009	Application #:	11538872	Filing Dt:	10/05/2006
Publication #:	US20080085570	Pub Dt:	04/10/2008
Title:	DISTINGUISHING BETWEEN DOPANT AND LINE WIDTH VARIATION COMPONENTS

Patent #:	7738986	Issue Dt:	06/15/2010	Application #:	11539803	Filing Dt:	10/09/2006
Publication #:	US20080147224	Pub Dt:	06/19/2008
Title:	METHOD AND APPARATUS FOR COMPENSATING METROLOGY DATA FOR SITE BIAS PRIOR TO FILTERING

Patent #:	7421358	Issue Dt:	09/02/2008	Application #:	11539917	Filing Dt:	10/10/2006
Publication #:	US20070177135	Pub Dt:	08/02/2007
Title:	METHOD AND SYSTEM FOR MEASUREMENT DATA EVALUATION IN SEMICONDUCTOR PROCESSING BY CORRELATION-BASED DATA FILTERING

Patent #:	8248466	Issue Dt:	08/21/2012	Application #:	11548328	Filing Dt:	10/11/2006
Publication #:	US20080089653	Pub Dt:	04/17/2008
Title:	IMAGE PROCESSING USING MULTIPLE IMAGE DEVICES

Patent #:	7354836	Issue Dt:	04/08/2008	Application #:	11550941	Filing Dt:	10/19/2006
Publication #:	US20070202653	Pub Dt:	08/30/2007
Title:	TECHNIQUE FOR FORMING A STRAINED TRANSISTOR BY A LATE AMORPHIZATION AND DISPOSABLE SPACERS

Patent #:	7601574	Issue Dt:	10/13/2009	Application #:	11552582	Filing Dt:	10/25/2006
Publication #:	US20080102571	Pub Dt:	05/01/2008
Title:	METHODS FOR FABRICATING A STRESS ENHANCED MOS TRANSISTOR

Patent #:	7439081	Issue Dt:	10/21/2008	Application #:	11552771	Filing Dt:	10/25/2006
Publication #:	US20070048879	Pub Dt:	03/01/2007
Title:	METHOD FOR MAKING INTEGRATED CIRCUIT CHIP UTILIZING ORIENTED CARBON NANOTUBE CONDUCTIVE LAYERS

Patent #:	7354822	Issue Dt:	04/08/2008	Application #:	11553072	Filing Dt:	10/26/2006
Publication #:	US20070051996	Pub Dt:	03/08/2007
Title:	METHOD OF FORMING A MOSFET WITH DUAL WORK FUNCTION MATERIALS

Patent #:	8343578	Issue Dt:	01/01/2013	Application #:	11554079	Filing Dt:	10/30/2006
Publication #:	US20080103256	Pub Dt:	05/01/2008
Title:	SELF-ASSEMBLED LAMELLAR MICRODOMAINS AND METHOD OF ALIGNMENT

Patent #:	7625815	Issue Dt:	12/01/2009	Application #:	11554612	Filing Dt:	10/31/2006
Publication #:	US20080102599	Pub Dt:	05/01/2008
Title:	REDUCED LEAKAGE INTERCONNECT STRUCTURE

Patent #:	8918543	Issue Dt:	12/23/2014	Application #:	11556746	Filing Dt:	11/06/2006
Publication #:	US20080108340	Pub Dt:	05/08/2008
Title:	CHANGING DEVICE FUNCTIONALITY USING ENVIRONMENT CONDITIONS

Patent #:	7915653	Issue Dt:	03/29/2011	Application #:	11556755	Filing Dt:	11/06/2006
Publication #:	US20080185618	Pub Dt:	08/07/2008
Title:	STRUCTURE FOR AND METHOD OF FABRICATING A HIGH-SPEED CMOS-COMPATIBLE GE-ON-INSULATOR PHOTODETECTOR

Patent #:	7544994	Issue Dt:	06/09/2009	Application #:	11556844	Filing Dt:	11/06/2006
Publication #:	US20080122013	Pub Dt:	05/29/2008
Title:	SEMICONDUCTOR STRUCTURE WITH MULTIPLE FINS HAVING DIFFERENT CHANNEL REGION HEIGHTS AND METHOD OF FORMING THE SEMICONDUCTOR STRUCTURE

Patent #:	7403057	Issue Dt:	07/22/2008	Application #:	11556882	Filing Dt:	11/06/2006
Publication #:	US20080129356	Pub Dt:	06/05/2008
Title:	CML DELAY CELL WITH LINEAR RAIL-TO-RAIL TUNING RANGE AND CONSTANT OUTPUT SWING

Patent #:	7682887	Issue Dt:	03/23/2010	Application #:	11557509	Filing Dt:	11/08/2006
Publication #:	US20070087540	Pub Dt:	04/19/2007
Title:	TRANSISTOR HAVING HIGH MOBILITY CHANNEL AND METHODS

Patent #:	7813815	Issue Dt:	10/12/2010	Application #:	11557745	Filing Dt:	11/08/2006
Publication #:	US20070101227	Pub Dt:	05/03/2007
Title:	DIGITAL MEASURING SYSTEM AND METHOD FOR INTEGRATED CIRCUIT CHIP OPERATING PARAMETERS

Patent #:	7880201	Issue Dt:	02/01/2011	Application #:	11558289	Filing Dt:	11/09/2006
Publication #:	US20080112032	Pub Dt:	05/15/2008
Title:	OPTICAL MODULATOR USING A SERPENTINE DIELECTRIC LAYER BETWEEN SILICON LAYERS

Patent #:	7705426	Issue Dt:	04/27/2010	Application #:	11558480	Filing Dt:	11/10/2006
Publication #:	US20080111154	Pub Dt:	05/15/2008
Title:	INTEGRATION OF A SIGE- OR SIGEC-BASED HBT WITH A SIGE- OR SIGEC-STRAPPED SEMICONDUCTOR DEVICE

Patent #:	7563670	Issue Dt:	07/21/2009	Application #:	11558974	Filing Dt:	11/13/2006
Publication #:	US20080111175	Pub Dt:	05/15/2008
Title:	METHOD FOR ETCHING SINGLE-CRYSTAL SEMICONDUCTOR SELECTIVE TO AMORPHOUS/POLYCRYSTALLINE SEMICONDUCTOR AND STRUCTURE FORMED BY SAME

Patent #:	7873770	Issue Dt:	01/18/2011	Application #:	11559049	Filing Dt:	11/13/2006
Publication #:	US20080114916	Pub Dt:	05/15/2008
Title:	FILTERING AND REMAPPING INTERRUPTS

Patent #:	7470570	Issue Dt:	12/30/2008	Application #:	11559460	Filing Dt:	11/14/2006
Publication #:	US20080111184	Pub Dt:	05/15/2008
Title:	PROCESS FOR FABRICATION OF FINFETS

Patent #:	7537951	Issue Dt:	05/26/2009	Application #:	11560019	Filing Dt:	11/15/2006
Publication #:	US20080111159	Pub Dt:	05/15/2008
Title:	IMAGE SENSOR INCLUDING SPATIALLY DIFFERENT ACTIVE AND DARK PIXEL INTERCONNECT PATTERNS

Patent #:	7781781	Issue Dt:	08/24/2010	Application #:	11560882	Filing Dt:	11/17/2006
Publication #:	US20080116537	Pub Dt:	05/22/2008
Title:	CMOS IMAGER ARRAY WITH RECESSED DIELECTRIC

Patent #:	7666781	Issue Dt:	02/23/2010	Application #:	11562550	Filing Dt:	11/22/2006
Publication #:	US20080116582	Pub Dt:	05/22/2008
Title:	INTERCONNECT STRUCTURES WITH IMPROVED ELECTROMIGRATION RESISTANCE AND METHODS FOR FORMING SUCH INTERCONNECT STRUCTURES

Patent #:	7466284	Issue Dt:	12/16/2008	Application #:	11564875	Filing Dt:	11/30/2006
Publication #:	US20080129623	Pub Dt:	06/05/2008
Title:	CHIP SEAL RING FOR ENHANCING THE OPERATION OF AN ON-CHIP LOOP ANTENNA

Patent #:	7655989	Issue Dt:	02/02/2010	Application #:	11564961	Filing Dt:	11/30/2006
Publication #:	US20080128796	Pub Dt:	06/05/2008
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Patent #:	7696000	Issue Dt:	04/13/2010	Application #:	11565793	Filing Dt:	12/01/2006
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Title:	LOW DEFECT SI:C LAYER WITH RETROGRADE CARBON PROFILE

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Title:	MEMORY CONTROLLER INCLUDING A DUAL-MODE MEMORY INTERCONNECT

Patent #:	7861140	Issue Dt:	12/28/2010	Application #:	11590290	Filing Dt:	10/31/2006
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Title:	MEMORY SYSTEM INCLUDING ASYMMETRIC HIGH-SPEED DIFFERENTIAL MEMORY INTERCONNECT

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Title:	EUV PELLICLE WITH INCREASED EUV LIGHT TRANSMITTANCE

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Title:	SYSTEMS AND ARRANGEMENTS FOR CLOCK AND DATA RECOVERY IN COMMUNICATIONS

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Title:	COMMAND PACKET PACKING TO MITIGATE CRC OVERHEAD

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Title:	LATCH PLACEMENT FOR HIGH PERFORMANCE AND LOW POWER CIRCUITS

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Title:	PROGRAMMABLE-RESISTANCE MEMORY CELL

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Title:	PROGRAMMABLE VIA STRUCTURE AND METHOD OF FABRICATING SAME

100

Patent #:	7397692	Issue Dt:	07/08/2008	Application #:	11612809	Filing Dt:	12/19/2006
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Title:	HIGH PERFORMANCE SINGLE EVENT UPSET HARDENED SRAM CELL

Assignor

GLOBALFOUNDRIES INC.

Exec Dt:

10/22/2020

Assignee

GLOBALFOUNDRIES U.S. INC.

2600 GREAT AMERICA WAY

SANTA CLARA, CALIFORNIA 95054

Correspondence name and address
	GLOBALFOUNDRIES SINGAPORE PTE. LTD.
	60 WOODLANDS INDUSTRIAL PARK D STREET 2,
	SINGAPORE, 738406 SINGAPORE

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