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Reel/Frame:054633/0001   Pages: 1245
Recorded: 11/02/2020
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 8468
Page 24 of 85
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
1
Patent #:
8863046
Issue Dt:
10/14/2014
Application #:
12101449
Filing Dt:
04/11/2008
Publication #:
US20090258194
Pub Dt:
10/15/2009
Title:
CONTROLLING IMPEDANCE AND THICKNESS VARIATIONS FOR MULTILAYER ELECTRONIC STRUCTURES
2
Patent #:
8217455
Issue Dt:
07/10/2012
Application #:
12102032
Filing Dt:
04/14/2008
Publication #:
US20090256202
Pub Dt:
10/15/2009
Title:
SEMICONDUCTOR-ON-INSULATOR DEVICE STRUCTURES WITH A BODY-TO-SUBSTRATE CONNECTION FOR ENHANCED ELECTROSTATIC DISCHARGE PROTECTION, AND DESIGN STRUCTURES FOR SUCH SEMICONDUCTOR-ON-INSULATOR DEVICE STRUCTURES
3
Patent #:
7696930
Issue Dt:
04/13/2010
Application #:
12102051
Filing Dt:
04/14/2008
Publication #:
US20090256752
Pub Dt:
10/15/2009
Title:
RADIO FREQUENCY (RF) INTEGRATED CIRCUIT (IC) PACKAGES WITH INTEGRATED APERTURE-COUPLED PATCH ANTENNA(S) IN RING AND/OR OFFSET CAVITIES
4
Patent #:
7541913
Issue Dt:
06/02/2009
Application #:
12103775
Filing Dt:
04/16/2008
Publication #:
US20090121929
Pub Dt:
05/14/2009
Title:
METHOD FOR TRACKING CONTAINERS USING A LOW-RATE WIRELESS PERSONAL AREA NETWORK SYSTEM
5
Patent #:
7982269
Issue Dt:
07/19/2011
Application #:
12104513
Filing Dt:
04/17/2008
Publication #:
US20090261380
Pub Dt:
10/22/2009
Title:
TRANSISTORS HAVING ASYMMETRIC STRAINED SOURCE/DRAIN PORTIONS
6
Patent #:
7948211
Issue Dt:
05/24/2011
Application #:
12105349
Filing Dt:
04/18/2008
Publication #:
US20090261783
Pub Dt:
10/22/2009
Title:
SYSTEM AND METHODS TO EXTEND THE SERVICE LIFE OF PORTABLE DEVICES
7
Patent #:
7966435
Issue Dt:
06/21/2011
Application #:
12105449
Filing Dt:
04/18/2008
Publication #:
US20080195774
Pub Dt:
08/14/2008
Title:
INTEGRATED CIRCUIT DESIGN STRUCTURE FOR AN ASYCHRONOUS DATA INTERFACE
8
Patent #:
8122393
Issue Dt:
02/21/2012
Application #:
12106531
Filing Dt:
04/21/2008
Publication #:
US20080195988
Pub Dt:
08/14/2008
Title:
INTEGRATED CIRCUIT TRANSFORMER DEVICES FOR ON-CHIP MILLIMETER-WAVE APPLICATIONS
9
Patent #:
7880194
Issue Dt:
02/01/2011
Application #:
12106539
Filing Dt:
04/21/2008
Publication #:
US20090189731
Pub Dt:
07/30/2009
Title:
CROSS POINT SWITCH USING PHASE CHANGE MATERIAL
10
Patent #:
7833907
Issue Dt:
11/16/2010
Application #:
12107980
Filing Dt:
04/23/2008
Publication #:
US20090267192
Pub Dt:
10/29/2009
Title:
CMP METHODS AVOIDING EDGE EROSION AND RELATED WAFER
11
Patent #:
8154130
Issue Dt:
04/10/2012
Application #:
12107992
Filing Dt:
04/23/2008
Publication #:
US20080220606
Pub Dt:
09/11/2008
Title:
SELF-ALIGNED METAL TO FORM CONTACTS TO GE CONTAINING SUBSTRATES AND STRUCTURE FORMED THEREBY
12
Patent #:
7514290
Issue Dt:
04/07/2009
Application #:
12108512
Filing Dt:
04/24/2008
Title:
CHIP-TO-WAFER INTEGRATION TECHNOLOGY FOR THREE-DIMENSIONAL CHIP STACKING
13
Patent #:
7875550
Issue Dt:
01/25/2011
Application #:
12110465
Filing Dt:
04/28/2008
Publication #:
US20080233743
Pub Dt:
09/25/2008
Title:
METHOD AND STRUCTURE FOR SELF-ALIGNED DEVICE CONTACTS
14
Patent #:
8008764
Issue Dt:
08/30/2011
Application #:
12110579
Filing Dt:
04/28/2008
Publication #:
US20090267238
Pub Dt:
10/29/2009
Title:
BRIDGES FOR INTERCONNECTING INTERPOSERS IN MULTI-CHIP INTEGRATED CIRCUITS
15
Patent #:
8203873
Issue Dt:
06/19/2012
Application #:
12110644
Filing Dt:
04/28/2008
Publication #:
US20080232160
Pub Dt:
09/25/2008
Title:
RECTIFYING ELEMENT FOR A CROSSPOINT BASED MEMORY ARRAY ARCHITECTURE
16
Patent #:
7756667
Issue Dt:
07/13/2010
Application #:
12110698
Filing Dt:
04/28/2008
Publication #:
US20080281551
Pub Dt:
11/13/2008
Title:
APPARATUS FOR THREE-DIMENSIONAL MEASUREMENTS OF PHYSICAL CHARACTERISTICS WITHIN A DATA CENTER
17
Patent #:
7739073
Issue Dt:
06/15/2010
Application #:
12110732
Filing Dt:
04/28/2008
Publication #:
US20080239539
Pub Dt:
10/02/2008
Title:
METHOD AND APPARATUS FOR THREE-DIMENSIONAL MEASUREMENTS OF PHYSICAL CHARACTERISTICS WITHIN A DATA CENTER
18
Patent #:
7836356
Issue Dt:
11/16/2010
Application #:
12110851
Filing Dt:
04/28/2008
Publication #:
US20090271664
Pub Dt:
10/29/2009
Title:
METHOD FOR MONITORING DEPENDENT METRIC STREAMS FOR ANOMALIES
19
Patent #:
7952944
Issue Dt:
05/31/2011
Application #:
12112391
Filing Dt:
04/30/2008
Publication #:
US20090273960
Pub Dt:
11/05/2009
Title:
SYSTEM FOR PROVIDING ON-DIE TERMINATION OF A CONTROL SIGNAL BUS
20
Patent #:
7793067
Issue Dt:
09/07/2010
Application #:
12112611
Filing Dt:
04/30/2008
Publication #:
US20080209130
Pub Dt:
08/28/2008
Title:
TRANSLATION DATA PREFETCH IN AN IOMMU
21
Patent #:
8598569
Issue Dt:
12/03/2013
Application #:
12113064
Filing Dt:
04/30/2008
Publication #:
US20090272967
Pub Dt:
11/05/2009
Title:
PENTACENE-CARBON NANOTUBE COMPOSITE, METHOD OF FORMING THE COMPOSITE, AND SEMICONDUCTOR DEVICE INCLUDING THE COMPOSITE
22
Patent #:
8809182
Issue Dt:
08/19/2014
Application #:
12113230
Filing Dt:
05/01/2008
Publication #:
US20090273081
Pub Dt:
11/05/2009
Title:
PAD CUSHION STRUCTURE AND METHOD OF FABRICATION FOR PB-FREE C4 INTEGRATED CIRCUIT CHIP JOINING
23
Patent #:
7844933
Issue Dt:
11/30/2010
Application #:
12113288
Filing Dt:
05/01/2008
Publication #:
US20090276743
Pub Dt:
11/05/2009
Title:
METHODS OF OPTIMIZING TIMING OF SIGNALS IN AN INTEGRATED CIRCUIT DESIGN USING PROXY SLACK VALUES
24
Patent #:
7564118
Issue Dt:
07/21/2009
Application #:
12114145
Filing Dt:
05/02/2008
Publication #:
US20080230891
Pub Dt:
09/25/2008
Title:
CHIP AND WAFER INTEGRATION PROCESS USING VERTICAL CONNECTIONS
25
Patent #:
7598097
Issue Dt:
10/06/2009
Application #:
12114636
Filing Dt:
05/02/2008
Publication #:
US20080241369
Pub Dt:
10/02/2008
Title:
METHOD OF FABRICATING A MAGNETIC SHIFT REGISTER
26
Patent #:
7732336
Issue Dt:
06/08/2010
Application #:
12115473
Filing Dt:
05/05/2008
Publication #:
US20080213952
Pub Dt:
09/04/2008
Title:
SHALLOW TRENCH ISOLATION PROCESS AND STRUCTURE WITH MINIMIZED STRAINED SILICON CONSUMPTION
27
Patent #:
7855428
Issue Dt:
12/21/2010
Application #:
12115699
Filing Dt:
05/06/2008
Publication #:
US20090278226
Pub Dt:
11/12/2009
Title:
CONDUCTIVE LINER AT AN INTERFACE BETWEEN A SHALLOW TRENCH ISOLATION STRUCTURE AND A BURIED OXIDE LAYER
28
Patent #:
7505308
Issue Dt:
03/17/2009
Application #:
12118441
Filing Dt:
05/09/2008
Title:
SYSTEMS INVOLVING SPIN-TRANSFER MAGNETIC RANDOM ACCESS MEMORY
29
Patent #:
7741165
Issue Dt:
06/22/2010
Application #:
12118776
Filing Dt:
05/12/2008
Publication #:
US20080248635
Pub Dt:
10/09/2008
Title:
POLYCRYSTALLINE SIGE JUNCTIONS FOR ADVANCED DEVICES
30
Patent #:
7669018
Issue Dt:
02/23/2010
Application #:
12118818
Filing Dt:
05/12/2008
Publication #:
US20080215820
Pub Dt:
09/04/2008
Title:
METHOD AND APPARATUS FOR FILTERING MEMORY WRITE SNOOP ACTIVITY IN A DISTRIBUTED SHARED MEMORY COMPUTER
31
Patent #:
7821099
Issue Dt:
10/26/2010
Application #:
12118875
Filing Dt:
05/12/2008
Publication #:
US20080251846
Pub Dt:
10/16/2008
Title:
STRUCTURE FOR LOW CAPACITANCE ESD ROBUST DIODES
32
Patent #:
7632727
Issue Dt:
12/15/2009
Application #:
12119384
Filing Dt:
05/12/2008
Publication #:
US20090280627
Pub Dt:
11/12/2009
Title:
METHOD OF FORMING STEPPED RECESSES FOR EMBEDDED STRAIN ELEMENTS IN A SEMICONDUCTOR DEVICE
33
Patent #:
8159040
Issue Dt:
04/17/2012
Application #:
12119526
Filing Dt:
05/13/2008
Publication #:
US20090283840
Pub Dt:
11/19/2009
Title:
METAL GATE INTEGRATION STRUCTURE AND METHOD INCLUDING METAL FUSE, ANTI-FUSE AND/OR RESISTOR
34
Patent #:
7960790
Issue Dt:
06/14/2011
Application #:
12119765
Filing Dt:
05/13/2008
Publication #:
US20080246090
Pub Dt:
10/09/2008
Title:
SELF-ALIGNED PLANAR DOUBLE-GATE TRANSISTOR STRUCTURE
35
Patent #:
7984204
Issue Dt:
07/19/2011
Application #:
12119924
Filing Dt:
05/13/2008
Publication #:
US20090287860
Pub Dt:
11/19/2009
Title:
PROGRAMMABLE DIRECT MEMORY ACCESS CONTROLLER HAVING PIPELINED AND SEQUENTIALLY CONNECTED STAGES
36
Patent #:
8271857
Issue Dt:
09/18/2012
Application #:
12119975
Filing Dt:
05/13/2008
Publication #:
US20090287982
Pub Dt:
11/19/2009
Title:
CORRECTING ERRORS IN LONGITUDINAL POSITION (LPOS) WORDS
37
Patent #:
8875272
Issue Dt:
10/28/2014
Application #:
12121689
Filing Dt:
05/15/2008
Publication #:
US20080289028
Pub Dt:
11/20/2008
Title:
FIREWALL FOR CONTROLLING CONNECTIONS BETWEEN A CLIENT MACHINE AND A NETWORK
38
Patent #:
7811879
Issue Dt:
10/12/2010
Application #:
12121875
Filing Dt:
05/16/2008
Publication #:
US20090286368
Pub Dt:
11/19/2009
Title:
PROCESS FOR PCM INTEGRATION WITH POLY-EMITTER BJT AS ACCESS DEVICE
39
Patent #:
7745337
Issue Dt:
06/29/2010
Application #:
12122840
Filing Dt:
05/19/2008
Publication #:
US20090286389
Pub Dt:
11/19/2009
Title:
METHOD OF OPTIMIZING SIDEWALL SPACER SIZE FOR SILICIDE PROXIMITY WITH IN-SITU CLEAN
40
Patent #:
7652279
Issue Dt:
01/26/2010
Application #:
12122969
Filing Dt:
05/19/2008
Publication #:
US20080210925
Pub Dt:
09/04/2008
Title:
THREE-TERMINAL CASCADE SWITCH FOR CONTROLLING STATIC POWER CONSUMPTION IN INTEGRATED CIRCUITS
41
Patent #:
7951424
Issue Dt:
05/31/2011
Application #:
12122981
Filing Dt:
05/19/2008
Publication #:
US20090117277
Pub Dt:
05/07/2009
Title:
SELECTIVE PLACEMENT OF CARBON NANOTUBES ON OXIDE SURFACES
42
Patent #:
8228112
Issue Dt:
07/24/2012
Application #:
12123735
Filing Dt:
05/20/2008
Publication #:
US20090102542
Pub Dt:
04/23/2009
Title:
SWITCH WITH REDUCED INSERTION LOSS
43
Patent #:
8225255
Issue Dt:
07/17/2012
Application #:
12124472
Filing Dt:
05/21/2008
Publication #:
US20090290401
Pub Dt:
11/26/2009
Title:
PLACEMENT AND OPTIMIZATION OF PROCESS DUMMY CELLS
44
Patent #:
8108822
Issue Dt:
01/31/2012
Application #:
12124551
Filing Dt:
05/21/2008
Publication #:
US20090070718
Pub Dt:
03/12/2009
Title:
METHODOLOGY FOR PLACEMENT BASED ON CIRCUIT FUNCTION AND LATCHUP SENSITIVITY
45
Patent #:
8003453
Issue Dt:
08/23/2011
Application #:
12125501
Filing Dt:
05/22/2008
Publication #:
US20080227259
Pub Dt:
09/18/2008
Title:
SELF-ALIGNED PROCESS FOR NANOTUBE/NANOWIRE FETS
46
Patent #:
7750418
Issue Dt:
07/06/2010
Application #:
12125508
Filing Dt:
05/22/2008
Publication #:
US20080217747
Pub Dt:
09/11/2008
Title:
INTRODUCTION OF METAL IMPURITY TO CHANGE WORKFUNCTION OF CONDUCTIVE ELECTRODES
47
Patent #:
7595554
Issue Dt:
09/29/2009
Application #:
12125971
Filing Dt:
05/23/2008
Publication #:
US20080217731
Pub Dt:
09/11/2008
Title:
AN INTERCONNECT STRUCTURE WITH DIELECTRIC AIR GAPS
48
Patent #:
7932514
Issue Dt:
04/26/2011
Application #:
12126015
Filing Dt:
05/23/2008
Publication #:
US20090289638
Pub Dt:
11/26/2009
Title:
MICROWAVE READOUT FOR FLUX-BIASED QUBITS
49
Patent #:
7781273
Issue Dt:
08/24/2010
Application #:
12127033
Filing Dt:
05/27/2008
Publication #:
US20080224258
Pub Dt:
09/18/2008
Title:
SEMICONDUCTOR STRUCTUE WITH MULTIPLE FINS HAVING DIFFERENT CHANNEL REGION HEIGHTS AND METHOD OF FORMING THE SEMICONDUCTOR STRUCTURE
50
Patent #:
8048330
Issue Dt:
11/01/2011
Application #:
12127921
Filing Dt:
05/28/2008
Publication #:
US20090170319
Pub Dt:
07/02/2009
Title:
METHOD OF FORMING AN INTERLAYER DIELECTRIC MATERIAL HAVING DIFFERENT REMOVAL RATES DURING CMP
51
Patent #:
7838913
Issue Dt:
11/23/2010
Application #:
12128134
Filing Dt:
05/28/2008
Publication #:
US20090294800
Pub Dt:
12/03/2009
Title:
HYBRID FET INCORPORATING A FINFET AND A PLANAR FET
52
Patent #:
7620510
Issue Dt:
11/17/2009
Application #:
12128526
Filing Dt:
05/28/2008
Publication #:
US20080225615
Pub Dt:
09/18/2008
Title:
PULSED RING OSCILLATOR CIRCUIT FOR STORAGE CELL READ TIMING EVALUATION
53
Patent #:
7768006
Issue Dt:
08/03/2010
Application #:
12129033
Filing Dt:
05/29/2008
Publication #:
US20090294873
Pub Dt:
12/03/2009
Title:
FIELD EFFECT STRUCTURE AND METHOD INCLUDING SPACER SHAPED METAL GATE WITH ASYMMETRIC SOURCE AND DRAIN REGIONS
54
Patent #:
7738284
Issue Dt:
06/15/2010
Application #:
12130408
Filing Dt:
05/30/2008
Publication #:
US20080225574
Pub Dt:
09/18/2008
Title:
MEMORY CELL WITH INDEPENDENT-GATE CONTROLLED ACCESS DEVICES AND MEMORY USING THE CELL
55
Patent #:
8278197
Issue Dt:
10/02/2012
Application #:
12130460
Filing Dt:
05/30/2008
Publication #:
US20090294850
Pub Dt:
12/03/2009
Title:
METHOD TO TAILOR LOCATION OF PEAK ELECTRIC FIELD DIRECTLY UNDERNEATH AN EXTENSION SPACER FOR ENHANCED PROGRAMMABILITY OF A PROMPT-SHIFT DEVICE
56
Patent #:
8018384
Issue Dt:
09/13/2011
Application #:
12130562
Filing Dt:
05/30/2008
Publication #:
US20090015485
Pub Dt:
01/15/2009
Title:
METHOD AND APPARATUS FOR PACKAGING AN INTEGRATED CHIP AND ANTENNA
57
Patent #:
7831816
Issue Dt:
11/09/2010
Application #:
12130990
Filing Dt:
05/30/2008
Publication #:
US20090300332
Pub Dt:
12/03/2009
Title:
NON-DESTRUCTIVE SIDEBAND READING OF PROCESSOR STATE INFORMATION
58
Patent #:
7755159
Issue Dt:
07/13/2010
Application #:
12131330
Filing Dt:
06/02/2008
Publication #:
US20080230875
Pub Dt:
09/25/2008
Title:
DUV LASER ANNEALING AND STABILIZATION OF SICOH FILMS
59
Patent #:
7737032
Issue Dt:
06/15/2010
Application #:
12131973
Filing Dt:
06/03/2008
Publication #:
US20080268600
Pub Dt:
10/30/2008
Title:
MOSFET STRUCTURE WITH MULTIPLE SELF-ALIGNED SILICIDE CONTACTS
60
Patent #:
7897428
Issue Dt:
03/01/2011
Application #:
12131988
Filing Dt:
06/03/2008
Publication #:
US20090294814
Pub Dt:
12/03/2009
Title:
THREE-DIMENSIONAL INTEGRATED CIRCUITS AND TECHNIQUES FOR FABRICATION THEREOF
61
Patent #:
7737528
Issue Dt:
06/15/2010
Application #:
12132337
Filing Dt:
06/03/2008
Publication #:
US20090294901
Pub Dt:
12/03/2009
Title:
STRUCTURE AND METHOD OF FORMING ELECTRICALLY BLOWN METAL FUSES FOR INTEGRATED CIRCUITS
62
Patent #:
7737563
Issue Dt:
06/15/2010
Application #:
12132734
Filing Dt:
06/04/2008
Publication #:
US20090302427
Pub Dt:
12/10/2009
Title:
SEMICONDUCTOR CHIP WITH REINFORCEMENT STRUCTURE
63
Patent #:
7928527
Issue Dt:
04/19/2011
Application #:
12132875
Filing Dt:
06/04/2008
Publication #:
US20090302406
Pub Dt:
12/10/2009
Title:
DELAMINATION AND CRACK RESISTANT IMAGE SENSOR STRUCTURES AND METHODS
64
Patent #:
7839221
Issue Dt:
11/23/2010
Application #:
12132960
Filing Dt:
06/04/2008
Publication #:
US20080246522
Pub Dt:
10/09/2008
Title:
PHASE LOCKED LOOP AND METHOD FOR ADJUSTING THE FREQUENCY AND PHASE IN THE PHASE LOCKED LOOP
65
Patent #:
8709855
Issue Dt:
04/29/2014
Application #:
12133379
Filing Dt:
06/05/2008
Publication #:
US20090305499
Pub Dt:
12/10/2009
Title:
INTRALEVEL CONDUCTIVE LIGHT SHIELD
66
Patent #:
8158988
Issue Dt:
04/17/2012
Application #:
12133380
Filing Dt:
06/05/2008
Publication #:
US20090303366
Pub Dt:
12/10/2009
Title:
INTERLEVEL CONDUCTIVE LIGHT SHIELD
67
Patent #:
8390038
Issue Dt:
03/05/2013
Application #:
12133425
Filing Dt:
06/05/2008
Publication #:
US20080232025
Pub Dt:
09/25/2008
Title:
MIM CAPACITOR AND METHOD OF MAKING SAME
68
Patent #:
8049526
Issue Dt:
11/01/2011
Application #:
12133724
Filing Dt:
06/05/2008
Publication #:
US20090306815
Pub Dt:
12/10/2009
Title:
ENHANCED SPEED SORTING OF MICROPROCESSORS AT WAFER TEST
69
Patent #:
7821081
Issue Dt:
10/26/2010
Application #:
12133817
Filing Dt:
06/05/2008
Publication #:
US20090302369
Pub Dt:
12/10/2009
Title:
METHOD AND APPARATUS FOR FLATBAND VOLTAGE TUNING OF HIGH-K FIELD EFFECT TRANSISTORS
70
Patent #:
7728614
Issue Dt:
06/01/2010
Application #:
12134748
Filing Dt:
06/06/2008
Publication #:
US20090302860
Pub Dt:
12/10/2009
Title:
OPERATING CHARACTERISTIC MEASUREMENT DEVICE AND METHODS THEREOF
71
Patent #:
7763507
Issue Dt:
07/27/2010
Application #:
12135478
Filing Dt:
06/09/2008
Publication #:
US20090140396
Pub Dt:
06/04/2009
Title:
STRESSED INTERLAYER DIELECTRIC WITH REDUCED PROBABILITY FOR VOID GENERATION IN A SEMICONDUCTOR DEVICE BY USING AN INTERMEDIATE ETCH CONTROL LAYER OF INCREASED THICKNESS
72
Patent #:
7707238
Issue Dt:
04/27/2010
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12135498
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Title:
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Assignor
1
GLOBALFOUNDRIES INC.
Exec Dt:
10/22/2020
Assignee
1
GLOBALFOUNDRIES U.S. INC.
2600 GREAT AMERICA WAY
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
GLOBALFOUNDRIES SINGAPORE PTE. LTD.
60 WOODLANDS INDUSTRIAL PARK D STREET 2,
SINGAPORE, 738406 SINGAPORE

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