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05/02/2013
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05/02/2013
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05/02/2013
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05/02/2013
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02/23/2012
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05/02/2013
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05/02/2013
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05/02/2013
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08/26/2014
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05/09/2013
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04/30/2013
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05/09/2013
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05/17/2012
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03/01/2012
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03/01/2012
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03/08/2012
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06/09/2015
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05/09/2013
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11/25/2014
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11/10/2011
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05/16/2013
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09/24/2013
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05/16/2013
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07/16/2013
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11/11/2011
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05/16/2013
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08/11/2015
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05/16/2013
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05/16/2013
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05/16/2013
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12/30/2014
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05/16/2013
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11/12/2013
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11/14/2011
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05/16/2013
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10/01/2013
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11/15/2011
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05/16/2013
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03/15/2012
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08/13/2013
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11/16/2011
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05/16/2013
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05/23/2013
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05/23/2013
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04/19/2016
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03/15/2012
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03/29/2012
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03/15/2012
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05/23/2013
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05/23/2013
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05/30/2013
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05/30/2013
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05/30/2013
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11/26/2013
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11/30/2011
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05/30/2013
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12/17/2013
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11/30/2011
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05/30/2013
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11/30/2011
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05/30/2013
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11/30/2011
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05/30/2013
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06/06/2013
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11/12/2013
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12/05/2011
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06/06/2013
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05/13/2014
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12/06/2011
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06/06/2013
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05/27/2014
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12/06/2011
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06/06/2013
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05/27/2014
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12/06/2011
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06/06/2013
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05/14/2013
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12/07/2011
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08/13/2013
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12/08/2011
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06/13/2013
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ON-CHIP CAPACITORS IN COMBINATION WITH CMOS DEVICES ON EXTREMELY THIN SEMICONDUCTOR ON INSULATOR (ETSOI) SUBSTRATES
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01/07/2014
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12/08/2011
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06/13/2013
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07/23/2013
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12/09/2011
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06/13/2013
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12/17/2013
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12/09/2011
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06/13/2013
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METAL E-FUSE WITH INTERMETALLIC COMPOUND PROGRAMMING MECHANISM AND METHODS OF MAKING SAME
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07/16/2013
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12/09/2011
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06/13/2013
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DISTRIBUTING SPARE LATCH CIRCUITS IN INTEGRATED CIRCUIT DESIGNS
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06/25/2013
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12/09/2011
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06/13/2013
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INTEGRATED CIRCUITS FORMED ON STRAINED SUBSTRATES AND INCLUDING RELAXED BUFFER LAYERS AND METHODS FOR THE MANUFACTURE THEREOF
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11/05/2013
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12/09/2011
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06/13/2013
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EMBEDDED DYNAMIC RANDOM ACCESS MEMORY DEVICE FORMED IN AN EXTREMELY THIN SEMICONDUCTOR ON INSULATOR (ETSOI) SUBSTRATE
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08/19/2014
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12/09/2011
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06/13/2013
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DEEP ISOLATION TRENCH STRUCTURE AND DEEP TRENCH CAPACITOR ON A SEMICONDUCTOR-ON-INSULATOR SUBSTRATE
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Patent #:
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Issue Dt:
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05/06/2014
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Application #:
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13316172
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Filing Dt:
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12/09/2011
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Publication #:
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Pub Dt:
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04/05/2012
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Title:
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METAL-INSULATOR-METAL-INSULATOR-METAL (MIMIM) MEMORY DEVICE
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Patent #:
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Issue Dt:
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06/10/2014
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Application #:
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13316635
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Filing Dt:
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12/12/2011
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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Method and Structure For Forming On-Chip High Quality Capacitors With ETSOI Transistors
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Patent #:
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Issue Dt:
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04/29/2014
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Application #:
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13316641
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Filing Dt:
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12/12/2011
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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Method and Structure For Forming ETSOI Capacitors, Diodes, Resistors and Back Gate Contacts
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13316677
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Filing Dt:
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12/12/2011
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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SEMICONDUCTOR DEVICE AND INTEGRATED CIRCUIT WITH HIGH-K/METAL GATE WITHOUT HIGH-K DIRECT CONTACT WITH STI
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Patent #:
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Issue Dt:
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09/17/2013
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Application #:
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13316978
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Filing Dt:
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12/12/2011
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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RESIZED WAFER WITH A NEGATIVE PHOTORESIST RING AND DESIGN STRUCTURES THEREOF
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Patent #:
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Issue Dt:
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01/28/2014
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Application #:
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13323093
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Filing Dt:
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12/12/2011
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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LOCALLY TAILORING CHEMICAL MECHANICAL POLISHING (CMP) POLISH RATE FOR DIELECTRICS
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Patent #:
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Issue Dt:
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12/16/2014
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Application #:
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13323285
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Filing Dt:
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12/12/2011
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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Method of Manufacturing a Film Bulk Acoustic Resonator with a Loading Element
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Patent #:
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Issue Dt:
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09/03/2013
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Application #:
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13323514
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Filing Dt:
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12/12/2011
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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DESIGN STRUCTURE INCLUDING VOLTAGE CONTROLLED NEGATIVE RESISTANCE
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Patent #:
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Issue Dt:
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09/11/2012
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Application #:
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13324499
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Filing Dt:
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12/13/2011
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Publication #:
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Pub Dt:
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04/05/2012
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Title:
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METAL WIRING STRUCTURES FOR UNIFORM CURRENT DENSITY IN C4 BALLS
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Patent #:
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Issue Dt:
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11/12/2013
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Application #:
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13324699
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Filing Dt:
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12/13/2011
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Publication #:
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Pub Dt:
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06/13/2013
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Title:
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SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
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Patent #:
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Issue Dt:
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05/27/2014
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Application #:
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13326409
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Filing Dt:
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12/15/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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MICRO-ELECTRO-MECHANICAL STRUCTURE (MEMS) CAPACITOR DEVICES, CAPACITOR TRIMMING THEREOF AND DESIGN STRUCTURES
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Patent #:
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Issue Dt:
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04/19/2016
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Application #:
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13326767
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Filing Dt:
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12/15/2011
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Publication #:
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Pub Dt:
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05/02/2013
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Title:
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NON-VOLATILE MEMORY STRUCTURE EMPLOYING HIGH-K GATE DIELECTRIC AND METAL GATE
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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13326825
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Filing Dt:
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12/15/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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FETS WITH HYBRID CHANNEL MATERIALS
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Patent #:
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Issue Dt:
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05/13/2014
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Application #:
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13328015
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Filing Dt:
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12/16/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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HYBRID CMOS NANOWIRE MESH DEVICE AND FINFET DEVICE
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Patent #:
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Issue Dt:
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04/29/2014
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Application #:
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13328069
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Filing Dt:
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12/16/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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HYBRID CMOS NANOWIRE MESH DEVICE AND PDSOI DEVICE
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Patent #:
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Issue Dt:
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10/22/2013
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Application #:
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13328106
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Filing Dt:
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12/16/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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HYBRID CMOS NANOWIRE MESH DEVICE AND BULK CMOS DEVICE
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Patent #:
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Issue Dt:
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10/07/2014
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Application #:
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13328358
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Filing Dt:
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12/16/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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RARE-EARTH OXIDE ISOLATED SEMICONDUCTOR FIN
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Patent #:
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Issue Dt:
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09/17/2013
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Application #:
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13328942
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Filing Dt:
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12/16/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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LAYOUT-SPECIFIC CLASSIFICATION AND PRIORITIZATION OF RECOMMENDED RULES VIOLATIONS
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Patent #:
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Issue Dt:
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12/10/2013
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Application #:
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13329604
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Filing Dt:
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12/19/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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V-GROOVE SOURCE/DRAIN MOSFET AND PROCESS FOR FABRICATING SAME
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Patent #:
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Issue Dt:
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03/19/2013
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Application #:
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13331606
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Filing Dt:
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12/20/2011
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Publication #:
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Pub Dt:
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06/21/2012
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Title:
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SEMICONDUCTOR DEVICE COMPRISING SELF-ALIGNED CONTACT BARS AND METAL LINES WITH INCREASED VIA LANDING REGIONS
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Patent #:
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Issue Dt:
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07/01/2014
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Application #:
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13331842
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Filing Dt:
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12/20/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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Methods of Forming Metal Silicide Regions on Semiconductor Devices
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Patent #:
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Issue Dt:
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09/03/2013
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Application #:
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13331951
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Filing Dt:
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12/20/2011
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Publication #:
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Pub Dt:
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06/20/2013
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Title:
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METHODS FOR THE FABRICATION OF INTEGRATED CIRCUITS INCLUDING BACK-ETCHING OF RAISED CONDUCTIVE STRUCTURES
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Patent #:
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Issue Dt:
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09/15/2015
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Application #:
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13332619
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Filing Dt:
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12/21/2011
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Publication #:
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Pub Dt:
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06/27/2013
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Title:
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METHOD OF MAKING CAPACITOR WITH A SEALING LINER AND SEMICONDUCTOR DEVICE COMPRISING SAME
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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13332676
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Filing Dt:
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12/21/2011
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Publication #:
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Pub Dt:
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06/27/2013
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Title:
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METHODS OF FORMING ISOLATION STRUCTURES ON FINFET SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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13332991
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Filing Dt:
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12/21/2011
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Publication #:
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Pub Dt:
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06/27/2013
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Title:
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SOURCE-DRAIN EXTENSION FORMATION IN REPLACEMENT METAL GATE TRANSISTOR DEVICE
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Patent #:
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Issue Dt:
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08/20/2013
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Application #:
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13333408
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Filing Dt:
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12/21/2011
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Publication #:
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Pub Dt:
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05/03/2012
| | | | |
Title:
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SYSTEM AND METHOD FOR IDENTIFYING SIMILAR MOLECULES
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Patent #:
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Issue Dt:
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12/09/2014
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Application #:
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13334903
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Filing Dt:
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12/22/2011
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Publication #:
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Pub Dt:
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06/27/2013
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Title:
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Proactive Cooling Of Chips Using Workload Information and Controls
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Patent #:
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Issue Dt:
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12/24/2013
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Application #:
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13335155
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Filing Dt:
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12/22/2011
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Publication #:
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Pub Dt:
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06/27/2013
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Title:
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ENERGY-EFFICIENT ROW DRIVER FOR PROGRAMMING PHASE CHANGE MEMORY
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Patent #:
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Issue Dt:
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10/07/2014
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Application #:
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13335237
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Filing Dt:
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12/22/2011
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Publication #:
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Pub Dt:
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06/27/2013
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Title:
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DRIFT MITIGATION FOR MULTI-BITS PHASE CHANGE MEMORY
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Patent #:
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Issue Dt:
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12/10/2013
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Application #:
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13335310
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Filing Dt:
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12/22/2011
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Publication #:
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Pub Dt:
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06/27/2013
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Title:
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PARALLEL PROGRAMMING SCHEME IN MULTI-BIT PHASE CHANGE MEMORY
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Patent #:
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Issue Dt:
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01/28/2014
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Application #:
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13337874
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Filing Dt:
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12/27/2011
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Publication #:
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Pub Dt:
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06/27/2013
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Title:
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FINFET WITH MERGED FINS AND VERTICAL SILICIDE
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Patent #:
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Issue Dt:
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01/14/2014
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Application #:
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13342228
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Filing Dt:
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01/03/2012
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Publication #:
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Pub Dt:
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07/05/2012
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Title:
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METHOD AND SYSTEM FOR GENERATING A PLACEMENT LAYOUT OF A VLSI CIRCUIT DESIGN
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Patent #:
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Issue Dt:
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12/03/2013
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Application #:
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13342409
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Filing Dt:
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01/03/2012
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Publication #:
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Pub Dt:
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05/03/2012
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Title:
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HIGH DENSITY DATA STORAGE MEDIUM, METHOD AND DEVICE
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08/12/2014
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13342435
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01/03/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) DEVICE HAVING GATE STRUCTURES CONNECTED BY A METAL GATE CONDUCTOR
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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13342689
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01/03/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) CAPACITIVE OHMIC SWITCH AND DESIGN STRUCTURES
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Patent #:
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Issue Dt:
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06/03/2014
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13342697
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01/03/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE AND METHOD OF FORMING
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Patent #:
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Issue Dt:
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05/20/2014
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Application #:
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13342797
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01/03/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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POWER SIGE HETEROJUNCTION BIPOLAR TRANSISTOR (HBT) WITH IMPROVED DRIVE CURRENT BY STRAIN COMPENSATION
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Patent #:
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Issue Dt:
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10/03/2017
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Application #:
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13343080
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01/04/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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LCR TEST CIRCUIT STRUCTURE FOR DETECTING METAL GATE DEFECT CONDITIONS
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Issue Dt:
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07/02/2013
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13343472
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Filing Dt:
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01/04/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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CMOS HAVING A SIC/SIGE ALLOY STACK
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Patent #:
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Issue Dt:
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06/17/2014
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Application #:
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13343513
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01/27/2012
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Publication #:
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Pub Dt:
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08/01/2013
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Title:
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METHODS FOR FABRICATING MOS DEVICES WITH STRESS MEMORIZATION
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Issue Dt:
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02/03/2015
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13343688
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01/04/2012
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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SOI LATERAL BIPOLAR TRANSISTOR HAVING MULTI-SIDED BASE CONTACT AND METHODS FOR MAKING SAME
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Patent #:
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Issue Dt:
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02/11/2014
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Application #:
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13343799
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Filing Dt:
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01/05/2012
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Publication #:
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Pub Dt:
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07/11/2013
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Title:
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NANOWIRE FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
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02/12/2013
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Application #:
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13343850
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Filing Dt:
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01/05/2012
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Publication #:
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Pub Dt:
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05/03/2012
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Title:
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WORK FUNCTION ENGINEERING FOR EDRAM MOSFETS
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Issue Dt:
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04/09/2013
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Application #:
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13344006
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Filing Dt:
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01/05/2012
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Publication #:
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Pub Dt:
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05/10/2012
| | | | |
Title:
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SOI CMOS CIRCUITS WITH SUBSTRATE BIAS
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