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Patent Assignment Details
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Reel/Frame:054633/0001   Pages: 1245
Recorded: 11/02/2020
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 8468
Page 38 of 85
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
1
Patent #:
Issue Dt:
06/03/2014
Application #:
13285162
Filing Dt:
10/31/2011
Publication #:
Pub Dt:
05/02/2013
Title:
Recessed Single Crystalline Source and Drain For Semiconductor-On-Insulator Devices
2
Patent #:
Issue Dt:
07/15/2014
Application #:
13285443
Filing Dt:
10/31/2011
Publication #:
Pub Dt:
05/02/2013
Title:
FLATTENED SUBSTRATE SURFACE FOR SUBSTRATE BONDING
3
Patent #:
Issue Dt:
04/16/2013
Application #:
13286292
Filing Dt:
11/01/2011
Publication #:
Pub Dt:
05/02/2013
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH CONTROLLED P-CHANNEL THRESHOLD VOLTAGE
4
Patent #:
Issue Dt:
10/29/2013
Application #:
13286394
Filing Dt:
11/01/2011
Publication #:
Pub Dt:
05/02/2013
Title:
GRAPHENE AND NANOTUBE/NANOWIRE TRANSISTOR WITH A SELF-ALIGNED GATE STRUCTURE ON TRANSPARENT SUBSTRATES AND METHOD OF MAKING SAME
5
Patent #:
Issue Dt:
12/03/2013
Application #:
13287170
Filing Dt:
11/02/2011
Publication #:
Pub Dt:
02/23/2012
Title:
SEA-OF-FINS STRUCTURE ON A SEMICONDUCTOR SUBSTRATE AND METHOD OF FABRICATION
6
Patent #:
Issue Dt:
05/27/2014
Application #:
13287403
Filing Dt:
11/02/2011
Publication #:
Pub Dt:
05/02/2013
Title:
METHODS OF FORMING PFET DEVICES WITH DIFFERENT STRUCTURES AND PERFORMANCE CHARACTERISTICS
7
Patent #:
Issue Dt:
08/05/2014
Application #:
13287466
Filing Dt:
11/02/2011
Publication #:
Pub Dt:
05/02/2013
Title:
METHODS OF EPITAXIALLY FORMING MATERIALS ON TRANSISTOR DEVICES
8
Patent #:
Issue Dt:
08/05/2014
Application #:
13287575
Filing Dt:
11/02/2011
Publication #:
Pub Dt:
05/02/2013
Title:
SEMICONDUCTOR STRUCTURE
9
Patent #:
Issue Dt:
08/26/2014
Application #:
13288541
Filing Dt:
11/03/2011
Publication #:
Pub Dt:
05/09/2013
Title:
Method and Apparatus for Simulating Gate Capacitance of a Tucked Transistor Device
10
Patent #:
Issue Dt:
04/30/2013
Application #:
13288645
Filing Dt:
11/03/2011
Publication #:
Pub Dt:
05/09/2013
Title:
THREE-DIMENSIONAL (3D) INTEGRATED CIRCUIT WITH ENHANCED COPPER-TO-COPPER BONDING
11
Patent #:
Issue Dt:
05/14/2013
Application #:
13288686
Filing Dt:
11/03/2011
Publication #:
Pub Dt:
05/17/2012
Title:
CMOS IMAGER PHOTODIODE WITH ENHANCED CAPACITANCE
12
Patent #:
Issue Dt:
10/16/2012
Application #:
13290634
Filing Dt:
11/07/2011
Publication #:
Pub Dt:
03/01/2012
Title:
SEMICONDUCTOR-ON-INSULATOR (SOI) STRUCTURES INCLUDING GRADIENT NITRIDED BURIED OXIDE (BOX)
13
Patent #:
Issue Dt:
07/08/2014
Application #:
13290824
Filing Dt:
11/07/2011
Publication #:
Pub Dt:
03/01/2012
Title:
SEMICONDUCTOR PACKAGE STRUCTURES HAVING LIQUID COOLER INTEGRATED WITH FIRST LEVEL CHIP PACKAGE MODULES
14
Patent #:
Issue Dt:
05/28/2013
Application #:
13292585
Filing Dt:
11/09/2011
Publication #:
Pub Dt:
03/08/2012
Title:
INTEGRATED CIRCUIT TRANSFORMER DEVICES FOR ON-CHIP MILLIMETER-WAVE APPLICATIONS
15
Patent #:
Issue Dt:
06/09/2015
Application #:
13292729
Filing Dt:
11/09/2011
Publication #:
Pub Dt:
05/09/2013
Title:
TUNABLE FILTER STRUCTURES AND DESIGN STRUCTURES
16
Patent #:
Issue Dt:
11/25/2014
Application #:
13293210
Filing Dt:
11/10/2011
Publication #:
Pub Dt:
05/16/2013
Title:
GATE STRUCTURES AND METHODS OF MANUFACTURE
17
Patent #:
Issue Dt:
09/24/2013
Application #:
13294210
Filing Dt:
11/11/2011
Publication #:
Pub Dt:
05/16/2013
Title:
TEST PATH SELECTION AND TEST PROGRAM GENERATION FOR PERFORMANCE TESTING INTEGRATED CIRCUIT CHIPS
18
Patent #:
Issue Dt:
07/16/2013
Application #:
13294220
Filing Dt:
11/11/2011
Publication #:
Pub Dt:
05/16/2013
Title:
DISPOSITION OF INTEGRATED CIRCUITS USING PERFORMANCE SORT RING OSCILLATOR AND PERFORMANCE PATH TESTING
19
Patent #:
Issue Dt:
08/11/2015
Application #:
13294603
Filing Dt:
11/11/2011
Publication #:
Pub Dt:
05/16/2013
Title:
INTEGRATED SEMICONDUCTOR DEVICES WITH SINGLE CRYSTALLINE BEAM, METHODS OF MANUFACTURE AND DESIGN STRUCTURE
20
Patent #:
Issue Dt:
10/01/2013
Application #:
13294610
Filing Dt:
11/11/2011
Publication #:
Pub Dt:
05/16/2013
Title:
METHODS OF MANUFACTURING INTEGRATED SEMICONDUCTOR DEVICES WITH SINGLE CRYSTALLINE BEAM
21
Patent #:
Issue Dt:
01/14/2014
Application #:
13294615
Filing Dt:
11/11/2011
Publication #:
Pub Dt:
05/16/2013
Title:
INTEGRATED SEMICONDUCTOR DEVICES WITH AMORPHOUS SILICON BEAM, METHODS OF MANUFACTURE AND DESIGN STRUCTURE
22
Patent #:
Issue Dt:
12/30/2014
Application #:
13294697
Filing Dt:
11/11/2011
Publication #:
Pub Dt:
05/16/2013
Title:
PNP BIPOLAR JUNCTION TRANSISTOR FABRICATION USING SELECTIVE EPITAXY
23
Patent #:
Issue Dt:
11/12/2013
Application #:
13295497
Filing Dt:
11/14/2011
Publication #:
Pub Dt:
05/16/2013
Title:
Methods of Controlling the Etching of Silicon Nitride Relative to Silicon Dioxide
24
Patent #:
Issue Dt:
10/01/2013
Application #:
13296496
Filing Dt:
11/15/2011
Publication #:
Pub Dt:
05/16/2013
Title:
BIPOLAR TRANSISTOR WITH A COLLECTOR HAVING A PROTECTED OUTER EDGE PORTION FOR REDUCED BASED-COLLECTOR JUNCTION CAPACITANCE AND A METHOD OF FORMING THE TRANSISTOR
25
Patent #:
Issue Dt:
04/30/2013
Application #:
13297860
Filing Dt:
11/16/2011
Publication #:
Pub Dt:
03/15/2012
Title:
METAL CAP LAYER WITH ENHANCED ETCH RESISTIVITY FOR COPPER-BASED METAL REGIONS IN SEMICONDUCTOR DEVICES
26
Patent #:
Issue Dt:
08/13/2013
Application #:
13298183
Filing Dt:
11/16/2011
Publication #:
Pub Dt:
05/16/2013
Title:
METAL PAD STRUCTURE FOR THICKNESS ENHANCEMENT OF POLYMER USED IN ELECTRICAL INTERCONNECTION OF SEMICONDUCTOR DIE TO SEMICONDUCTOR CHIP PACKAGE SUBSTRATE WITH SOLDER BUMP
27
Patent #:
Issue Dt:
04/22/2014
Application #:
13298587
Filing Dt:
11/17/2011
Publication #:
Pub Dt:
05/23/2013
Title:
MEMORY SYSTEM WITH DYNAMIC REFRESHING
28
Patent #:
Issue Dt:
08/19/2014
Application #:
13300146
Filing Dt:
11/18/2011
Publication #:
Pub Dt:
05/23/2013
Title:
GERMANIUM OXIDE FREE ATOMIC LAYER DEPOSITION OF SILICON OXIDE AND HIGH-K GATE DIELECTRIC ON GERMANIUM CONTAINING CHANNEL FOR CMOS DEVICES
29
Patent #:
Issue Dt:
04/19/2016
Application #:
13300913
Filing Dt:
11/21/2011
Publication #:
Pub Dt:
03/15/2012
Title:
3-D Integrated Semiconductor Device Comprising Intermediate Heat Spreading Capabilities
30
Patent #:
Issue Dt:
02/05/2013
Application #:
13301360
Filing Dt:
11/21/2011
Publication #:
Pub Dt:
03/29/2012
Title:
STRAINED THIN BODY SEMICONDUCTOR-ON-INSULATOR SUBSTRATE AND DEVICE
31
Patent #:
Issue Dt:
03/18/2014
Application #:
13302168
Filing Dt:
11/22/2011
Publication #:
Pub Dt:
03/15/2012
Title:
SEMICONDUCTOR STRUCTURE HAVING VIAS AND HIGH DENSITY CAPACITORS
32
Patent #:
Issue Dt:
06/09/2015
Application #:
13303248
Filing Dt:
11/23/2011
Publication #:
Pub Dt:
05/23/2013
Title:
HETEROJUNCTION BIPOLAR TRANSISTOR WITH EPITAXIAL EMITTER STACK TO IMPROVE VERTICAL SCALING
33
Patent #:
Issue Dt:
12/16/2014
Application #:
13303486
Filing Dt:
11/23/2011
Publication #:
Pub Dt:
05/23/2013
Title:
INTEGRATING ACTIVE MATRIX INORGANIC LIGHT EMITTING DIODES FOR DISPLAY DEVICES
34
Patent #:
Issue Dt:
10/15/2013
Application #:
13305303
Filing Dt:
11/28/2011
Publication #:
Pub Dt:
05/30/2013
Title:
METHODS OF PATTERNING FEATURES IN A STRUCTURE USING MULTIPLE SIDEWALL IMAGE TRANSFER TECHNIQUE
35
Patent #:
Issue Dt:
12/11/2012
Application #:
13305449
Filing Dt:
11/28/2011
Publication #:
Pub Dt:
03/22/2012
Title:
METHODS FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING DECREASED CONTACT RESISTANCE
36
Patent #:
Issue Dt:
07/29/2014
Application #:
13305482
Filing Dt:
11/28/2011
Publication #:
Pub Dt:
05/30/2013
Title:
MESH PLANES WITH ALTERNATING SPACES FOR MULTI-LAYERED CERAMIC PACKAGES
37
Patent #:
Issue Dt:
12/24/2013
Application #:
13306488
Filing Dt:
11/29/2011
Publication #:
Pub Dt:
05/30/2013
Title:
METHOD OF MANUFACTURING BACK GATE TRIGGERED SILICON CONTROLLED RECTIFIERS
38
Patent #:
Issue Dt:
05/27/2014
Application #:
13306702
Filing Dt:
11/29/2011
Publication #:
Pub Dt:
05/30/2013
Title:
METHODS FOR FORMING SEMICONDUCTOR DEVICES
39
Patent #:
Issue Dt:
11/26/2013
Application #:
13307079
Filing Dt:
11/30/2011
Publication #:
Pub Dt:
05/30/2013
Title:
PATTERNING METHOD FOR FABRICATION OF A SEMICONDUCTOR DEVICE
40
Patent #:
Issue Dt:
12/17/2013
Application #:
13307412
Filing Dt:
11/30/2011
Publication #:
Pub Dt:
05/30/2013
Title:
BIPOLAR TRANSISTOR WITH A RAISED COLLECTOR PEDESTAL FOR REDUCED CAPACITANCE
41
Patent #:
Issue Dt:
08/13/2013
Application #:
13307787
Filing Dt:
11/30/2011
Publication #:
Pub Dt:
05/30/2013
Title:
LOW RESISTANCE EMBEDDED STRAP FOR A TRENCH CAPACITOR
42
Patent #:
Issue Dt:
02/04/2014
Application #:
13307874
Filing Dt:
11/30/2011
Publication #:
Pub Dt:
05/30/2013
Title:
POLYSILICON/METAL CONTACT RESISTANCE IN DEEP TRENCH
43
Patent #:
Issue Dt:
02/04/2014
Application #:
13308974
Filing Dt:
12/01/2011
Publication #:
Pub Dt:
06/06/2013
Title:
N-DOPANT FOR CARBON NANOTUBES AND GRAPHENE
44
Patent #:
Issue Dt:
11/12/2013
Application #:
13310796
Filing Dt:
12/05/2011
Publication #:
Pub Dt:
06/06/2013
Title:
METHOD OF REPLACING SILICON WITH METAL IN INTEGRATED CIRCUIT CHIP FABRICATION
45
Patent #:
Issue Dt:
05/13/2014
Application #:
13311785
Filing Dt:
12/06/2011
Publication #:
Pub Dt:
06/06/2013
Title:
Electrical Test Structure for Devices Employing High-K Dielectrics or Metal Gates
46
Patent #:
Issue Dt:
05/27/2014
Application #:
13312047
Filing Dt:
12/06/2011
Publication #:
Pub Dt:
06/06/2013
Title:
RC-TRIGGERED ESD CLAMP DEVICE WITH FEEDBACK FOR TIME CONSTANT ADJUSTMENT
47
Patent #:
Issue Dt:
05/27/2014
Application #:
13312442
Filing Dt:
12/06/2011
Publication #:
Pub Dt:
06/06/2013
Title:
FORMING STRUCTURES ON RESISTIVE SUBSTRATES
48
Patent #:
Issue Dt:
05/14/2013
Application #:
13313163
Filing Dt:
12/07/2011
Title:
MICROMECHANICAL DEVICE AND METHODS TO FABRICATE SAME USING HARD MASK RESISTANT TO STRUCTURE RELEASE ETCH
49
Patent #:
Issue Dt:
08/13/2013
Application #:
13314238
Filing Dt:
12/08/2011
Publication #:
Pub Dt:
06/13/2013
Title:
ON-CHIP CAPACITORS IN COMBINATION WITH CMOS DEVICES ON EXTREMELY THIN SEMICONDUCTOR ON INSULATOR (ETSOI) SUBSTRATES
50
Patent #:
Issue Dt:
01/07/2014
Application #:
13314657
Filing Dt:
12/08/2011
Publication #:
Pub Dt:
06/13/2013
Title:
FLASH ARRAY BUILT IN SELF TEST ENGINE WITH TRACE ARRAY AND FLASH METRIC REPORTING
51
Patent #:
Issue Dt:
07/23/2013
Application #:
13315406
Filing Dt:
12/09/2011
Publication #:
Pub Dt:
06/13/2013
Title:
NATIVE THRESHOLD VOLTAGE SWITCHING
52
Patent #:
Issue Dt:
12/17/2013
Application #:
13315647
Filing Dt:
12/09/2011
Publication #:
Pub Dt:
06/13/2013
Title:
METAL E-FUSE WITH INTERMETALLIC COMPOUND PROGRAMMING MECHANISM AND METHODS OF MAKING SAME
53
Patent #:
Issue Dt:
07/16/2013
Application #:
13315914
Filing Dt:
12/09/2011
Publication #:
Pub Dt:
06/13/2013
Title:
DISTRIBUTING SPARE LATCH CIRCUITS IN INTEGRATED CIRCUIT DESIGNS
54
Patent #:
Issue Dt:
06/25/2013
Application #:
13315939
Filing Dt:
12/09/2011
Publication #:
Pub Dt:
06/13/2013
Title:
INTEGRATED CIRCUITS FORMED ON STRAINED SUBSTRATES AND INCLUDING RELAXED BUFFER LAYERS AND METHODS FOR THE MANUFACTURE THEREOF
55
Patent #:
Issue Dt:
11/05/2013
Application #:
13316056
Filing Dt:
12/09/2011
Publication #:
Pub Dt:
06/13/2013
Title:
EMBEDDED DYNAMIC RANDOM ACCESS MEMORY DEVICE FORMED IN AN EXTREMELY THIN SEMICONDUCTOR ON INSULATOR (ETSOI) SUBSTRATE
56
Patent #:
Issue Dt:
08/19/2014
Application #:
13316104
Filing Dt:
12/09/2011
Publication #:
Pub Dt:
06/13/2013
Title:
DEEP ISOLATION TRENCH STRUCTURE AND DEEP TRENCH CAPACITOR ON A SEMICONDUCTOR-ON-INSULATOR SUBSTRATE
57
Patent #:
Issue Dt:
05/06/2014
Application #:
13316172
Filing Dt:
12/09/2011
Publication #:
Pub Dt:
04/05/2012
Title:
METAL-INSULATOR-METAL-INSULATOR-METAL (MIMIM) MEMORY DEVICE
58
Patent #:
Issue Dt:
06/10/2014
Application #:
13316635
Filing Dt:
12/12/2011
Publication #:
Pub Dt:
06/13/2013
Title:
Method and Structure For Forming On-Chip High Quality Capacitors With ETSOI Transistors
59
Patent #:
Issue Dt:
04/29/2014
Application #:
13316641
Filing Dt:
12/12/2011
Publication #:
Pub Dt:
06/13/2013
Title:
Method and Structure For Forming ETSOI Capacitors, Diodes, Resistors and Back Gate Contacts
60
Patent #:
NONE
Issue Dt:
Application #:
13316677
Filing Dt:
12/12/2011
Publication #:
Pub Dt:
06/13/2013
Title:
SEMICONDUCTOR DEVICE AND INTEGRATED CIRCUIT WITH HIGH-K/METAL GATE WITHOUT HIGH-K DIRECT CONTACT WITH STI
61
Patent #:
Issue Dt:
09/17/2013
Application #:
13316978
Filing Dt:
12/12/2011
Publication #:
Pub Dt:
06/13/2013
Title:
RESIZED WAFER WITH A NEGATIVE PHOTORESIST RING AND DESIGN STRUCTURES THEREOF
62
Patent #:
Issue Dt:
01/28/2014
Application #:
13323093
Filing Dt:
12/12/2011
Publication #:
Pub Dt:
06/13/2013
Title:
LOCALLY TAILORING CHEMICAL MECHANICAL POLISHING (CMP) POLISH RATE FOR DIELECTRICS
63
Patent #:
Issue Dt:
12/16/2014
Application #:
13323285
Filing Dt:
12/12/2011
Publication #:
Pub Dt:
06/13/2013
Title:
Method of Manufacturing a Film Bulk Acoustic Resonator with a Loading Element
64
Patent #:
Issue Dt:
09/03/2013
Application #:
13323514
Filing Dt:
12/12/2011
Publication #:
Pub Dt:
06/13/2013
Title:
DESIGN STRUCTURE INCLUDING VOLTAGE CONTROLLED NEGATIVE RESISTANCE
65
Patent #:
Issue Dt:
09/11/2012
Application #:
13324499
Filing Dt:
12/13/2011
Publication #:
Pub Dt:
04/05/2012
Title:
METAL WIRING STRUCTURES FOR UNIFORM CURRENT DENSITY IN C4 BALLS
66
Patent #:
Issue Dt:
11/12/2013
Application #:
13324699
Filing Dt:
12/13/2011
Publication #:
Pub Dt:
06/13/2013
Title:
SEMICONDUCTOR DEVICE WITH TRANSISTOR LOCAL INTERCONNECTS
67
Patent #:
Issue Dt:
05/27/2014
Application #:
13326409
Filing Dt:
12/15/2011
Publication #:
Pub Dt:
06/20/2013
Title:
MICRO-ELECTRO-MECHANICAL STRUCTURE (MEMS) CAPACITOR DEVICES, CAPACITOR TRIMMING THEREOF AND DESIGN STRUCTURES
68
Patent #:
Issue Dt:
04/19/2016
Application #:
13326767
Filing Dt:
12/15/2011
Publication #:
Pub Dt:
05/02/2013
Title:
NON-VOLATILE MEMORY STRUCTURE EMPLOYING HIGH-K GATE DIELECTRIC AND METAL GATE
69
Patent #:
Issue Dt:
12/17/2013
Application #:
13326825
Filing Dt:
12/15/2011
Publication #:
Pub Dt:
06/20/2013
Title:
FETS WITH HYBRID CHANNEL MATERIALS
70
Patent #:
Issue Dt:
05/13/2014
Application #:
13328015
Filing Dt:
12/16/2011
Publication #:
Pub Dt:
06/20/2013
Title:
HYBRID CMOS NANOWIRE MESH DEVICE AND FINFET DEVICE
71
Patent #:
Issue Dt:
04/29/2014
Application #:
13328069
Filing Dt:
12/16/2011
Publication #:
Pub Dt:
06/20/2013
Title:
HYBRID CMOS NANOWIRE MESH DEVICE AND PDSOI DEVICE
72
Patent #:
Issue Dt:
10/22/2013
Application #:
13328106
Filing Dt:
12/16/2011
Publication #:
Pub Dt:
06/20/2013
Title:
HYBRID CMOS NANOWIRE MESH DEVICE AND BULK CMOS DEVICE
73
Patent #:
Issue Dt:
10/07/2014
Application #:
13328358
Filing Dt:
12/16/2011
Publication #:
Pub Dt:
06/20/2013
Title:
RARE-EARTH OXIDE ISOLATED SEMICONDUCTOR FIN
74
Patent #:
Issue Dt:
09/17/2013
Application #:
13328942
Filing Dt:
12/16/2011
Publication #:
Pub Dt:
06/20/2013
Title:
LAYOUT-SPECIFIC CLASSIFICATION AND PRIORITIZATION OF RECOMMENDED RULES VIOLATIONS
75
Patent #:
Issue Dt:
12/10/2013
Application #:
13329604
Filing Dt:
12/19/2011
Publication #:
Pub Dt:
06/20/2013
Title:
V-GROOVE SOURCE/DRAIN MOSFET AND PROCESS FOR FABRICATING SAME
76
Patent #:
Issue Dt:
03/19/2013
Application #:
13331606
Filing Dt:
12/20/2011
Publication #:
Pub Dt:
06/21/2012
Title:
SEMICONDUCTOR DEVICE COMPRISING SELF-ALIGNED CONTACT BARS AND METAL LINES WITH INCREASED VIA LANDING REGIONS
77
Patent #:
Issue Dt:
07/01/2014
Application #:
13331842
Filing Dt:
12/20/2011
Publication #:
Pub Dt:
06/20/2013
Title:
Methods of Forming Metal Silicide Regions on Semiconductor Devices
78
Patent #:
Issue Dt:
09/03/2013
Application #:
13331951
Filing Dt:
12/20/2011
Publication #:
Pub Dt:
06/20/2013
Title:
METHODS FOR THE FABRICATION OF INTEGRATED CIRCUITS INCLUDING BACK-ETCHING OF RAISED CONDUCTIVE STRUCTURES
79
Patent #:
Issue Dt:
09/15/2015
Application #:
13332619
Filing Dt:
12/21/2011
Publication #:
Pub Dt:
06/27/2013
Title:
METHOD OF MAKING CAPACITOR WITH A SEALING LINER AND SEMICONDUCTOR DEVICE COMPRISING SAME
80
Patent #:
Issue Dt:
12/17/2013
Application #:
13332676
Filing Dt:
12/21/2011
Publication #:
Pub Dt:
06/27/2013
Title:
METHODS OF FORMING ISOLATION STRUCTURES ON FINFET SEMICONDUCTOR DEVICES
81
Patent #:
Issue Dt:
11/26/2013
Application #:
13332991
Filing Dt:
12/21/2011
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Pub Dt:
06/27/2013
Title:
SOURCE-DRAIN EXTENSION FORMATION IN REPLACEMENT METAL GATE TRANSISTOR DEVICE
82
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Issue Dt:
08/20/2013
Application #:
13333408
Filing Dt:
12/21/2011
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Pub Dt:
05/03/2012
Title:
SYSTEM AND METHOD FOR IDENTIFYING SIMILAR MOLECULES
83
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12/09/2014
Application #:
13334903
Filing Dt:
12/22/2011
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Pub Dt:
06/27/2013
Title:
Proactive Cooling Of Chips Using Workload Information and Controls
84
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Issue Dt:
12/24/2013
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13335155
Filing Dt:
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Publication #:
Pub Dt:
06/27/2013
Title:
ENERGY-EFFICIENT ROW DRIVER FOR PROGRAMMING PHASE CHANGE MEMORY
85
Patent #:
Issue Dt:
10/07/2014
Application #:
13335237
Filing Dt:
12/22/2011
Publication #:
Pub Dt:
06/27/2013
Title:
DRIFT MITIGATION FOR MULTI-BITS PHASE CHANGE MEMORY
86
Patent #:
Issue Dt:
12/10/2013
Application #:
13335310
Filing Dt:
12/22/2011
Publication #:
Pub Dt:
06/27/2013
Title:
PARALLEL PROGRAMMING SCHEME IN MULTI-BIT PHASE CHANGE MEMORY
87
Patent #:
Issue Dt:
01/28/2014
Application #:
13337874
Filing Dt:
12/27/2011
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Pub Dt:
06/27/2013
Title:
FINFET WITH MERGED FINS AND VERTICAL SILICIDE
88
Patent #:
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01/14/2014
Application #:
13342228
Filing Dt:
01/03/2012
Publication #:
Pub Dt:
07/05/2012
Title:
METHOD AND SYSTEM FOR GENERATING A PLACEMENT LAYOUT OF A VLSI CIRCUIT DESIGN
89
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12/03/2013
Application #:
13342409
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01/03/2012
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Pub Dt:
05/03/2012
Title:
HIGH DENSITY DATA STORAGE MEDIUM, METHOD AND DEVICE
90
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Issue Dt:
08/12/2014
Application #:
13342435
Filing Dt:
01/03/2012
Publication #:
Pub Dt:
07/04/2013
Title:
COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) DEVICE HAVING GATE STRUCTURES CONNECTED BY A METAL GATE CONDUCTOR
91
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Issue Dt:
11/26/2013
Application #:
13342689
Filing Dt:
01/03/2012
Publication #:
Pub Dt:
07/04/2013
Title:
MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) CAPACITIVE OHMIC SWITCH AND DESIGN STRUCTURES
92
Patent #:
Issue Dt:
06/03/2014
Application #:
13342697
Filing Dt:
01/03/2012
Publication #:
Pub Dt:
07/04/2013
Title:
HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE AND METHOD OF FORMING
93
Patent #:
Issue Dt:
05/20/2014
Application #:
13342797
Filing Dt:
01/03/2012
Publication #:
Pub Dt:
07/04/2013
Title:
POWER SIGE HETEROJUNCTION BIPOLAR TRANSISTOR (HBT) WITH IMPROVED DRIVE CURRENT BY STRAIN COMPENSATION
94
Patent #:
Issue Dt:
10/03/2017
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13343080
Filing Dt:
01/04/2012
Publication #:
Pub Dt:
07/04/2013
Title:
LCR TEST CIRCUIT STRUCTURE FOR DETECTING METAL GATE DEFECT CONDITIONS
95
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07/02/2013
Application #:
13343472
Filing Dt:
01/04/2012
Publication #:
Pub Dt:
07/04/2013
Title:
CMOS HAVING A SIC/SIGE ALLOY STACK
96
Patent #:
Issue Dt:
06/17/2014
Application #:
13343513
Filing Dt:
01/27/2012
Publication #:
Pub Dt:
08/01/2013
Title:
METHODS FOR FABRICATING MOS DEVICES WITH STRESS MEMORIZATION
97
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02/03/2015
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13343688
Filing Dt:
01/04/2012
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Pub Dt:
07/04/2013
Title:
SOI LATERAL BIPOLAR TRANSISTOR HAVING MULTI-SIDED BASE CONTACT AND METHODS FOR MAKING SAME
98
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02/11/2014
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13343799
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01/05/2012
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Pub Dt:
07/11/2013
Title:
NANOWIRE FIELD EFFECT TRANSISTORS
99
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02/12/2013
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13343850
Filing Dt:
01/05/2012
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Pub Dt:
05/03/2012
Title:
WORK FUNCTION ENGINEERING FOR EDRAM MOSFETS
100
Patent #:
Issue Dt:
04/09/2013
Application #:
13344006
Filing Dt:
01/05/2012
Publication #:
Pub Dt:
05/10/2012
Title:
SOI CMOS CIRCUITS WITH SUBSTRATE BIAS
Assignor
1
Exec Dt:
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Assignee
1
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