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06/27/2017
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14284932
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05/22/2014
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11/26/2015
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Title:
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03/14/2017
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14285067
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05/22/2014
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11/26/2015
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RECONFIGURABLE BANDSTOP FILTER
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10/04/2016
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14285145
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05/22/2014
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11/26/2015
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RECONFIGURABLE RAT RACE COUPLER
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04/28/2015
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14286074
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05/23/2014
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09/25/2014
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03/31/2015
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14286285
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05/23/2014
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09/11/2014
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05/03/2016
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14286395
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05/23/2014
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11/26/2015
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MASK-AWARE ROUTING AND RESULTING DEVICE
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01/12/2016
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14286400
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05/23/2014
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11/26/2015
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Title:
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RAISED SOURCE/DRAIN EPI WITH SUPPRESSED LATERAL EPI OVERGROWTH
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07/19/2016
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14287249
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05/27/2014
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12/04/2014
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FLUID-COOLED ELECTRONIC CIRCUIT DEVICE WITH COOLING FLUID CONDUITS HAVING OPTICAL TRANSMISSION MEDIUM
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05/26/2015
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14288034
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05/27/2014
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09/18/2014
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SEMICONDUCTOR DEVICES HAVING DIELECTRIC CAPS ON CONTACTS AND RELATED FABRICATION METHODS
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07/11/2017
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14288278
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05/27/2014
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12/03/2015
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METHODS, APPARATUS AND SYSTEM FOR SCREENING PROCESS SPLITS FOR TECHNOLOGY DEVELOPMENT
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NONE
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14288551
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05/28/2014
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12/03/2015
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SEMICONDUCTOR DEVICES AND METHODS FOR FORMING A GATE WITH REDUCED DEFECTS
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04/26/2016
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14288852
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05/28/2014
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12/03/2015
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SEMICONDUCTOR STRUCTURES WITH ISOLATED OHMIC TRENCHES AND STAND-ALONE ISOLATION TRENCHES AND RELATED METHOD
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07/14/2015
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14292312
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05/30/2014
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11/27/2014
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COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) DEVICE HAVING GATE STRUCTURES CONNECTED BY A METAL GATE CONDUCTOR
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11/15/2016
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14293306
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06/02/2014
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12/03/2015
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Title:
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ENCRYPTION ENGINE WITH TWIN CELL MEMORY ARRAY
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12/15/2015
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14294467
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06/03/2014
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12/03/2015
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Title:
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TRANSISTOR WITH EMBEDDED STRESS-INDUCING LAYERS
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03/08/2016
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14295618
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06/04/2014
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12/10/2015
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Title:
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METHOD FOR MAKING SEMICONDUCTOR DEVICE WITH ISOLATION PILLARS BETWEEN ADJACENT SEMICONDUCTOR FINS
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08/09/2016
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14296812
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06/05/2014
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12/10/2015
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Title:
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EMBEDDING SEMICONDUCTOR DEVICES IN SILICON-ON-INSULATOR WAFERS CONNECTED USING THROUGH SILICON VIAS
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07/05/2016
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14297822
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06/06/2014
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12/10/2015
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Title:
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BURIED SOURCE-DRAIN CONTACT FOR INTEGRATED CIRCUIT TRANSISTOR DEVICES AND METHOD OF MAKING SAME
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02/21/2017
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14298040
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06/06/2014
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12/10/2015
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VERTICAL CAPACITORS WITH SPACED CONDUCTIVE LINES
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05/02/2017
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14299354
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06/09/2014
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01/01/2015
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Title:
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OPTICAL DEVICE
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04/19/2016
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14300506
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06/10/2014
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12/10/2015
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Title:
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METHOD FOR MAKING A SEMICONDUCTOR DEVICE WHILE AVOIDING NODULES ON A GATE
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01/26/2016
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14301395
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06/11/2014
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09/25/2014
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THROUGH SILICON VIA WAFER, CONTACTS AND DESIGN STRUCTURES
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04/12/2016
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14301748
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06/11/2014
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12/17/2015
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Title:
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FORMING GATE AND SOURCE/DRAIN CONTACT OPENINGS BY PERFORMING A COMMON ETCH PATTERNING PROCESS
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04/25/2017
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14301864
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06/11/2014
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12/17/2015
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Title:
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METHODS OF FORMING A PROTECTION LAYER ON A SEMICONDUCTOR DEVICE AND THE RESULTING DEVICE
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06/28/2016
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14302585
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06/12/2014
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Pub Dt:
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12/17/2015
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Title:
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STABLE NICKEL SILICIDE FORMATION WITH FLUORINE INCORPORATION AND RELATED IC STRUCTURE
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01/10/2017
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14303217
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06/12/2014
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02/05/2015
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Title:
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Deployment of Software Images with Distinct Configuration Logic
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09/06/2016
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14304318
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06/13/2014
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12/17/2015
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SILICON WAVEGUIDE STRUCTURE WITH ARBITRARY GEOMETRY ON BULK SILICON SUBSTRATE, RELATED SYSTEMS AND PROGRAM PRODUCTS
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01/09/2018
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14304564
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06/13/2014
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12/17/2015
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SOLENOIDAL SERIES STACKED MULTIPATH INDUCTOR
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02/14/2017
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14304598
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06/13/2014
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12/17/2015
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HIGH-Q MULTIPATH PARALLEL STACKED INDUCTOR
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08/18/2015
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14305457
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06/16/2014
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Title:
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METHODS OF FORMING REPLACEMENT GATE STRUCTURES ON SEMICONDUCTOR DEVICES
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02/21/2017
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14305543
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06/16/2014
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12/17/2015
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FINFET AND NANOWIRE SEMICONDUCTOR DEVICES WITH SUSPENDED CHANNEL REGIONS AND GATE STRUCTURES SURROUNDING THE SUSPENDED CHANNEL REGIONS
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12/29/2015
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14305630
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06/16/2014
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12/17/2015
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Title:
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METHOD AND APPARATUS FOR BIT-LINE SENSING GATES ON AN SRAM CELL
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02/23/2016
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14306598
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06/17/2014
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12/17/2015
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WAFER STRESS CONTROL WITH BACKSIDE PATTERNING
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07/21/2015
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14306599
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06/17/2014
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01/01/2015
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PHASE-CHANGE MEMORY CELLS
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04/12/2016
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14306715
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06/17/2014
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12/17/2015
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CORRECTING FOR STRESS INDUCED PATTERN SHIFTS IN SEMICONDUCTOR MANUFACTURING
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05/31/2016
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14306790
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06/17/2014
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12/25/2014
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MANAGING A TRANSLATION LOOKASIDE BUFFER
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05/23/2017
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14307011
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06/17/2014
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12/17/2015
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METHOD OF FORMING A REDUCED RESISTANCE FIN STRUCTURE
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12/27/2016
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14307078
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06/17/2014
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12/17/2015
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SEMICONDUCTOR STRUCTURE INCLUDING CAPACITORS HAVING DIFFERENT CAPACITOR DIELECTRICS AND METHOD FOR THE FORMATION THEREOF
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11/29/2016
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14307575
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06/18/2014
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12/24/2015
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REPLACEMENT GATE STRUCTURE FOR ENHANCING CONDUCTIVITY
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11/01/2016
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14307604
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06/18/2014
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12/24/2015
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BURIED SIGNAL TRANSMISSION LINE
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11/08/2016
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14308138
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06/18/2014
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12/24/2015
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METHODS OF FORMING NANOWIRE DEVICES WITH DOPED EXTENSION REGIONS AND THE RESULTING DEVICES
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08/30/2016
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14308257
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06/18/2014
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12/24/2015
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METHODS OF FORMING NANOWIRE DEVICES WITH SPACERS AND THE RESULTING DEVICES
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04/10/2018
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14309096
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06/19/2014
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12/24/2015
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METHOD AND STRUCTURE FOR PROTECTING GATES DURING EPITAXIAL GROWTH
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12/13/2016
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14310097
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06/20/2014
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12/25/2014
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Detecting Full-System Idle State In Adaptive-Tick Kernels
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02/16/2016
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14310314
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06/20/2014
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12/24/2015
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Title:
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MINIMIZING VOID FORMATION IN SEMICONDUCTOR VIAS AND TRENCHES
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09/26/2017
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14310470
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06/20/2014
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05/28/2015
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SYNCHRONOUS SPLIT PAYMENT TRANSACTION MANAGEMENT
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07/09/2019
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14311761
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06/23/2014
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Pub Dt:
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12/24/2015
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METHODS AND SYSTEMS FOR CHEMICAL MECHANICAL PLANARIZATION ENDPOINT DETECTION USING AN ALTERNATING CURRENT REFERENCE SIGNAL
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04/14/2015
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14312077
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06/23/2014
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10/09/2014
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Title:
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DRAM CELL BASED ON CONDUCTIVE NANOCHANNEL PLATE
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05/26/2015
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14312467
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06/23/2014
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OPTICAL LATCH AND SYNAPTIC SWITCH
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NONE
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14312759
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06/24/2014
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02/19/2015
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PRESENTING MEANINGFUL INFORMATION SUMMARY FOR ANALYZING COMPLEX VISUALIZATIONS
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08/08/2017
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14313751
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06/24/2014
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12/25/2014
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METHOD OF DEPOSITING COPPER USING PHYSICAL VAPOR DEPOSITION
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03/29/2016
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14314595
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06/25/2014
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Pub Dt:
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12/31/2015
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Title:
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METHODS OF FORMING INTEGRATED CIRCUITS WITH A PLANARIZED PERMANET LAYER AND METHODS FOR FORMING FINFET DEVICES WITH A PLANARIZED PERMANENT LAYER
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10/03/2017
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14314670
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06/25/2014
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Pub Dt:
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12/31/2015
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Title:
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TITANIUM SILICIDE FORMATION IN A NARROW SOURCE-DRAIN CONTACT
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12/20/2016
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14315362
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06/26/2014
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Pub Dt:
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12/31/2015
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Title:
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TRAPPING DISLOCATIONS IN HIGH-MOBILITY FINS BELOW ISOLATION LAYER
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04/18/2017
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14315385
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06/26/2014
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Pub Dt:
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12/31/2015
| | | | |
Title:
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JUNCTION BUTTING STRUCTURE USING NONUNIFORM TRENCH SHAPE
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08/15/2017
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14315602
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06/26/2014
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Pub Dt:
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12/31/2015
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Title:
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NON-PLANAR STRUCTURE WITH EXTENDED EXPOSED RAISED STRUCTURES AND SAME-LEVEL GATE AND SPACERS
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12/08/2015
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14315885
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06/26/2014
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Pub Dt:
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12/31/2015
| | | | |
Title:
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THRESHOLD VOLTAGE CONTROL FOR MIXED-TYPE NON-PLANAR SEMICONDUCTOR DEVICES
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NONE
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14316930
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Filing Dt:
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06/27/2014
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Publication #:
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Pub Dt:
|
03/26/2015
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Title:
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DYNAMIC DETERMINATION OF INVENTORY PROTOCOL
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Patent #:
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Issue Dt:
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11/29/2016
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Application #:
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14316988
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Filing Dt:
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06/27/2014
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Publication #:
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Pub Dt:
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12/31/2015
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Title:
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SIDEWALL IMAGE TEMPLATES FOR DIRECTED SELF-ASSEMBLY MATERIALS
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Patent #:
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Issue Dt:
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08/15/2017
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Application #:
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14320841
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Filing Dt:
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07/01/2014
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Publication #:
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Pub Dt:
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01/01/2015
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Title:
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GENERATION-BASED MEMORY SYNCHRONIZATION IN A MULTIPROCESSOR SYSTEM WITH WEAKLY CONSISTENT MEMORY ACCESSES
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Patent #:
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Issue Dt:
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02/16/2016
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Application #:
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14322987
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Filing Dt:
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07/03/2014
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Publication #:
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Pub Dt:
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01/07/2016
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Title:
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METHODS OF FORMING A CHANNEL REGION FOR A SEMICONDUCTOR DEVICE BY PERFORMING A TRIPLE CLADDING PROCESS
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Patent #:
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Issue Dt:
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10/04/2016
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Application #:
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14323164
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Filing Dt:
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07/03/2014
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Publication #:
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Pub Dt:
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01/07/2016
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Title:
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PHOTODETECTOR AND METHOD OF FORMING THE PHOTODETECTOR ON STACKED TRENCH ISOLATION REGIONS
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Patent #:
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Issue Dt:
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06/23/2015
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Application #:
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14323212
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Filing Dt:
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07/03/2014
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Publication #:
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Pub Dt:
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10/23/2014
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Title:
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Graphene and Nanotube/Nanowire Transistor with a Self-Aligned Gate Structure on Transparent Substrates and Method of Making Same
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Patent #:
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Issue Dt:
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06/14/2016
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Application #:
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14325668
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Filing Dt:
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07/08/2014
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Publication #:
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Pub Dt:
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01/14/2016
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Title:
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METHOD AND STRUCTURE TO SUPPRESS FINFET HEATING
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Patent #:
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Issue Dt:
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01/26/2016
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Application #:
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14327598
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Filing Dt:
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07/10/2014
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Publication #:
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Pub Dt:
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10/30/2014
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Title:
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UNIFORM FINFET GATE HEIGHT
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Patent #:
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Issue Dt:
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04/05/2016
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Application #:
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14332886
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Filing Dt:
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07/16/2014
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Publication #:
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Pub Dt:
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01/21/2016
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Title:
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INTEGRATED LDMOS DEVICES FOR SILICON PHOTONICS
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Patent #:
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Issue Dt:
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02/23/2016
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Application #:
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14333135
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Filing Dt:
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07/16/2014
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Publication #:
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Pub Dt:
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11/06/2014
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Title:
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FINFET SEMICONDUCTOR DEVICE WITH A RECESSED LINER THAT DEFINES A FIN HEIGHT OF THE FINFET DEVICE
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Patent #:
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Issue Dt:
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06/09/2015
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Application #:
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14333555
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Filing Dt:
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07/17/2014
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Publication #:
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Pub Dt:
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11/06/2014
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Title:
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ROBUST REPLACEMENT GATE INTEGRATION
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14334269
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Filing Dt:
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07/17/2014
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Publication #:
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Pub Dt:
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11/06/2014
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Title:
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FINFET DEVICE WITH AN ETCH STOP LAYER POSITIONED BETWEEN A GATE STRUCTURE AND A LOCAL ISOLATION MATERIAL
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Patent #:
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Issue Dt:
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02/28/2017
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Application #:
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14334385
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Filing Dt:
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07/17/2014
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Publication #:
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Pub Dt:
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01/21/2016
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Title:
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ANISOTROPIC MATERIAL DAMAGE PROCESS FOR ETCHING LOW-K DIELECTRIC MATERIALS
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Patent #:
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Issue Dt:
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06/14/2016
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Application #:
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14334950
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Filing Dt:
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07/18/2014
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Publication #:
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Pub Dt:
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01/21/2016
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Title:
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TRANSISTORS COMPRISING DOPED REGION-GAP-DOPED REGION STRUCTURES AND METHODS OF FABRICATION
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Patent #:
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Issue Dt:
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07/07/2015
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Application #:
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14334953
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Filing Dt:
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07/18/2014
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Title:
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SHALLOW TRENCH ISOLATION STRUCTURE WITH SIGMA CAVITY
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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14336407
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Filing Dt:
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07/21/2014
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Publication #:
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Pub Dt:
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02/05/2015
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Title:
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RARE-EARTH OXIDE ISOLATED SEMICONDUCTOR FIN
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Patent #:
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Issue Dt:
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08/11/2015
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Application #:
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14337596
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Filing Dt:
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07/22/2014
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Publication #:
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Pub Dt:
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11/13/2014
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Title:
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BIT CELL WITH DOUBLE PATTERENED METAL LAYER STRUCTURES
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Patent #:
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Issue Dt:
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03/01/2016
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Application #:
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14341985
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Filing Dt:
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07/28/2014
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Publication #:
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Pub Dt:
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01/28/2016
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Title:
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METHODS FOR FABRICATING INTEGRATED CIRCUITS USING DIRECTED SELF-ASSEMBLY
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Patent #:
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Issue Dt:
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09/13/2016
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Application #:
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14344629
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Filing Dt:
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03/13/2014
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Publication #:
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Pub Dt:
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12/18/2014
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Title:
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Message Reconciliation During Disaster Recovery
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Patent #:
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Issue Dt:
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09/13/2016
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Application #:
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14353053
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Filing Dt:
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09/08/2014
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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NON-INTRUSIVE METHOD AND APPARATUS FOR AUTOMATICALLY DISPATCHING SECURITY RULES IN CLOUD ENVIRONMENT
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Patent #:
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Issue Dt:
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03/08/2016
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Application #:
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14362635
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Filing Dt:
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06/04/2014
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Publication #:
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Pub Dt:
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11/20/2014
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Title:
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AUTOMATED MANAGEMENT OF PRIVATE INFORMATION
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Patent #:
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Issue Dt:
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05/10/2016
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Application #:
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14363465
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Filing Dt:
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06/06/2014
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Publication #:
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Pub Dt:
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11/06/2014
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Title:
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SYSTEM AND METHOD FOR EFFICIENT SERVICE-INSTANCE ORIENTED ENERGY MANAGEMENT IN THE INTERNET OF THINGS
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Patent #:
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Issue Dt:
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01/12/2016
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Application #:
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14364330
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Filing Dt:
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06/11/2014
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Publication #:
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Pub Dt:
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11/06/2014
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Title:
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METHOD FOR ROUTING DATA IN A WIRELESS SENSOR NETWORK
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Patent #:
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Issue Dt:
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07/19/2016
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Application #:
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14372466
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Filing Dt:
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07/16/2014
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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AUTHENTICATING ACCEPTANCE OF A STRING USING AN AUTOMATON
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Patent #:
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Issue Dt:
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11/06/2018
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Application #:
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14378118
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Filing Dt:
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08/12/2014
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Publication #:
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Pub Dt:
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01/29/2015
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Title:
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OBJECT CACHING FOR MOBILE DATA COMMUNICATION WITH MOBILITY MANAGEMENT
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Patent #:
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Issue Dt:
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09/19/2017
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Application #:
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14381963
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Filing Dt:
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08/28/2014
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Publication #:
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Pub Dt:
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03/19/2015
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Title:
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Position Sensing Apparatus
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Patent #:
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Issue Dt:
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04/28/2015
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Application #:
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14444330
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Filing Dt:
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07/28/2014
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Publication #:
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Pub Dt:
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11/13/2014
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Title:
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INTEGRATED CIRCUIT HAVING RAISED SOURCE DRAINS DEVICES WITH REDUCED SILICIDE CONTACT RESISTANCE AND METHODS TO FABRICATE SAME
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Patent #:
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Issue Dt:
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05/17/2016
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Application #:
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14446020
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Filing Dt:
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07/29/2014
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Publication #:
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Pub Dt:
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03/26/2015
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Title:
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DETECTING PHISHING OF A MATRIX BARCODE
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Patent #:
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Issue Dt:
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02/10/2015
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Application #:
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14446634
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Filing Dt:
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07/30/2014
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Publication #:
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Pub Dt:
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11/20/2014
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Title:
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METHOD OF FORMING A THROUGH-SILICON VIA UTILIZING A METAL CONTACT PAD IN A BACK-END-OF-LINE WIRING LEVEL TO FILL THE THROUGH-SILICON VIA
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Patent #:
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Issue Dt:
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08/09/2016
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Application #:
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14446710
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Filing Dt:
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07/30/2014
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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IDENTIFYING CONTENT FROM AN ENCRYPTED COMMUNICATION
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Patent #:
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Issue Dt:
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02/10/2015
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Application #:
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14446797
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Filing Dt:
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07/30/2014
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Publication #:
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Pub Dt:
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11/13/2014
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Title:
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CONTACT LANDING PADS FOR A SEMICONDUCTOR DEVICE AND METHODS OF MAKING SAME
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Patent #:
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Issue Dt:
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02/02/2016
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Application #:
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14447678
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Filing Dt:
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07/31/2014
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Publication #:
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Pub Dt:
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02/04/2016
| | | | |
Title:
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UNIAXIALLY-STRAINED FD-SOI FINFET
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Patent #:
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Issue Dt:
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12/01/2015
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Application #:
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14447685
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Filing Dt:
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07/31/2014
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Title:
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FINFETS AND TECHNIQUES FOR CONTROLLING SOURCE AND DRAIN JUNCTION PROFILES IN FINFETS
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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14447710
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Filing Dt:
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07/31/2014
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Publication #:
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Pub Dt:
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11/20/2014
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Title:
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STRUCTURE AND METHOD FOR MAKING CRACK STOP FOR 3D INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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12/01/2015
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Application #:
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14447727
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Filing Dt:
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07/31/2014
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Title:
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METHODS FOR FORMING VERTICAL AND SHARP JUNCTIONS IN FINFET STRUCTURES
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Patent #:
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Issue Dt:
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03/03/2015
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Application #:
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14447830
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Filing Dt:
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07/31/2014
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Publication #:
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Pub Dt:
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11/20/2014
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Title:
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STRAIN ENHANCEMENT IN TRANSISTORS COMPRISING AN EMBEDDED STRAIN-INDUCING SEMICONDUCTOR ALLOY BY CREATING A PATTERNING NON-UNIFORMITY AT THE BOTTOM OF THE GATE ELECTRODE
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Patent #:
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Issue Dt:
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06/30/2015
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Application #:
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14449177
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Filing Dt:
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08/01/2014
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Publication #:
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Pub Dt:
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03/12/2015
| | | | |
Title:
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ELECTROMECHANICAL SWITCHING DEVICE WITH 2D LAYERED MATERIAL SURFACES
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Patent #:
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Issue Dt:
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06/16/2015
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Application #:
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14449180
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Filing Dt:
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08/01/2014
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Publication #:
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Pub Dt:
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11/20/2014
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Title:
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LOW VOLTAGE METAL GATE ANTIFUSE WITH DEPLETION MODE MOSFET
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Patent #:
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Issue Dt:
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07/21/2015
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Application #:
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14450535
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Filing Dt:
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08/04/2014
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Title:
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METHODS FOR FORMING FinFETs WITH REDUCED SERIES RESISTANCE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14450721
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Filing Dt:
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08/04/2014
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Publication #:
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Pub Dt:
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02/12/2015
| | | | |
Title:
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TECHNIQUES FOR VALIDATING DISTRIBUTED DENIAL OF SERVICE ATTACKS BASED ON SOCIAL MEDIA CONTENT
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Patent #:
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Issue Dt:
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03/22/2016
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Application #:
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14451778
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Filing Dt:
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08/05/2014
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Publication #:
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Pub Dt:
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03/05/2015
| | | | |
Title:
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REMOTE DATA STORAGE
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|
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Patent #:
|
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Issue Dt:
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07/21/2015
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Application #:
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14451836
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Filing Dt:
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08/05/2014
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Publication #:
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Pub Dt:
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11/20/2014
| | | | |
Title:
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FABRICATING POLYSILICON MOS DEVICES AND PASSIVE ESD DEVICES
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|
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Patent #:
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Issue Dt:
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01/08/2019
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Application #:
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14452606
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Filing Dt:
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08/06/2014
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Publication #:
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Pub Dt:
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02/11/2016
| | | | |
Title:
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REPLACEMENT METAL GATE AND FABRICATION PROCESS WITH REDUCED LITHOGRAPHY STEPS
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|