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Reel/Frame:	054633/0001			Pages:	1245
		Recorded:	11/02/2020
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 8468
Page 61 of 85
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Patent #:	9913405	Issue Dt:	03/06/2018	Application #:	14668017	Filing Dt:	03/25/2015
Publication #:	US20160286686	Pub Dt:	09/29/2016
Title:	GLASS INTERPOSER WITH EMBEDDED THERMOELECTRIC DEVICES

Patent #:	9269589	Issue Dt:	02/23/2016	Application #:	14668018	Filing Dt:	03/25/2015
Publication #:	US20150200107	Pub Dt:	07/16/2015
Title:	DENSE FINFET SRAM

Patent #:	9585257	Issue Dt:	02/28/2017	Application #:	14668031	Filing Dt:	03/25/2015
Publication #:	US20160286660	Pub Dt:	09/29/2016
Title:	METHOD OF FORMING A GLASS INTERPOSER WITH THERMAL VIAS

Patent #:	9460969	Issue Dt:	10/04/2016	Application #:	14669055	Filing Dt:	03/26/2015
Publication #:	US20160284602	Pub Dt:	09/29/2016
Title:	MACRO TO MONITOR N-P BUMP

Patent #:	9496185	Issue Dt:	11/15/2016	Application #:	14670800	Filing Dt:	03/27/2015
Publication #:	US20160284607	Pub Dt:	09/29/2016
Title:	DUAL CHANNEL FINFET WITH RELAXED PFET REGION

Patent #:	10103070	Issue Dt:	10/16/2018	Application #:	14671265	Filing Dt:	03/27/2015
Publication #:	US20160284609	Pub Dt:	09/29/2016
Title:	DYNAMIC INTEGRATED CIRCUIT FABRICATION METHODS

Patent #:	9851398	Issue Dt:	12/26/2017	Application #:	14673185	Filing Dt:	03/30/2015
Publication #:	US20160291084	Pub Dt:	10/06/2016
Title:	VIA LEAKAGE AND BREAKDOWN TESTING

Patent #:	9425106	Issue Dt:	08/23/2016	Application #:	14674108	Filing Dt:	03/31/2015
Title:	METHODS OF PERFORMING FIN CUT ETCH PROCESSES FOR TAPER FINFET SEMICONDUCTOR DEVICES AND THE RESULTING DEVICES

Patent #:	9502286	Issue Dt:	11/22/2016	Application #:	14674460	Filing Dt:	03/31/2015
Publication #:	US20160163585	Pub Dt:	06/09/2016
Title:	METHODS OF FORMING SELF-ALIGNED CONTACT STRUCTURES ON SEMICONDUCTOR DEVICES AND THE RESULTING DEVICES

Patent #:	9437481	Issue Dt:	09/06/2016	Application #:	14674792	Filing Dt:	03/31/2015
Publication #:	US20160163584	Pub Dt:	06/09/2016
Title:	SELF-ALIGNED DOUBLE PATTERNING PROCESS FOR TWO DIMENSIONAL PATTERNS

Patent #:	9362181	Issue Dt:	06/07/2016	Application #:	14674924	Filing Dt:	03/31/2015
Publication #:	US20160163604	Pub Dt:	06/09/2016
Title:	METHODS OF FORMING DIFFUSION BREAKS ON INTEGRATED CIRCUIT PRODUCTS COMPRISED OF FINFET DEVICES AND THE RESULTING PRODUCTS

Patent #:	9579608	Issue Dt:	02/28/2017	Application #:	14675316	Filing Dt:	03/31/2015
Publication #:	US20150202575	Pub Dt:	07/23/2015
Title:	COMPOSITE MEMBRANES AND METHODS OF PREPARATION THEREOF

Patent #:	9443956	Issue Dt:	09/13/2016	Application #:	14675880	Filing Dt:	04/01/2015
Publication #:	US20160163816	Pub Dt:	06/09/2016
Title:	METHOD FOR FORMING AIR GAP STRUCTURE USING CARBON-CONTAINING SPACER

Patent #:	9449835	Issue Dt:	09/20/2016	Application #:	14676097	Filing Dt:	04/01/2015
Publication #:	US20160163555	Pub Dt:	06/09/2016
Title:	METHODS OF FORMING FEATURES HAVING DIFFERING PITCH SPACING AND CRITICAL DIMENSIONS

Patent #:	9406676	Issue Dt:	08/02/2016	Application #:	14676165	Filing Dt:	04/01/2015
Publication #:	US20160190130	Pub Dt:	06/30/2016
Title:	METHOD FOR FORMING SINGLE DIFFUSION BREAKS BETWEEN FINFET DEVICES AND THE RESULTING DEVICES

Patent #:	9406803	Issue Dt:	08/02/2016	Application #:	14676239	Filing Dt:	04/01/2015
Publication #:	US20160190323	Pub Dt:	06/30/2016
Title:	FINFET DEVICE INCLUDING A UNIFORM SILICON ALLOY FIN

Patent #:	9401408	Issue Dt:	07/26/2016	Application #:	14676608	Filing Dt:	04/01/2015
Publication #:	US20160190262	Pub Dt:	06/30/2016
Title:	CONFINED EARLY EPITAXY WITH LOCAL INTERCONNECT CAPABILITY

Patent #:	9741605	Issue Dt:	08/22/2017	Application #:	14676633	Filing Dt:	04/01/2015
Publication #:	US20160190003	Pub Dt:	06/30/2016
Title:	REDUCING DEFECTS AND IMPROVING RELIABILITY OF BEOL METAL FILL

Patent #:	9634123	Issue Dt:	04/25/2017	Application #:	14676909	Filing Dt:	04/02/2015
Publication #:	US20160163831	Pub Dt:	06/09/2016
Title:	FINFET DEVICE INCLUDING A DIELECTRICALLY ISOLATED SILICON ALLOY FIN

Patent #:	9231087	Issue Dt:	01/05/2016	Application #:	14677303	Filing Dt:	04/02/2015
Publication #:	US20150214344	Pub Dt:	07/30/2015
Title:	BIPOLAR JUNCTION TRANSISTORS WITH SELF-ALIGNED TERMINALS

Patent #:	9397203	Issue Dt:	07/19/2016	Application #:	14677460	Filing Dt:	04/02/2015
Publication #:	US20150214346	Pub Dt:	07/30/2015
Title:	LATERAL SILICON-ON-INSULATOR BIPOLAR JUNCTION TRANSISTOR PROCESS AND STRUCTURE

Patent #:	9536778	Issue Dt:	01/03/2017	Application #:	14679060	Filing Dt:	04/06/2015
Publication #:	US20160293478	Pub Dt:	10/06/2016
Title:	SELF-ALIGNED DOUBLE PATTERNING PROCESS FOR METAL ROUTING

Patent #:	9466717	Issue Dt:	10/11/2016	Application #:	14680172	Filing Dt:	04/07/2015
Publication #:	US20160300947	Pub Dt:	10/13/2016
Title:	COMPLEX SEMICONDUCTOR DEVICES OF THE SOI TYPE

Patent #:	9460806	Issue Dt:	10/04/2016	Application #:	14680228	Filing Dt:	04/07/2015
Publication #:	US20160163398	Pub Dt:	06/09/2016
Title:	METHOD FOR CREATING AN OTPROM ARRAY POSSESSING MULTI-BIT CAPACITY WITH TDDB STRESS RELIABILITY MECHANISM

Patent #:	9443940	Issue Dt:	09/13/2016	Application #:	14680328	Filing Dt:	04/07/2015
Title:	DEFECT REDUCTION WITH ROTATED DOUBLE ASPECT RATIO TRAPPING

Patent #:	9755841	Issue Dt:	09/05/2017	Application #:	14680961	Filing Dt:	04/07/2015
Publication #:	US20160301534	Pub Dt:	10/13/2016
Title:	METHOD, APPARATUS AND SYSTEM FOR SECURITY APPLICATION FOR INTEGRATED CIRCUIT DEVICES

Patent #:	9385527	Issue Dt:	07/05/2016	Application #:	14682910	Filing Dt:	04/09/2015
Publication #:	US20150214733	Pub Dt:	07/30/2015
Title:	ENHANCED CHARGE DEVICE MODEL CLAMP

Patent #:	9754068	Issue Dt:	09/05/2017	Application #:	14684782	Filing Dt:	04/13/2015
Publication #:	US20160162623	Pub Dt:	06/09/2016
Title:	METHOD, COMPUTER READABLE STORAGE MEDIUM AND COMPUTER SYSTEM FOR CREATING A LAYOUT OF A PHOTOMASK

Patent #:	9530689	Issue Dt:	12/27/2016	Application #:	14684949	Filing Dt:	04/13/2015
Publication #:	US20160300754	Pub Dt:	10/13/2016
Title:	METHODS FOR FABRICATING INTEGRATED CIRCUITS USING MULTI-PATTERNING PROCESSES

Patent #:	9461017	Issue Dt:	10/04/2016	Application #:	14685061	Filing Dt:	04/13/2015
Publication #:	US20160300814	Pub Dt:	10/13/2016
Title:	ELECTRONIC PACKAGE THAT INCLUDES A PLURALITY OF INTEGRATED CIRCUIT DEVICES BONDED IN A THREE-DIMENSIONAL STACK ARRANGEMENT

Patent #:	9651855	Issue Dt:	05/16/2017	Application #:	14685701	Filing Dt:	04/14/2015
Publication #:	US20160162624	Pub Dt:	06/09/2016
Title:	METHODS FOR OPTICAL PROXIMITY CORRECTION IN THE DESIGN AND FABRICATION OF INTEGRATED CIRCUITS USING EXTREME ULTRAVIOLET LITHOGRAPHY

Patent #:	9627508	Issue Dt:	04/18/2017	Application #:	14685944	Filing Dt:	04/14/2015
Publication #:	US20160308025	Pub Dt:	10/20/2016
Title:	REPLACEMENT CHANNEL TFET

Patent #:	9385122	Issue Dt:	07/05/2016	Application #:	14686260	Filing Dt:	04/14/2015
Publication #:	US20150221643	Pub Dt:	08/06/2015
Title:	METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING SOURCE/DRAIN EPITAXIAL OVERGROWTH FOR FORMING SELF-ALIGNED CONTACTS WITHOUT SPACER LOSS AND A SEMICONDUCTOR DEVICE FORMED BY SAME

Patent #:	9343300	Issue Dt:	05/17/2016	Application #:	14686857	Filing Dt:	04/15/2015
Title:	METHODS OF FORMING SOURCE/DRAIN REGIONS FOR A PMOS TRANSISTOR DEVICE WITH A GERMANIUM-CONTAINING CHANNEL REGION

Patent #:	9728838	Issue Dt:	08/08/2017	Application #:	14687002	Filing Dt:	04/15/2015
Publication #:	US20160308270	Pub Dt:	10/20/2016
Title:	ON CHIP ANTENNA WITH OPENING

Patent #:	9299765	Issue Dt:	03/29/2016	Application #:	14687049	Filing Dt:	04/15/2015
Publication #:	US20150221717	Pub Dt:	08/06/2015
Title:	ALTERING CAPACITANCE OF MIM CAPACITOR HAVING REACTIVE LAYER THEREIN

Patent #:	9236309	Issue Dt:	01/12/2016	Application #:	14687300	Filing Dt:	04/15/2015
Publication #:	US20150340289	Pub Dt:	11/26/2015
Title:	METHODS OF FABRICATING SEMICONDUCTOR FIN STRUCTURES

Patent #:	9377543	Issue Dt:	06/28/2016	Application #:	14687489	Filing Dt:	04/15/2015
Publication #:	US20150295119	Pub Dt:	10/15/2015
Title:	CHARGE SENSORS USING INVERTED LATERAL BIPOLAR JUNCTION TRANSISTORS

Patent #:	10234500	Issue Dt:	03/19/2019	Application #:	14689088	Filing Dt:	04/17/2015
Publication #:	US20160306009	Pub Dt:	10/20/2016
Title:	SYSTEMATIC DEFECTS INSPECTION METHOD WITH COMBINED EBEAM INSPECTION AND NET TRACING CLASSIFICATION

Patent #:	9536974	Issue Dt:	01/03/2017	Application #:	14689181	Filing Dt:	04/17/2015
Publication #:	US20160308017	Pub Dt:	10/20/2016
Title:	FET DEVICE WITH TUNED GATE WORK FUNCTION

Patent #:	9543215	Issue Dt:	01/10/2017	Application #:	14691233	Filing Dt:	04/20/2015
Publication #:	US20160307807	Pub Dt:	10/20/2016
Title:	PUNCH-THROUGH-STOP AFTER PARTIAL FIN ETCH

Patent #:	9666674	Issue Dt:	05/30/2017	Application #:	14691270	Filing Dt:	04/20/2015
Publication #:	US20150228728	Pub Dt:	08/13/2015
Title:	FORMATION OF LARGE SCALE SINGLE CRYSTALLINE GRAPHENE

Patent #:	9506874	Issue Dt:	11/29/2016	Application #:	14691392	Filing Dt:	04/20/2015
Publication #:	US20150226681	Pub Dt:	08/13/2015
Title:	INFRARED-BASED METROLOGY FOR DETECTION OF STRESS AND DEFECTS AROUND THROUGH SILICON VIAS

Patent #:	9755013	Issue Dt:	09/05/2017	Application #:	14692881	Filing Dt:	04/22/2015
Publication #:	US20160315138	Pub Dt:	10/27/2016
Title:	HIGH DENSITY CAPACITOR STRUCTURE AND METHOD

Patent #:	9362310	Issue Dt:	06/07/2016	Application #:	14694243	Filing Dt:	04/23/2015
Publication #:	US20150228671	Pub Dt:	08/13/2015
Title:	METHOD OF MANUFACTURING A FINFET DEVICE USING A SACRIFICIAL EPITAXY REGION FOR IMPROVED FIN MERGE AND FINFET DEVICE FORMED BY SAME

Patent #:	9547125	Issue Dt:	01/17/2017	Application #:	14694265	Filing Dt:	04/23/2015
Publication #:	US20150268417	Pub Dt:	09/24/2015
Title:	BURIED WAVEGUIDE PHOTODETECTOR

Patent #:	9225355	Issue Dt:	12/29/2015	Application #:	14694831	Filing Dt:	04/23/2015
Publication #:	US20150229326	Pub Dt:	08/13/2015
Title:	BOOSTING DECOMPRESSION IN THE PRESENCE OF REOCCURRING HUFFMAN TREES

Patent #:	9553030	Issue Dt:	01/24/2017	Application #:	14695232	Filing Dt:	04/24/2015
Publication #:	US20160315016	Pub Dt:	10/27/2016
Title:	METHOD OF MANUFACTURING P-CHANNEL FET DEVICE WITH SIGE CHANNEL

Patent #:	10032910	Issue Dt:	07/24/2018	Application #:	14695411	Filing Dt:	04/24/2015
Publication #:	US20160315172	Pub Dt:	10/27/2016
Title:	FINFET DEVICES HAVING ASYMMETRICAL EPITAXIALLY-GROWN SOURCE AND DRAIN REGIONS AND METHODS OF FORMING THE SAME

Patent #:	9287213	Issue Dt:	03/15/2016	Application #:	14695965	Filing Dt:	04/24/2015
Publication #:	US20150235957	Pub Dt:	08/20/2015
Title:	INTEGRATED CIRCUITS WITH IMPROVED CONTACT STRUCTURES

Patent #:	9389363	Issue Dt:	07/12/2016	Application #:	14696034	Filing Dt:	04/24/2015
Publication #:	US20150226917	Pub Dt:	08/13/2015
Title:	DOUBLE MIRROR STRUCTURE FOR WAVELENGTH DIVISION MULTIPLEXING WITH POLYMER WAVEGUIDES

Patent #:	9406570	Issue Dt:	08/02/2016	Application #:	14696534	Filing Dt:	04/27/2015
Publication #:	US20150228672	Pub Dt:	08/13/2015
Title:	FINFET DEVICE

Patent #:	9484359	Issue Dt:	11/01/2016	Application #:	14696736	Filing Dt:	04/27/2015
Publication #:	US20150263041	Pub Dt:	09/17/2015
Title:	MOSFET WITH WORK FUNCTION ADJUSTED METAL BACKGATE

Patent #:	9470846	Issue Dt:	10/18/2016	Application #:	14696843	Filing Dt:	04/27/2015
Publication #:	US20150226921	Pub Dt:	08/13/2015
Title:	WAVELENGTH DIVISION MULTIPLEXING WITH MULTI-CORE FIBER

Patent #:	9391080	Issue Dt:	07/12/2016	Application #:	14698066	Filing Dt:	04/28/2015
Title:	MEMORY BIT CELL FOR REDUCED LAYOUT AREA

Patent #:	9472640	Issue Dt:	10/18/2016	Application #:	14698206	Filing Dt:	04/28/2015
Publication #:	US20150228753	Pub Dt:	08/13/2015
Title:	SELF ALIGNED EMBEDDED GATE CARBON TRANSISTORS

Patent #:	9431388	Issue Dt:	08/30/2016	Application #:	14699034	Filing Dt:	04/29/2015
Title:	SERIES-CONNECTED NANOWIRE STRUCTURES

Patent #:	9831236	Issue Dt:	11/28/2017	Application #:	14699134	Filing Dt:	04/29/2015
Publication #:	US20160322345	Pub Dt:	11/03/2016
Title:	ELECTROSTATIC DISCHARGE (ESD) PROTECTION TRANSISTOR DEVICES AND INTEGRATED CIRCUITS WITH ELECTROSTATIC DISCHARGE PROTECTION TRANSISTOR DEVICES

Patent #:	9484438	Issue Dt:	11/01/2016	Application #:	14699427	Filing Dt:	04/29/2015
Publication #:	US20150236135	Pub Dt:	08/20/2015
Title:	METHOD TO IMPROVE RELIABILITY OF REPLACEMENT GATE DEVICE

Patent #:	9236481	Issue Dt:	01/12/2016	Application #:	14699543	Filing Dt:	04/29/2015
Title:	SEMICONDUCTOR DEVICE AND METHODS OF FORMING FINS AND GATES WITH ULTRAVIOLET CURING

Patent #:	9466692	Issue Dt:	10/11/2016	Application #:	14699746	Filing Dt:	04/29/2015
Publication #:	US20150243761	Pub Dt:	08/27/2015
Title:	METHOD TO IMPROVE RELIABILITY OF REPLACEMENT GATE DEVICE

Patent #:	9337837	Issue Dt:	05/10/2016	Application #:	14699920	Filing Dt:	04/29/2015
Publication #:	US20150236693	Pub Dt:	08/20/2015
Title:	PHYSICAL UNCLONABLE FUNCTION GENERATION AND MANAGEMENT

Patent #:	9971713	Issue Dt:	05/15/2018	Application #:	14701371	Filing Dt:	04/30/2015
Publication #:	US20160011996	Pub Dt:	01/14/2016
Title:	MULTI-PETASCALE HIGHLY EFFICIENT PARALLEL SUPERCOMPUTER

Patent #:	9240355	Issue Dt:	01/19/2016	Application #:	14705397	Filing Dt:	05/06/2015
Publication #:	US20150235908	Pub Dt:	08/20/2015
Title:	ON-CHIP DIODE WITH FULLY DEPLETED SEMICONDUTOR DEVICES

Patent #:	9236251	Issue Dt:	01/12/2016	Application #:	14705425	Filing Dt:	05/06/2015
Publication #:	US20150235838	Pub Dt:	08/20/2015
Title:	HETEROGENEOUS INTEGRATION OF GROUP III NITRIDE ON SILICON FOR ADVANCED INTEGRATED CIRCUITS

Patent #:	9236479	Issue Dt:	01/12/2016	Application #:	14708405	Filing Dt:	05/11/2015
Publication #:	US20150249152	Pub Dt:	09/03/2015
Title:	METHODS OF FORMING REPLACEMENT GATE STRUCTURES AND FINS ON FINFET DEVICES AND THE RESULTING DEVICES

Patent #:	9449881	Issue Dt:	09/20/2016	Application #:	14710053	Filing Dt:	05/12/2015
Title:	METHODS OF FORMING FINS FOR FINFET SEMICONDUCTOR DEVICES AND THE RESULTING DEVICES

Patent #:	NONE	Issue Dt:		Application #:	14710204	Filing Dt:	05/12/2015
Publication #:	US20150243888	Pub Dt:	08/27/2015
Title:	RESISTIVE RANDOM ACCESS MEMORY DEVICES WITH EXTREMELY REACTIVE CONTACTS

Patent #:	9490168	Issue Dt:	11/08/2016	Application #:	14710894	Filing Dt:	05/13/2015
Publication #:	US20160336225	Pub Dt:	11/17/2016
Title:	VIA FORMATION USING SIDEWALL IMAGE TRANSFER PROCESS TO DEFINE LATERAL DIMENSION

Patent #:	9236482	Issue Dt:	01/12/2016	Application #:	14711029	Filing Dt:	05/13/2015
Publication #:	US20150243789	Pub Dt:	08/27/2015
Title:	SEMICONDUCTOR DEVICE WITH FIELD-INDUCING STRUCTURE

Patent #:	9217923	Issue Dt:	12/22/2015	Application #:	14711377	Filing Dt:	05/13/2015
Publication #:	US20150248059	Pub Dt:	09/03/2015
Title:	METHOD OF USING AN EUV MASK DURING EUV PHOTOLITHOGRAPHY PROCESSES

Patent #:	9786835	Issue Dt:	10/10/2017	Application #:	14712092	Filing Dt:	05/14/2015
Publication #:	US20150243879	Pub Dt:	08/27/2015
Title:	BACKSIDE INTEGRATION OF RF FILTERS FOR RF FRONT END MODULES AND DESIGN STRUCTURE

Patent #:	9490317	Issue Dt:	11/08/2016	Application #:	14712388	Filing Dt:	05/14/2015
Publication #:	US20160336399	Pub Dt:	11/17/2016
Title:	GATE CONTACT STRUCTURE HAVING GATE CONTACT LAYER

Patent #:	9727685	Issue Dt:	08/08/2017	Application #:	14712830	Filing Dt:	05/14/2015
Publication #:	US20160335389	Pub Dt:	11/17/2016
Title:	METHOD, APPARATUS, AND SYSTEM FOR IMPROVED STANDARD CELL DESIGN AND ROUTING FOR IMPROVING STANDARD CELL ROUTABILITY

Patent #:	9548356	Issue Dt:	01/17/2017	Application #:	14714779	Filing Dt:	05/18/2015
Publication #:	US20150255538	Pub Dt:	09/10/2015
Title:	SHALLOW TRENCH ISOLATION STRUCTURES

Patent #:	9639650	Issue Dt:	05/02/2017	Application #:	14716565	Filing Dt:	05/19/2015
Publication #:	US20160342726	Pub Dt:	11/24/2016
Title:	METHOD, APPARATUS, AND SYSTEM FOR OFFSET METAL POWER RAIL FOR CELL DESIGN

Patent #:	9548357	Issue Dt:	01/17/2017	Application #:	14716696	Filing Dt:	05/19/2015
Publication #:	US20160020275	Pub Dt:	01/21/2016
Title:	SHALLOW TRENCH ISOLATION STRUCTURE WITH SIGMA CAVITY

Patent #:	10020383	Issue Dt:	07/10/2018	Application #:	14716938	Filing Dt:	05/20/2015
Publication #:	US20160343607	Pub Dt:	11/24/2016
Title:	PRESERVING THE SEED LAYER ON STI EDGE AND IMPROVING THE EPITAXIAL GROWTH

Patent #:	9472607	Issue Dt:	10/18/2016	Application #:	14717344	Filing Dt:	05/20/2015
Publication #:	US20150270326	Pub Dt:	09/24/2015
Title:	ACTIVE MATRIX USING HYBRID INTEGRATED CIRCUIT AND BIPOLAR TRANSISTOR

Patent #:	9236298	Issue Dt:	01/12/2016	Application #:	14717387	Filing Dt:	05/20/2015
Publication #:	US20150255337	Pub Dt:	09/10/2015
Title:	METHODS FOR FABRICATION INTERCONNECT STRUCTURES WITH FUNCTIONAL COMPONENTS AND ELECTRICAL CONDUCTIVE CONTACT STRUCTURES ON A SAME LEVEL

Patent #:	9786574	Issue Dt:	10/10/2017	Application #:	14718314	Filing Dt:	05/21/2015
Publication #:	US20160343633	Pub Dt:	11/24/2016
Title:	THIN FILM BASED FAN OUT AND MULTI DIE PACKAGE PLATFORM

Patent #:	9306956	Issue Dt:	04/05/2016	Application #:	14718331	Filing Dt:	05/21/2015
Publication #:	US20150256548	Pub Dt:	09/10/2015
Title:	FILE SYSTEM LEVEL DATA PROTECTION DURING POTENTIAL SECURITY BREACH

Patent #:	9553046	Issue Dt:	01/24/2017	Application #:	14718502	Filing Dt:	05/21/2015
Publication #:	US20160343659	Pub Dt:	11/24/2016
Title:	E-FUSE IN SOI CONFIGURATION

Patent #:	9490007	Issue Dt:	11/08/2016	Application #:	14718574	Filing Dt:	05/21/2015
Publication #:	US20160343428	Pub Dt:	11/24/2016
Title:	DEVICE COMPRISING A PLURALITY OF FDSOI STATIC RANDOM-ACCESS MEMORY BITCELLS AND METHOD OF OPERATION THEREOF

Patent #:	10134577	Issue Dt:	11/20/2018	Application #:	14718747	Filing Dt:	05/21/2015
Publication #:	US20160343564	Pub Dt:	11/24/2016
Title:	EDGE TRIM PROCESSES AND RESULTANT STRUCTURES

Patent #:	9514995	Issue Dt:	12/06/2016	Application #:	14718760	Filing Dt:	05/21/2015
Publication #:	US20160343623	Pub Dt:	11/24/2016
Title:	IMPLANT-FREE PUNCH THROUGH DOPING LAYER FORMATION FOR BULK FINFET STRUCTURES

Patent #:	9613181	Issue Dt:	04/04/2017	Application #:	14719424	Filing Dt:	05/22/2015
Publication #:	US20150349120	Pub Dt:	12/03/2015
Title:	SEMICONDUCTOR DEVICE STRUCTURE INCLUDING ACTIVE REGION HAVING AN EXTENSION PORTION

Patent #:	10062618	Issue Dt:	08/28/2018	Application #:	14721402	Filing Dt:	05/26/2015
Publication #:	US20160351453	Pub Dt:	12/01/2016
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Title:	DEFECT DETECTION PROCESS IN A SEMICONDUCTOR MANUFACTURING ENVIRONMENT

Patent #:	9397003	Issue Dt:	07/19/2016	Application #:	14722818	Filing Dt:	05/27/2015
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Title:	FINFET SEMICONDUCTOR DEVICE HAVING INCREASED GATE HEIGHT CONTROL

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Title:	VACUUM TRAP

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Title:	REPLACEMENT GATE STRUCTURE WITH LOW-K SIDEWALL SPACER FOR SEMICONDUCTOR DEVICES

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Title:	SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CONTACT ELEMENTS

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Title:	HETEROJUNCTION BIPOLAR TRANSISTORS WITH INTRINSIC INTERLAYERS

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Title:	HYBRID FIN CUTTING PROCESSES FOR FINFET SEMICONDUCTOR DEVICES

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Title:	MERGED SOURCE DRAIN EPITAXY

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Title:	DESIGN OF TEMPERATURE-COMPLIANT INTEGRATED CIRCUITS

100

Patent #:	9576894	Issue Dt:	02/21/2017	Application #:	14729188	Filing Dt:	06/03/2015
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Title:	INTEGRATED CIRCUITS INCLUDING ORGANIC INTERLAYER DIELECTRIC LAYERS AND METHODS FOR FABRICATING THE SAME

Assignor

GLOBALFOUNDRIES INC.

Exec Dt:

10/22/2020

Assignee

GLOBALFOUNDRIES U.S. INC.

2600 GREAT AMERICA WAY

SANTA CLARA, CALIFORNIA 95054

Correspondence name and address
	GLOBALFOUNDRIES SINGAPORE PTE. LTD.
	60 WOODLANDS INDUSTRIAL PARK D STREET 2,
	SINGAPORE, 738406 SINGAPORE

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