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Reel/Frame:	054636/0001			Pages:	911
		Recorded:	11/20/2020
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 14520
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Patent #:	9257516	Issue Dt:	02/09/2016	Application #:	14505582	Filing Dt:	10/03/2014
Publication #:	US20150048446	Pub Dt:	02/19/2015
Title:	REDUCTION OF OXIDE RECESSES FOR GATE HEIGHT CONTROL

Patent #:	9418234	Issue Dt:	08/16/2016	Application #:	14505734	Filing Dt:	10/03/2014
Publication #:	US20150106952	Pub Dt:	04/16/2015
Title:	PROVIDING ISOLATED ENTROPY ELEMENTS

Patent #:	9582388	Issue Dt:	02/28/2017	Application #:	14506331	Filing Dt:	10/03/2014
Publication #:	US20160098332	Pub Dt:	04/07/2016
Title:	DYNAMIC MULTI-PURPOSE EXTERNAL ACCESS POINTS CONNECTED TO CORE INTERFACES WITHIN A SYSTEM ON CHIP (SOC)

Patent #:	9269435	Issue Dt:	02/23/2016	Application #:	14507144	Filing Dt:	10/06/2014
Publication #:	US20150023094	Pub Dt:	01/22/2015
Title:	DRIFT MITIGATION FOR MULTI-BITS PHASE CHANGE MEMORY

Patent #:	9524244	Issue Dt:	12/20/2016	Application #:	14507234	Filing Dt:	10/06/2014
Publication #:	US20150121008	Pub Dt:	04/30/2015
Title:	WRITE CACHE DESTAGING

Patent #:	9478602	Issue Dt:	10/25/2016	Application #:	14507927	Filing Dt:	10/07/2014
Publication #:	US20160099302	Pub Dt:	04/07/2016
Title:	METHOD OF FORMING AN EMBEDDED METAL-INSULATOR-METAL (MIM) CAPACITOR

Patent #:	9076810	Issue Dt:	07/07/2015	Application #:	14508011	Filing Dt:	10/07/2014
Publication #:	US20150024570	Pub Dt:	01/22/2015
Title:	SCALING OF BIPOLAR TRANSISTORS

Patent #:	9059173	Issue Dt:	06/16/2015	Application #:	14508471	Filing Dt:	10/07/2014
Publication #:	US20150021736	Pub Dt:	01/22/2015
Title:	ELECTRONIC FUSE LINE WITH MODIFIED CAP

Patent #:	9224797	Issue Dt:	12/29/2015	Application #:	14508644	Filing Dt:	10/07/2014
Publication #:	US20150021737	Pub Dt:	01/22/2015
Title:	METAL-INSULATOR-METAL (MIM) CAPACITOR WITH DEEP TRENCH (DT) STRUCTURE AND METHOD IN A SILICON-ON-INSULATOR (SOI)

Patent #:	9595943	Issue Dt:	03/14/2017	Application #:	14509242	Filing Dt:	10/08/2014
Publication #:	US20160105161	Pub Dt:	04/14/2016
Title:	IMPLEMENTING BROADBAND RESONATOR FOR RESONANT CLOCK DISTRIBUTION

Patent #:	9373697	Issue Dt:	06/21/2016	Application #:	14509392	Filing Dt:	10/08/2014
Publication #:	US20150024568	Pub Dt:	01/22/2015
Title:	SPACER REPLACEMENT FOR REPLACEMENT METAL GATE SEMICONDUCTOR DEVICES

Patent #:	9140669	Issue Dt:	09/22/2015	Application #:	14510309	Filing Dt:	10/09/2014
Publication #:	US20150021605	Pub Dt:	01/22/2015
Title:	MAPPING DENSITY AND TEMPERATURE OF A CHIP, IN SITU

Patent #:	9230929	Issue Dt:	01/05/2016	Application #:	14511259	Filing Dt:	10/10/2014
Publication #:	US20150021793	Pub Dt:	01/22/2015
Title:	SEMICONDUCTOR STRUCTURES AND METHODS OF MANUFACTURE

Patent #:	9263446	Issue Dt:	02/16/2016	Application #:	14511286	Filing Dt:	10/10/2014
Title:	METHODS OF FORMING REPLACEMENT GATE STRUCTURES ON TRANSISTOR DEVICES WITH A SHARED GATE STRUCTURE AND THE RESULTING PRODUCTS

Patent #:	9431539	Issue Dt:	08/30/2016	Application #:	14511715	Filing Dt:	10/10/2014
Publication #:	US20160104799	Pub Dt:	04/14/2016
Title:	DUAL-STRAINED NANOWIRE AND FINFET DEVICES WITH DIELECTRIC ISOLATION

Patent #:	9466661	Issue Dt:	10/11/2016	Application #:	14511746	Filing Dt:	10/10/2014
Publication #:	US20160104762	Pub Dt:	04/14/2016
Title:	METHOD OF FABRICATING A MIM CAPACITOR WITH MINIMAL VOLTAGE COEFFICIENT AND A DECOUPLING MIM CAPACITOR AND ANALOG/RF MIM CAPACITOR ON THE SAME CHIP WITH HIGH-K DIELECTRICS

Patent #:	9601578	Issue Dt:	03/21/2017	Application #:	14511769	Filing Dt:	10/10/2014
Publication #:	US20160104774	Pub Dt:	04/14/2016
Title:	NON-PLANAR VERTICAL DUAL SOURCE DRIFT METAL-OXIDE SEMICONDUCTOR (VDSMOS)

Patent #:	9099380	Issue Dt:	08/04/2015	Application #:	14511811	Filing Dt:	10/10/2014
Publication #:	US20150053981	Pub Dt:	02/26/2015
Title:	METHOD OF FORMING STEP DOPING CHANNEL PROFILE FOR SUPER STEEP RETROGRADE WELL FIELD EFFECT TRANSISTOR AND RESULTING DEVICE

Patent #:	9473141	Issue Dt:	10/18/2016	Application #:	14512626	Filing Dt:	10/13/2014
Publication #:	US20160105180	Pub Dt:	04/14/2016
Title:	RECEIVING AN I/O SIGNAL IN MULTIPLE VOLTAGE DOMAINS

Patent #:	9502302	Issue Dt:	11/22/2016	Application #:	14512700	Filing Dt:	10/13/2014
Publication #:	US20160104644	Pub Dt:	04/14/2016
Title:	PROCESS FOR INTEGRATED CIRCUIT FABRICATION INCLUDING A UNIFORM DEPTH TUNGSTEN RECESS TECHNIQUE

Patent #:	9620453	Issue Dt:	04/11/2017	Application #:	14512850	Filing Dt:	10/13/2014
Publication #:	US20160104638	Pub Dt:	04/14/2016
Title:	SEMICONDUCTOR STRUCTURE INCLUDING A LAYER OF A FIRST METAL BETWEEN A DIFFUSION BARRIER LAYER AND A SECOND METAL AND METHOD FOR THE FORMATION THEREOF

Patent #:	9236398	Issue Dt:	01/12/2016	Application #:	14513709	Filing Dt:	10/14/2014
Publication #:	US20150054027	Pub Dt:	02/26/2015
Title:	PASSIVE DEVICES FOR FINFET INTEGRATED CIRCUIT TECHNOLOGIES

Patent #:	9418995	Issue Dt:	08/16/2016	Application #:	14513725	Filing Dt:	10/14/2014
Publication #:	US20160104707	Pub Dt:	04/14/2016
Title:	METHOD AND STRUCTURE FOR TRANSISTORS USING GATE STACK DOPANTS WITH MINIMAL NITROGEN PENETRATION

Patent #:	9147653	Issue Dt:	09/29/2015	Application #:	14513834	Filing Dt:	10/14/2014
Publication #:	US20150028489	Pub Dt:	01/29/2015
Title:	METHOD FOR OFF-GRID ROUTING STRUCTURES UTILIZING SELF ALIGNED DOUBLE PATTERNING (SADP) TECHNOLOGY

Patent #:	9916903	Issue Dt:	03/13/2018	Application #:	14514289	Filing Dt:	10/14/2014
Publication #:	US20160104541	Pub Dt:	04/14/2016
Title:	NOVEL OTPROM FOR POST-PROCESS PROGRAMMING USING SELECTIVE BREAKDOWN

Patent #:	9466676	Issue Dt:	10/11/2016	Application #:	14514422	Filing Dt:	10/15/2014
Publication #:	US20150056796	Pub Dt:	02/26/2015
Title:	METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A METAL GATE RECESS

Patent #:	9437524	Issue Dt:	09/06/2016	Application #:	14514425	Filing Dt:	10/15/2014
Publication #:	US20150054139	Pub Dt:	02/26/2015
Title:	THROUGH-SILICON VIA WITH SIDEWALL AIR GAP

Patent #:	9294329	Issue Dt:	03/22/2016	Application #:	14514592	Filing Dt:	10/15/2014
Publication #:	US20150110218	Pub Dt:	04/23/2015
Title:	EMPHASIZED SIGNAL POINT ARRANGEMENT OPERATION FOR COMPENSATING DC IMBALANCE

Patent #:	9252080	Issue Dt:	02/02/2016	Application #:	14514640	Filing Dt:	10/15/2014
Title:	DIELECTRIC COVER FOR A THROUGH SILICON VIA

Patent #:	9312274	Issue Dt:	04/12/2016	Application #:	14514900	Filing Dt:	10/15/2014
Publication #:	US20160111447	Pub Dt:	04/21/2016
Title:	MERGED FIN STRUCTURES FOR FINFET DEVICES

Patent #:	9104834	Issue Dt:	08/11/2015	Application #:	14514919	Filing Dt:	10/15/2014
Publication #:	US20150033199	Pub Dt:	01/29/2015
Title:	SYSTEMS AND METHODS FOR SINGLE CELL PRODUCT PATH DELAY ANALYSIS

Patent #:	9276088	Issue Dt:	03/01/2016	Application #:	14515070	Filing Dt:	10/15/2014
Title:	METHOD FOR MAKING HIGH VOLTAGE INTEGRATED CIRCUIT DEVICES IN A FIN-TYPE PROCESS AND RESULTING DEVICES

Patent #:	9379027	Issue Dt:	06/28/2016	Application #:	14515140	Filing Dt:	10/15/2014
Publication #:	US20160111341	Pub Dt:	04/21/2016
Title:	METHOD OF UTILIZING TRENCH SILICIDE IN A GATE CROSS-COUPLE CONSTRUCT

Patent #:	9245854	Issue Dt:	01/26/2016	Application #:	14515597	Filing Dt:	10/16/2014
Publication #:	US20150033554	Pub Dt:	02/05/2015
Title:	ORGANIC MODULE EMI SHIELDING STRUCTURES AND METHODS

Patent #:	9373535	Issue Dt:	06/21/2016	Application #:	14515628	Filing Dt:	10/16/2014
Publication #:	US20160111320	Pub Dt:	04/21/2016
Title:	T-SHAPED FIN ISOLATION REGION AND METHODS OF FABRICATION

Patent #:	10173889	Issue Dt:	01/08/2019	Application #:	14515681	Filing Dt:	10/16/2014
Publication #:	US20150041932	Pub Dt:	02/12/2015
Title:	PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES

Patent #:	9406608	Issue Dt:	08/02/2016	Application #:	14515836	Filing Dt:	10/16/2014
Publication #:	US20160111360	Pub Dt:	04/21/2016
Title:	DUMMY METAL STRUCTURE AND METHOD OF FORMING DUMMY METAL STRUCTURE

Patent #:	9536848	Issue Dt:	01/03/2017	Application #:	14515969	Filing Dt:	10/16/2014
Publication #:	US20160111386	Pub Dt:	04/21/2016
Title:	BOND PAD STRUCTURE FOR LOW TEMPERATURE FLIP CHIP BONDING

Patent #:	9431535	Issue Dt:	08/30/2016	Application #:	14515981	Filing Dt:	10/16/2014
Publication #:	US20150054028	Pub Dt:	02/26/2015
Title:	SEMICONDUCTOR DEVICES HAVING TENSILE AND/OR COMPRESSIVE STRESS AND METHODS OF MANUFACTURING

Patent #:	9455232	Issue Dt:	09/27/2016	Application #:	14515986	Filing Dt:	10/16/2014
Publication #:	US20160111381	Pub Dt:	04/21/2016
Title:	SEMICONDUCTOR STRUCTURE INCLUDING A DIE SEAL LEAKAGE DETECTION MATERIAL, METHOD FOR THE FORMATION THEREOF AND METHOD INCLUDING A TEST OF A SEMICONDUCTOR STRUCTURE

Patent #:	9276111	Issue Dt:	03/01/2016	Application #:	14516000	Filing Dt:	10/16/2014
Publication #:	US20150037957	Pub Dt:	02/05/2015
Title:	SEMICONDUCTOR DEVICES HAVING TENSILE AND/OR COMPRESSIVE STRESS AND METHODS OF MANUFACTURING

Patent #:	9397174	Issue Dt:	07/19/2016	Application #:	14516623	Filing Dt:	10/17/2014
Publication #:	US20150035076	Pub Dt:	02/05/2015
Title:	Self-Aligned Gate Electrode Diffusion Barriers

Patent #:	9431303	Issue Dt:	08/30/2016	Application #:	14516674	Filing Dt:	10/17/2014
Publication #:	US20160111339	Pub Dt:	04/21/2016
Title:	CONTACT LINERS FOR INTEGRATED CIRCUITS AND FABRICATION METHODS THEREOF

Patent #:	10290637	Issue Dt:	05/14/2019	Application #:	14516744	Filing Dt:	10/17/2014
Publication #:	US20150037947	Pub Dt:	02/05/2015
Title:	WRAP-AROUND FIN FOR CONTACTING A CAPACITOR STRAP OF A DRAM

Patent #:	9355308	Issue Dt:	05/31/2016	Application #:	14516776	Filing Dt:	10/17/2014
Publication #:	US20150036882	Pub Dt:	02/05/2015
Title:	AUDITING VIDEO ANALYTICS THROUGH ESSENCE GENERATION

Patent #:	9576880	Issue Dt:	02/21/2017	Application #:	14517131	Filing Dt:	10/17/2014
Publication #:	US20150035155	Pub Dt:	02/05/2015
Title:	DUAL DAMASCENE STRUCTURE WITH LINER

Patent #:	9086810	Issue Dt:	07/21/2015	Application #:	14517162	Filing Dt:	10/17/2014
Publication #:	US20150116859	Pub Dt:	04/30/2015
Title:	WRITING AND READING DATA HAVING MULTIPLE ACCESS PATTERNS ON TAPE MEDIA

Patent #:	9436789	Issue Dt:	09/06/2016	Application #:	14517292	Filing Dt:	10/17/2014
Publication #:	US20150040084	Pub Dt:	02/05/2015
Title:	STRUCTURE, METHOD AND SYSTEM FOR COMPLEMENTARY STRAIN FILL FOR INTEGRATED CIRCUIT CHIPS

Patent #:	9153534	Issue Dt:	10/06/2015	Application #:	14517407	Filing Dt:	10/17/2014
Publication #:	US20150034953	Pub Dt:	02/05/2015
Title:	SEMICONDUCTOR FUSE WITH ENHANCED POST-PROGRAMMING RESISTANCE

Patent #:	10181713	Issue Dt:	01/15/2019	Application #:	14517605	Filing Dt:	10/17/2014
Publication #:	US20160111867	Pub Dt:	04/21/2016
Title:	METHODS OF POST-PROCESS DISPENSATION OF PLASMA INDUCED DAMAGE PROTECTION COMPONENT

Patent #:	9293476	Issue Dt:	03/22/2016	Application #:	14518023	Filing Dt:	10/20/2014
Publication #:	US20150102359	Pub Dt:	04/16/2015
Title:	INTEGRATING ACTIVE MATRIX INORGANIC LIGHT EMITTING DIODES FOR DISPLAY DEVICES

Patent #:	9547741	Issue Dt:	01/17/2017	Application #:	14518939	Filing Dt:	10/20/2014
Publication #:	US20160110489	Pub Dt:	04/21/2016
Title:	METHODS, APPARATUS, AND SYSTEM FOR USING FILLER CELLS IN DESIGN OF INTEGRATED CIRCUIT DEVICES

Patent #:	9812336	Issue Dt:	11/07/2017	Application #:	14519215	Filing Dt:	10/21/2014
Publication #:	US20150115371	Pub Dt:	04/30/2015
Title:	FINFET SEMICONDUCTOR STRUCTURES AND METHODS OF FABRICATING SAME

Patent #:	9299665	Issue Dt:	03/29/2016	Application #:	14519235	Filing Dt:	10/21/2014
Publication #:	US20150171023	Pub Dt:	06/18/2015
Title:	FORMATION OF ALPHA PARTICLE SHIELDS IN CHIP PACKAGING

Patent #:	9362239	Issue Dt:	06/07/2016	Application #:	14519291	Filing Dt:	10/21/2014
Publication #:	US20160111382	Pub Dt:	04/21/2016
Title:	VERTICAL BREAKDOWN PROTECTION LAYER

Patent #:	9406569	Issue Dt:	08/02/2016	Application #:	14519493	Filing Dt:	10/21/2014
Publication #:	US20150056760	Pub Dt:	02/26/2015
Title:	SEMICONDUCTOR DEVICE HAVING DIFFUSION BARRIER TO REDUCE BACK CHANNEL LEAKAGE

Patent #:	9640552	Issue Dt:	05/02/2017	Application #:	14519596	Filing Dt:	10/21/2014
Publication #:	US20150287809	Pub Dt:	10/08/2015
Title:	MULTI-HEIGHT FIN FIELD EFFECT TRANSISTORS

Patent #:	9450072	Issue Dt:	09/20/2016	Application #:	14519615	Filing Dt:	10/21/2014
Publication #:	US20150372109	Pub Dt:	12/24/2015
Title:	REPLACEMENT GATE STRUCTURE FOR ENHANCING CONDUCTIVITY

Patent #:	9048217	Issue Dt:	06/02/2015	Application #:	14519622	Filing Dt:	10/21/2014
Publication #:	US20150035026	Pub Dt:	02/05/2015
Title:	MIDDLE-OF-LINE BORDERLESS CONTACT STRUCTURE AND METHOD OF FORMING

Patent #:	9236863	Issue Dt:	01/12/2016	Application #:	14519630	Filing Dt:	10/21/2014
Publication #:	US20150035559	Pub Dt:	02/05/2015
Title:	COMPENSATED IMPEDANCE CALIBRATION CIRCUIT

Patent #:	9406799	Issue Dt:	08/02/2016	Application #:	14519709	Filing Dt:	10/21/2014
Publication #:	US20160111539	Pub Dt:	04/21/2016
Title:	HIGH MOBILITY PMOS AND NMOS DEVICES HAVING Si-Ge QUANTUM WELLS

Patent #:	8987816	Issue Dt:	03/24/2015	Application #:	14519902	Filing Dt:	10/21/2014
Publication #:	US20150035052	Pub Dt:	02/05/2015
Title:	CONTACT POWER RAIL

Patent #:	10459031	Issue Dt:	10/29/2019	Application #:	14520115	Filing Dt:	10/21/2014
Publication #:	US20150113346	Pub Dt:	04/23/2015
Title:	ELECTRONIC CIRCUIT HAVING SERIAL LATCH SCAN CHAINS

Patent #:	9324655	Issue Dt:	04/26/2016	Application #:	14520390	Filing Dt:	10/22/2014
Publication #:	US20150035115	Pub Dt:	02/05/2015
Title:	MODIFIED VIA BOTTOM FOR BEOL VIA EFUSE

Patent #:	9349852	Issue Dt:	05/24/2016	Application #:	14520445	Filing Dt:	10/22/2014
Publication #:	US20150035059	Pub Dt:	02/05/2015
Title:	METHOD, STRUCTURE AND DESIGN STRUCTURE FOR CUSTOMIZING HISTORY EFFECTS OF SOI CIRCUITS

Patent #:	9293454	Issue Dt:	03/22/2016	Application #:	14521605	Filing Dt:	10/23/2014
Publication #:	US20150041957	Pub Dt:	02/12/2015
Title:	BIPOLAR JUNCTION TRANSISTOR HAVING MULTI-SIDED BASE CONTACT

Patent #:	9424173	Issue Dt:	08/23/2016	Application #:	14521739	Filing Dt:	10/23/2014
Publication #:	US20160117240	Pub Dt:	04/28/2016
Title:	PERFORMING SECURE ADDRESS RELOCATION WITHIN A MULTI-PROCESSOR SYSTEM SHARING A SAME PHYSICAL MEMORY CHANNEL TO EXTERNAL MEMORY

Patent #:	9087927	Issue Dt:	07/21/2015	Application #:	14521743	Filing Dt:	10/23/2014
Publication #:	US20150044853	Pub Dt:	02/12/2015
Title:	THERMALLY STABLE HIGH-K TETRAGONAL HFO2 LAYER WITHIN HIGH ASPECT RATIO DEEP TRENCHES

Patent #:	9552474	Issue Dt:	01/24/2017	Application #:	14521795	Filing Dt:	10/23/2014
Publication #:	US20150121493	Pub Dt:	04/30/2015
Title:	Method and Computer System for Dynamically Providing Multi-Dimensional Based Password/Challenge Authentication

Patent #:	9385232	Issue Dt:	07/05/2016	Application #:	14521939	Filing Dt:	10/23/2014
Publication #:	US20160118499	Pub Dt:	04/28/2016
Title:	FD DEVICES IN ADVANCED SEMICONDUCTOR TECHNIQUES

Patent #:	9391176	Issue Dt:	07/12/2016	Application #:	14522000	Filing Dt:	10/23/2014
Publication #:	US20160118483	Pub Dt:	04/28/2016
Title:	MULTI-GATE FETS HAVING CORRUGATED SEMICONDUCTOR STACKS AND METHOD OF FORMING THE SAME

Patent #:	9318217	Issue Dt:	04/19/2016	Application #:	14522017	Filing Dt:	10/23/2014
Publication #:	US20160118138	Pub Dt:	04/28/2016
Title:	PROGRAMMING AN ELECTRICAL FUSE WITH A SILICON-CONTROLLED RECTIFIER

Patent #:	9553054	Issue Dt:	01/24/2017	Application #:	14522083	Filing Dt:	10/23/2014
Publication #:	US20160118348	Pub Dt:	04/28/2016
Title:	STRAIN DETECTION STRUCTURES FOR BONDED WAFERS AND CHIPS

Patent #:	9276093	Issue Dt:	03/01/2016	Application #:	14522090	Filing Dt:	10/23/2014
Publication #:	US20150054123	Pub Dt:	02/26/2015
Title:	SELF-ALIGNED EMITTER-BASE REGION

Patent #:	9105606	Issue Dt:	08/11/2015	Application #:	14522119	Filing Dt:	10/23/2014
Publication #:	US20150041868	Pub Dt:	02/12/2015
Title:	SELF ALIGNED CONTACT WITH IMPROVED ROBUSTNESS

Patent #:	9293382	Issue Dt:	03/22/2016	Application #:	14522626	Filing Dt:	10/24/2014
Publication #:	US20150041809	Pub Dt:	02/12/2015
Title:	VOLTAGE CONTRAST INSPECTION OF DEEP TRENCH ISOLATION

Patent #:	9257336	Issue Dt:	02/09/2016	Application #:	14522633	Filing Dt:	10/24/2014
Publication #:	US20150056804	Pub Dt:	02/26/2015
Title:	BOTTOM-UP PLATING OF THROUGH-SUBSTRATE VIAS

Patent #:	9275907	Issue Dt:	03/01/2016	Application #:	14522649	Filing Dt:	10/24/2014
Publication #:	US20150041858	Pub Dt:	02/12/2015
Title:	3D TRANSISTOR CHANNEL MOBILITY ENHANCEMENT

Patent #:	9356014	Issue Dt:	05/31/2016	Application #:	14522652	Filing Dt:	10/24/2014
Publication #:	US20150041895	Pub Dt:	02/12/2015
Title:	HIGH-VOLTAGE METAL-INSULATOR-SEMICONDUCTOR FIELD EFFECT TRANSISTOR STRUCTURES

Patent #:	9087754	Issue Dt:	07/21/2015	Application #:	14522664	Filing Dt:	10/24/2014
Publication #:	US20150041977	Pub Dt:	02/12/2015
Title:	STRUCTURES AND METHODS FOR IMPROVING SOLDER BUMP CONNECTIONS IN SEMICONDUCTOR DEVICES

Patent #:	9777388	Issue Dt:	10/03/2017	Application #:	14522809	Filing Dt:	10/24/2014
Publication #:	US20160115616	Pub Dt:	04/28/2016
Title:	ELECTROPLATING SYSTEM AND METHOD OF USING ELECTROPLATING SYSTEM FOR CONTROLLING CONCENTRATION OF ORGANIC ADDITIVES IN ELECTROPLATING SOLUTION

Patent #:	9847415	Issue Dt:	12/19/2017	Application #:	14523076	Filing Dt:	10/24/2014
Publication #:	US20150041896	Pub Dt:	02/12/2015
Title:	FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURE

Patent #:	9496394	Issue Dt:	11/15/2016	Application #:	14523083	Filing Dt:	10/24/2014
Publication #:	US20160118496	Pub Dt:	04/28/2016
Title:	SEMICONDUCTOR STRUCTURES WITH FIELD EFFECT TRANSISTOR(S) HAVING LOW-RESISTANCE SOURCE/DRAIN CONTACT(S)

Patent #:	9281252	Issue Dt:	03/08/2016	Application #:	14523217	Filing Dt:	10/24/2014
Title:	METHOD COMPRISING APPLYING AN EXTERNAL MECHANICAL STRESS TO A SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR PROCESSING TOOL

Patent #:	9257353	Issue Dt:	02/09/2016	Application #:	14523266	Filing Dt:	10/24/2014
Title:	INTEGRATED CIRCUITS WITH TEST STRUCTURES INCLUDING BI-DIRECTIONAL PROTECTION DIODES

Patent #:	9490123	Issue Dt:	11/08/2016	Application #:	14523334	Filing Dt:	10/24/2014
Publication #:	US20160118255	Pub Dt:	04/28/2016
Title:	METHODS OF FORMING STRAINED EPITAXIAL SEMICONDUCTOR MATERIAL(S) ABOVE A STRAIN-RELAXED BUFFER LAYER

Patent #:	9583625	Issue Dt:	02/28/2017	Application #:	14523548	Filing Dt:	10/24/2014
Publication #:	US20160118500	Pub Dt:	04/28/2016
Title:	FIN STRUCTURES AND MULTI-VT SCHEME BASED ON TAPERED FIN AND METHOD TO FORM

Patent #:	9519745	Issue Dt:	12/13/2016	Application #:	14523558	Filing Dt:	10/24/2014
Publication #:	US20160117432	Pub Dt:	04/28/2016
Title:	METHOD AND APPARATUS FOR ASSISTED METAL ROUTING

Patent #:	9570572	Issue Dt:	02/14/2017	Application #:	14523640	Filing Dt:	10/24/2014
Publication #:	US20160118468	Pub Dt:	04/28/2016
Title:	MULTIPLE LAYER INTERFACE FORMATION FOR SEMICONDUCTOR STRUCTURE

Patent #:	9034746	Issue Dt:	05/19/2015	Application #:	14524023	Filing Dt:	10/27/2014
Publication #:	US20150044861	Pub Dt:	02/12/2015
Title:	GATE SILICIDATION

Patent #:	8962413	Issue Dt:	02/24/2015	Application #:	14524076	Filing Dt:	10/27/2014
Publication #:	US20150044855	Pub Dt:	02/12/2015
Title:	METHODS OF FORMING SPACERS ON FINFETS AND OTHER SEMICONDUCTOR DEVICES

Patent #:	9337041	Issue Dt:	05/10/2016	Application #:	14524079	Filing Dt:	10/27/2014
Publication #:	US20150111350	Pub Dt:	04/23/2015
Title:	ANISOTROPIC DIELECTRIC MATERIAL GATE SPACER FOR A FIELD EFFECT TRANSISTOR

Patent #:	9349650	Issue Dt:	05/24/2016	Application #:	14524246	Filing Dt:	10/27/2014
Publication #:	US20150380314	Pub Dt:	12/31/2015
Title:	LOW RESISTANCE AND DEFECT FREE EPITAXIAL SEMICONDUCTOR MATERIAL FOR PROVIDING MERGED FinFETs

Patent #:	10146895	Issue Dt:	12/04/2018	Application #:	14524413	Filing Dt:	10/27/2014
Publication #:	US20150120268	Pub Dt:	04/30/2015
Title:	METHOD AND APPARATUS FOR SIMULATING A DIGITAL CIRCUIT

Patent #:	9576856	Issue Dt:	02/21/2017	Application #:	14524628	Filing Dt:	10/27/2014
Publication #:	US20160118304	Pub Dt:	04/28/2016
Title:	FABRICATION OF NANOWIRE FIELD EFFECT TRANSISTOR STRUCTURES

Patent #:	9087805	Issue Dt:	07/21/2015	Application #:	14524637	Filing Dt:	10/27/2014
Publication #:	US20150044787	Pub Dt:	02/12/2015
Title:	SEMICONDUCTOR TEST AND MONITORING STRUCTURE TO DETECT BOUNDARIES OF SAFE EFFECTIVE MODULUS

Patent #:	9679796	Issue Dt:	06/13/2017	Application #:	14525254	Filing Dt:	10/28/2014
Publication #:	US20160118283	Pub Dt:	04/28/2016
Title:	ANODIZED METAL ON CARRIER WAFER

Patent #:	9728440	Issue Dt:	08/08/2017	Application #:	14525267	Filing Dt:	10/28/2014
Publication #:	US20160118287	Pub Dt:	04/28/2016
Title:	NON-TRANSPARENT MICROELECTRONIC GRADE GLASS AS A SUBSTRATE, TEMPORARY CARRIER OR WAFER

Patent #:	9614056	Issue Dt:	04/04/2017	Application #:	14525288	Filing Dt:	10/28/2014
Publication #:	US20160118480	Pub Dt:	04/28/2016
Title:	METHODS OF FORMING A TRI-GATE FINFET DEVICE

100

Patent #:	9455140	Issue Dt:	09/27/2016	Application #:	14525351	Filing Dt:	10/28/2014
Publication #:	US20160118251	Pub Dt:	04/28/2016
Title:	METHODS OF FORMING DOPED EPITAXIAL SiGe MATERIAL ON SEMICONDUCTOR DEVICES

Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309, UGLAND HOUSE

MAPLES CORPORATE SERVICES LIMITED

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

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