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Reel/Frame:054636/0001   Pages: 911
Recorded: 11/20/2020
Attorney Dkt #:37188/13
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 14520
Page 125 of 146
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146
1
Patent #:
9018052
Issue Dt:
04/28/2015
Application #:
14525559
Filing Dt:
10/28/2014
Publication #:
US20150064853
Pub Dt:
03/05/2015
Title:
INTEGRATED CIRCUIT INCLUDING DRAM AND SRAM/LOGIC
2
Patent #:
9335368
Issue Dt:
05/10/2016
Application #:
14525596
Filing Dt:
10/28/2014
Publication #:
US20160116526
Pub Dt:
04/28/2016
Title:
METHOD AND APPARATUS FOR QUANTIFYING DEFECTS DUE TO THROUGH SILICON VIAs IN INTEGRATED CIRCUITS
3
Patent #:
9165850
Issue Dt:
10/20/2015
Application #:
14525682
Filing Dt:
10/28/2014
Publication #:
US20150044864
Pub Dt:
02/12/2015
Title:
COMPENSATING FOR WARPAGE OF A FLIP CHIP PACKAGE BY VARYING HEIGHTS OF A REDISTRIBUTION LAYER ON AN INTEGRATED CIRCUIT CHIP
4
Patent #:
9165837
Issue Dt:
10/20/2015
Application #:
14525743
Filing Dt:
10/28/2014
Title:
METHOD TO FORM DEFECT FREE REPLACEMENT FINS BY H2 ANNEAL
5
Patent #:
9324827
Issue Dt:
04/26/2016
Application #:
14525744
Filing Dt:
10/28/2014
Publication #:
US20160118473
Pub Dt:
04/28/2016
Title:
NON-PLANAR SCHOTTKY DIODE AND METHOD OF FABRICATION
6
Patent #:
9337197
Issue Dt:
05/10/2016
Application #:
14525763
Filing Dt:
10/28/2014
Publication #:
US20160118386
Pub Dt:
04/28/2016
Title:
SEMICONDUCTOR STRUCTURE HAVING FINFET ULTRA THIN BODY AND METHODS OF FABRICATION THEREOF
7
Patent #:
9431294
Issue Dt:
08/30/2016
Application #:
14525796
Filing Dt:
10/28/2014
Publication #:
US20160118292
Pub Dt:
04/28/2016
Title:
METHODS OF PRODUCING INTEGRATED CIRCUITS WITH AN AIR GAP
8
Patent #:
9064086
Issue Dt:
06/23/2015
Application #:
14525833
Filing Dt:
10/28/2014
Publication #:
US20150046887
Pub Dt:
02/12/2015
Title:
RETARGETING SEMICONDUCTOR DEVICE SHAPES FOR MULTIPLE PATTERNING PROCESSES
9
Patent #:
9508743
Issue Dt:
11/29/2016
Application #:
14525842
Filing Dt:
10/28/2014
Publication #:
US20160118414
Pub Dt:
04/28/2016
Title:
DUAL THREE-DIMENSIONAL AND RF SEMICONDUCTOR DEVICES USING LOCAL SOI
10
Patent #:
9263537
Issue Dt:
02/16/2016
Application #:
14526126
Filing Dt:
10/28/2014
Publication #:
US20150041869
Pub Dt:
02/12/2015
Title:
METHODS OF FORMING A SEMICONDUCTOR DEVICE WITH A PROTECTED GATE CAP LAYER AND THE RESULTING DEVICE
11
Patent #:
10163892
Issue Dt:
12/25/2018
Application #:
14526580
Filing Dt:
10/29/2014
Publication #:
US20150048416
Pub Dt:
02/19/2015
Title:
SILICON CONTROLLED RECTIFIERS (SCR), METHODS OF MANUFACTURE AND DESIGN STRUCTURES
12
Patent #:
9478663
Issue Dt:
10/25/2016
Application #:
14526617
Filing Dt:
10/29/2014
Publication #:
US20160126353
Pub Dt:
05/05/2016
Title:
FINFET DEVICE INCLUDING A UNIFORM SILICON ALLOY FIN
13
Patent #:
9559059
Issue Dt:
01/31/2017
Application #:
14526678
Filing Dt:
10/29/2014
Publication #:
US20160126190
Pub Dt:
05/05/2016
Title:
METHODS OF FORMING AN IMPROVED VIA TO CONTACT INTERFACE BY SELECTIVE FORMATION OF A CONDUCTIVE CAPPING LAYER
14
Patent #:
9466530
Issue Dt:
10/11/2016
Application #:
14526729
Filing Dt:
10/29/2014
Publication #:
US20160126135
Pub Dt:
05/05/2016
Title:
METHODS OF FORMING AN IMPROVED VIA TO CONTACT INTERFACE BY SELECTIVE FORMATION OF A METAL SILICIDE CAPPING LAYER
15
Patent #:
9373637
Issue Dt:
06/21/2016
Application #:
14526767
Filing Dt:
10/29/2014
Publication #:
US20150054081
Pub Dt:
02/26/2015
Title:
EPITAXIAL SEMICONDUCTOR RESISTOR WITH SEMICONDUCTOR STRUCTURES ON SAME SUBSTRATE
16
Patent #:
9647073
Issue Dt:
05/09/2017
Application #:
14526831
Filing Dt:
10/29/2014
Publication #:
US20160126316
Pub Dt:
05/05/2016
Title:
TRANSISTOR STRUCTURES AND FABRICATION METHODS THEREOF
17
Patent #:
10014379
Issue Dt:
07/03/2018
Application #:
14526980
Filing Dt:
10/29/2014
Publication #:
US20170077247
Pub Dt:
03/16/2017
Title:
METHODS OF FORMING SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CONTACT ELEMENTS AND THE RESULTING DEVICE
18
Patent #:
9318551
Issue Dt:
04/19/2016
Application #:
14527042
Filing Dt:
10/29/2014
Publication #:
US20150060950
Pub Dt:
03/05/2015
Title:
TRENCH ISOLATION STRUCTURES AND METHODS FOR BIPOLAR JUNCTION TRANSISTORS
19
Patent #:
9343374
Issue Dt:
05/17/2016
Application #:
14527207
Filing Dt:
10/29/2014
Publication #:
US20160126146
Pub Dt:
05/05/2016
Title:
EFFICIENT MAIN SPACER PULL BACK PROCESS FOR ADVANCED VLSI CMOS TECHNOLOGIES
20
Patent #:
9640538
Issue Dt:
05/02/2017
Application #:
14527278
Filing Dt:
10/29/2014
Publication #:
US20160126245
Pub Dt:
05/05/2016
Title:
EMBEDDED DRAM IN REPLACEMENT METAL GATE TECHNOLOGY
21
Patent #:
9508588
Issue Dt:
11/29/2016
Application #:
14527424
Filing Dt:
10/29/2014
Publication #:
US20160126132
Pub Dt:
05/05/2016
Title:
METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH ISOLATION REGIONS HAVING UNIFORM STEP HEIGHTS
22
Patent #:
9040225
Issue Dt:
05/26/2015
Application #:
14527813
Filing Dt:
10/30/2014
Publication #:
US20150050601
Pub Dt:
02/19/2015
Title:
DEVELOPABLE BOTTOM ANTIREFLECTIVE COATING COMPOSITION AND PATTERN FORMING METHOD USING THEREOF
23
Patent #:
9299616
Issue Dt:
03/29/2016
Application #:
14527867
Filing Dt:
10/30/2014
Title:
INTEGRATED CIRCUITS WITH SEPARATE WORKFUNCTION MATERIAL LAYERS AND METHODS FOR FABRICATING THE SAME
24
Patent #:
9410261
Issue Dt:
08/09/2016
Application #:
14528028
Filing Dt:
10/30/2014
Publication #:
US20150060266
Pub Dt:
03/05/2015
Title:
TWO MASK PROCESS FOR ELECTROPLATING METAL EMPLOYING A NEGATIVE ELECTROPHORETIC PHOTORESIST
25
Patent #:
9362309
Issue Dt:
06/07/2016
Application #:
14528266
Filing Dt:
10/30/2014
Publication #:
US20150056792
Pub Dt:
02/26/2015
Title:
FINFET AND METHOD OF FABRICATION
26
Patent #:
9578775
Issue Dt:
02/21/2017
Application #:
14528316
Filing Dt:
10/30/2014
Publication #:
US20150118894
Pub Dt:
04/30/2015
Title:
LGA SOCKET TERMINAL DAMAGE PREVENTION
27
Patent #:
9070734
Issue Dt:
06/30/2015
Application #:
14528388
Filing Dt:
10/30/2014
Publication #:
US20150053982
Pub Dt:
02/26/2015
Title:
HETEROJUNCTION BIPOLAR TRANSISTORS WITH REDUCED PARASITIC CAPACITANCE
28
Patent #:
9564508
Issue Dt:
02/07/2017
Application #:
14528435
Filing Dt:
10/30/2014
Publication #:
US20150056777
Pub Dt:
02/26/2015
Title:
DEVICE ISOLATION WITH IMPROVED THERMAL CONDUCTIVITY
29
Patent #:
9269629
Issue Dt:
02/23/2016
Application #:
14528830
Filing Dt:
10/30/2014
Publication #:
US20150064874
Pub Dt:
03/05/2015
Title:
DUMMY FIN FORMATION BY GAS CLUSTER ION BEAM
30
Patent #:
9417501
Issue Dt:
08/16/2016
Application #:
14529243
Filing Dt:
10/31/2014
Publication #:
US20150064817
Pub Dt:
03/05/2015
Title:
ELECTRICALLY CONTROLLED OPTICAL FUSE AND METHOD OF FABRICATION
31
Patent #:
9478549
Issue Dt:
10/25/2016
Application #:
14529332
Filing Dt:
10/31/2014
Publication #:
US20150064855
Pub Dt:
03/05/2015
Title:
FINFET WITH DIELECTRIC ISOLATION BY SILICON-ON-NOTHING AND METHOD OF FABRICATION
32
Patent #:
9501638
Issue Dt:
11/22/2016
Application #:
14529338
Filing Dt:
10/31/2014
Publication #:
US20150121538
Pub Dt:
04/30/2015
Title:
TECHNIQUES FOR MANAGING SECURITY MODES APPLIED TO APPLICATION PROGRAM EXECUTION
33
Patent #:
9219068
Issue Dt:
12/22/2015
Application #:
14529825
Filing Dt:
10/31/2014
Publication #:
US20150340288
Pub Dt:
11/26/2015
Title:
FINFET WITH DIELECTRIC ISOLATION BY SILICON-ON-NOTHING AND METHOD OF FABRICATION
34
Patent #:
9385231
Issue Dt:
07/05/2016
Application #:
14530796
Filing Dt:
11/02/2014
Publication #:
US20150060944
Pub Dt:
03/05/2015
Title:
DEVICE STRUCTURE WITH INCREASED CONTACT AREA AND REDUCED GATE CAPACITANCE
35
Patent #:
9632499
Issue Dt:
04/25/2017
Application #:
14530947
Filing Dt:
11/03/2014
Publication #:
US20160126120
Pub Dt:
05/05/2016
Title:
WORK-IN-PROGRESS SUBSTRATE PROCESSING METHODS AND SYSTEMS FOR USE IN THE FABRICATION OF INTEGRATED CIRCUITS
36
Patent #:
9312183
Issue Dt:
04/12/2016
Application #:
14531743
Filing Dt:
11/03/2014
Publication #:
US20160126141
Pub Dt:
05/05/2016
Title:
METHODS FOR FORMING FINFETS HAVING A CAPPING LAYER FOR REDUCING PUNCH THROUGH LEAKAGE
37
Patent #:
9443948
Issue Dt:
09/13/2016
Application #:
14532122
Filing Dt:
11/04/2014
Publication #:
US20150083999
Pub Dt:
03/26/2015
Title:
Gate-All-Around Nanowire MOSFET and Method of Formation
38
Patent #:
9257361
Issue Dt:
02/09/2016
Application #:
14532437
Filing Dt:
11/04/2014
Publication #:
US20150059361
Pub Dt:
03/05/2015
Title:
IN-SITU THERMOELECTRIC COOLING
39
Patent #:
9437679
Issue Dt:
09/06/2016
Application #:
14533154
Filing Dt:
11/05/2014
Publication #:
US20150061021
Pub Dt:
03/05/2015
Title:
SEMI-CONDUCTOR DEVICE WITH EPITAXIAL SOURCE/DRAIN FACETTING PROVIDED AT THE GATE EDGE
40
Patent #:
9606432
Issue Dt:
03/28/2017
Application #:
14533464
Filing Dt:
11/05/2014
Publication #:
US20160124308
Pub Dt:
05/05/2016
Title:
ALTERNATING SPACE DECOMPOSITION IN CIRCUIT STRUCTURE FABRICATION
41
Patent #:
9329471
Issue Dt:
05/03/2016
Application #:
14533497
Filing Dt:
11/05/2014
Publication #:
US20160125121
Pub Dt:
05/05/2016
Title:
ACHIEVING A CRITICAL DIMENSION TARGET BASED ON RESIST CHARACTERISTICS
42
Patent #:
9252022
Issue Dt:
02/02/2016
Application #:
14533629
Filing Dt:
11/05/2014
Title:
PATTERNING ASSIST FEATURE TO MITIGATE REACTIVE ION ETCH MICROLOADING EFFECT
43
Patent #:
9552852
Issue Dt:
01/24/2017
Application #:
14534205
Filing Dt:
11/06/2014
Publication #:
US20160133303
Pub Dt:
05/12/2016
Title:
DOPED METAL-INSULATOR-TRANSITION LATCH CIRCUITRY
44
Patent #:
9276064
Issue Dt:
03/01/2016
Application #:
14535433
Filing Dt:
11/07/2014
Title:
FABRICATING STACKED NANOWIRE, FIELD-EFFECT TRANSISTORS
45
Patent #:
9478634
Issue Dt:
10/25/2016
Application #:
14535852
Filing Dt:
11/07/2014
Publication #:
US20160133719
Pub Dt:
05/12/2016
Title:
METHODS OF FORMING REPLACEMENT GATE STRUCTURES ON FINFET DEVICES AND THE RESULTING DEVICES
46
Patent #:
9412839
Issue Dt:
08/09/2016
Application #:
14535942
Filing Dt:
11/07/2014
Publication #:
US20160133720
Pub Dt:
05/12/2016
Title:
METHODS OF FORMING REPLACEMENT GATE STRUCTURES ON FINFET DEVICES AND THE RESULTING DEVICES
47
Patent #:
9543416
Issue Dt:
01/10/2017
Application #:
14536026
Filing Dt:
11/07/2014
Publication #:
US20160133726
Pub Dt:
05/12/2016
Title:
METHODS OF FORMING PRODUCTS WITH FINFET SEMICONDUCTOR DEVICES WITHOUT REMOVING FINS IN CERTAIN AREAS OF THE PRODUCT
48
Patent #:
9431349
Issue Dt:
08/30/2016
Application #:
14536028
Filing Dt:
11/07/2014
Publication #:
US20160133578
Pub Dt:
05/12/2016
Title:
DESIGN RULE CLEAN LAYER MARKER
49
Patent #:
9379209
Issue Dt:
06/28/2016
Application #:
14536167
Filing Dt:
11/07/2014
Publication #:
US20160133721
Pub Dt:
05/12/2016
Title:
SELECTIVELY FORMING A PROTECTIVE CONDUCTIVE CAP ON A METAL GATE ELECTRODE
50
Patent #:
9455254
Issue Dt:
09/27/2016
Application #:
14536243
Filing Dt:
11/07/2014
Publication #:
US20160133623
Pub Dt:
05/12/2016
Title:
METHODS OF FORMING A COMBINED GATE AND SOURCE/DRAIN CONTACT STRUCTURE AND THE RESULTING DEVICE
51
Patent #:
9076787
Issue Dt:
07/07/2015
Application #:
14536737
Filing Dt:
11/10/2014
Publication #:
US20150061032
Pub Dt:
03/05/2015
Title:
FABRICATION OF NICKEL FREE SILICIDE FOR SEMICONDUCTOR CONTACT METALLIZATION
52
Patent #:
9171954
Issue Dt:
10/27/2015
Application #:
14537139
Filing Dt:
11/10/2014
Publication #:
US20150054093
Pub Dt:
02/26/2015
Title:
FINFET STRUCTURE AND METHOD TO ADJUST THRESHOLD VOLTAGE IN A FINFET STRUCTURE
53
Patent #:
9478642
Issue Dt:
10/25/2016
Application #:
14537832
Filing Dt:
11/10/2014
Publication #:
US20160133727
Pub Dt:
05/12/2016
Title:
SEMICONDUCTOR JUNCTION FORMATION
54
Patent #:
9490897
Issue Dt:
11/08/2016
Application #:
14538170
Filing Dt:
11/11/2014
Publication #:
US20150107101
Pub Dt:
04/23/2015
Title:
FABRICATING PREASSEMBLED OPTOELECTRONIC INTERCONNECT STRUCTURES
55
Patent #:
9627377
Issue Dt:
04/18/2017
Application #:
14538401
Filing Dt:
11/11/2014
Publication #:
US20150061040
Pub Dt:
03/05/2015
Title:
SELF-ALIGNED DIELECTRIC ISOLATION FOR FINFET DEVICES
56
Patent #:
9111938
Issue Dt:
08/18/2015
Application #:
14538944
Filing Dt:
11/12/2014
Publication #:
US20150061135
Pub Dt:
03/05/2015
Title:
COPPER INTERCONNECT WITH CVD LINER AND METALLIC CAP
57
Patent #:
9190260
Issue Dt:
11/17/2015
Application #:
14540504
Filing Dt:
11/13/2014
Title:
TOPOLOGICAL METHOD TO BUILD SELF-ALIGNED MTJ WITHOUT A MASK
58
Patent #:
9466604
Issue Dt:
10/11/2016
Application #:
14540724
Filing Dt:
11/13/2014
Publication #:
US20160141291
Pub Dt:
05/19/2016
Title:
METAL SEGMENTS AS LANDING PADS AND LOCAL INTERCONNECTS IN AN IC DEVICE
59
Patent #:
9087722
Issue Dt:
07/21/2015
Application #:
14541182
Filing Dt:
11/14/2014
Publication #:
US20150069525
Pub Dt:
03/12/2015
Title:
SEMICONDUCTOR DEVICES HAVING DIFFERENT GATE OXIDE THICKNESSES
60
Patent #:
9443944
Issue Dt:
09/13/2016
Application #:
14541754
Filing Dt:
11/14/2014
Publication #:
US20160141379
Pub Dt:
05/19/2016
Title:
INTEGRATED CIRCUITS WITH MIDDLE OF LINE CAPACITANCE REDUCTION IN SELF-ALIGNED CONTACT PROCESS FLOW AND FABRICATION METHODS
61
Patent #:
9490197
Issue Dt:
11/08/2016
Application #:
14541803
Filing Dt:
11/14/2014
Publication #:
US20160141237
Pub Dt:
05/19/2016
Title:
THREE DIMENSIONAL ORGANIC OR GLASS INTERPOSER
62
Patent #:
9502293
Issue Dt:
11/22/2016
Application #:
14543992
Filing Dt:
11/18/2014
Publication #:
US20160141206
Pub Dt:
05/19/2016
Title:
SELF-ALIGNED VIA PROCESS FLOW
63
Patent #:
9165819
Issue Dt:
10/20/2015
Application #:
14546058
Filing Dt:
11/18/2014
Publication #:
US20150072504
Pub Dt:
03/12/2015
Title:
HIGH LINEARITY SOI WAFER FOR LOW-DISTORTION CIRCUIT APPLICATIONS
64
Patent #:
10031989
Issue Dt:
07/24/2018
Application #:
14546065
Filing Dt:
11/18/2014
Publication #:
US20160140273
Pub Dt:
05/19/2016
Title:
INTEGRATED CIRCUIT PERFORMANCE MODELING USING A CONNECTIVITY-BASED CONDENSED RESISTANCE MODEL FOR A CONDUCTIVE STRUCTURE IN AN INTEGRATED CIRCUIT
65
Patent #:
10489455
Issue Dt:
11/26/2019
Application #:
14546318
Filing Dt:
11/18/2014
Publication #:
US20160140243
Pub Dt:
05/19/2016
Title:
SCOPED SEARCH ENGINE
66
Patent #:
9378639
Issue Dt:
06/28/2016
Application #:
14546460
Filing Dt:
11/18/2014
Publication #:
US20150138008
Pub Dt:
05/21/2015
Title:
TARGET IDENTIFICATION FOR SENDING CONTENT FROM A MOBILE DEVICE
67
Patent #:
9450529
Issue Dt:
09/20/2016
Application #:
14546554
Filing Dt:
11/18/2014
Publication #:
US20150069947
Pub Dt:
03/12/2015
Title:
DYNAMIC RECONFIGURATION-SWITCHING OF WINDINGS IN AN ELECTRIC MOTOR
68
Patent #:
9087538
Issue Dt:
07/21/2015
Application #:
14547504
Filing Dt:
11/19/2014
Publication #:
US20150170692
Pub Dt:
06/18/2015
Title:
TAPE SERVO TRACK WRITE COMPENSATION
69
Patent #:
9519502
Issue Dt:
12/13/2016
Application #:
14548624
Filing Dt:
11/20/2014
Publication #:
US20150143055
Pub Dt:
05/21/2015
Title:
VIRTUAL MACHINE BACKUP
70
Patent #:
9465689
Issue Dt:
10/11/2016
Application #:
14548929
Filing Dt:
11/20/2014
Publication #:
US20160149595
Pub Dt:
05/26/2016
Title:
FORWARD ERROR CORRECTION SYNCHRONIZATION
71
Patent #:
9293189
Issue Dt:
03/22/2016
Application #:
14549117
Filing Dt:
11/20/2014
Publication #:
US20150078068
Pub Dt:
03/19/2015
Title:
INTEGRATED CIRCUITS WITH SRAM CELLS HAVING ADDITIONAL READ STACKS
72
Patent #:
9219666
Issue Dt:
12/22/2015
Application #:
14549663
Filing Dt:
11/21/2014
Publication #:
US20150082102
Pub Dt:
03/19/2015
Title:
SYSTEMS AND METHODS FOR MANAGING COMPUTING SYSTEMS UTILIZING AUGMENTED REALITY
73
Patent #:
9455330
Issue Dt:
09/27/2016
Application #:
14550019
Filing Dt:
11/21/2014
Publication #:
US20160149015
Pub Dt:
05/26/2016
Title:
RECESSING RMG METAL GATE STACK FOR FORMING SELF-ALIGNED CONTACT
74
Patent #:
9343406
Issue Dt:
05/17/2016
Application #:
14550531
Filing Dt:
11/21/2014
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Assignor
1
WILMINGTON TRUST, NATIONAL ASSOCIATION
Exec Dt:
11/17/2020
Assignee
1
GLOBALFOUNDRIES INC.
PO BOX 309, UGLAND HOUSE
MAPLES CORPORATE SERVICES LIMITED
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
BENJAMIN PETERSEN
1460 EL CAMINO REAL, 2ND FLOOR
SHEARMAN & STERLING LLP
MENLO PARK, CA 94025

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