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Reel/Frame:	054636/0001			Pages:	911
		Recorded:	11/20/2020
Attorney Dkt #:	37188/13
Conveyance:	RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).

Total properties: 14520
Page 127 of 146
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Patent #:	9153280	Issue Dt:	10/06/2015	Application #:	14598154	Filing Dt:	01/15/2015
Publication #:	US20150124348	Pub Dt:	05/07/2015
Title:	ADJUSTING TENSION IN A TAPE MEDIA TO COUNTER TAPE DIMENSIONAL STABILITY (TDS) ERRORS IN A TAPE MEDIA

Patent #:	9367695	Issue Dt:	06/14/2016	Application #:	14598256	Filing Dt:	01/16/2015
Publication #:	US20150161395	Pub Dt:	06/11/2015
Title:	SOFTWARE VULNERABILITY NOTIFICATION VIA ICON DECORATIONS

Patent #:	9543253	Issue Dt:	01/10/2017	Application #:	14598258	Filing Dt:	01/16/2015
Publication #:	US20150136838	Pub Dt:	05/21/2015
Title:	METHOD FOR SHAPING A LAMINATE SUBSTRATE

Patent #:	9275989	Issue Dt:	03/01/2016	Application #:	14598701	Filing Dt:	01/16/2015
Publication #:	US20150123181	Pub Dt:	05/07/2015
Title:	CAPACITORS POSITIONED AT THE DEVICE LEVEL IN AN INTEGRATED CIRCUIT PRODUCT AND METHODS OF MAKING SUCH CAPACITORS

Patent #:	10020256	Issue Dt:	07/10/2018	Application #:	14599576	Filing Dt:	01/19/2015
Publication #:	US20150130019	Pub Dt:	05/14/2015
Title:	ELECTRONIC FUSE HAVING AN INSULATION LAYER

Patent #:	9305846	Issue Dt:	04/05/2016	Application #:	14599873	Filing Dt:	01/19/2015
Publication #:	US20150140761	Pub Dt:	05/21/2015
Title:	DEVICE ISOLATION IN FINFET CMOS

Patent #:	9443945	Issue Dt:	09/13/2016	Application #:	14600097	Filing Dt:	01/20/2015
Publication #:	US20150129966	Pub Dt:	05/14/2015
Title:	TRANSISTOR INCLUDING A GATE ELECTRODE EXTENDING ALL AROUND ONE OR MORE CHANNEL REGIONS

Patent #:	9425080	Issue Dt:	08/23/2016	Application #:	14600229	Filing Dt:	01/20/2015
Publication #:	US20150132896	Pub Dt:	05/14/2015
Title:	NON-VOLATILE MEMORY DEVICE EMPLOYING SEMICONDUCTOR NANOPARTICLES

Patent #:	9390969	Issue Dt:	07/12/2016	Application #:	14600273	Filing Dt:	01/20/2015
Publication #:	US20150140809	Pub Dt:	05/21/2015
Title:	INTEGRATED CIRCUIT AND INTERCONNECT, AND METHOD OF FABRICATING SAME

Patent #:	9225360	Issue Dt:	12/29/2015	Application #:	14601172	Filing Dt:	01/20/2015
Publication #:	US20150149860	Pub Dt:	05/28/2015
Title:	ITERATIVE DATA STORAGE READ CHANNEL ARCHITECTURE

Patent #:	9543403	Issue Dt:	01/10/2017	Application #:	14601655	Filing Dt:	01/21/2015
Publication #:	US20160211345	Pub Dt:	07/21/2016
Title:	BIPOLAR JUNCTION TRANSISTOR WITH MULTIPLE EMITTER FINGERS

Patent #:	9099493	Issue Dt:	08/04/2015	Application #:	14601745	Filing Dt:	01/21/2015
Publication #:	US20150132898	Pub Dt:	05/14/2015
Title:	Semiconductor Device With Raised Source/Drain And Replacement Metal Gate

Patent #:	9653204	Issue Dt:	05/16/2017	Application #:	14602567	Filing Dt:	01/22/2015
Publication #:	US20160217904	Pub Dt:	07/28/2016
Title:	SYMMETRIC MULTI-PORT INDUCTOR FOR DIFFERENTIAL MULTI-BAND RF CIRCUITS

Patent #:	9478671	Issue Dt:	10/25/2016	Application #:	14602940	Filing Dt:	01/22/2015
Publication #:	US20150137316	Pub Dt:	05/21/2015
Title:	SEMICONDUCTOR DEVICE INCLUDING A RESISTOR AND METHOD FOR THE FORMATION THEREOF

Patent #:	9172132	Issue Dt:	10/27/2015	Application #:	14603856	Filing Dt:	01/23/2015
Publication #:	US20150129668	Pub Dt:	05/14/2015
Title:	INTEGRATED ANTENNA FOR RFIC PACKAGE APPLICATIONS

Patent #:	9460760	Issue Dt:	10/04/2016	Application #:	14604009	Filing Dt:	01/23/2015
Publication #:	US20160217832	Pub Dt:	07/28/2016
Title:	DATA-DEPENDENT SELF-BIASED DIFFERENTIAL SENSE AMPLIFIER

Patent #:	9263442	Issue Dt:	02/16/2016	Application #:	14606224	Filing Dt:	01/27/2015
Publication #:	US20150137267	Pub Dt:	05/21/2015
Title:	REPLACEMENT GATE STRUCTURES AND METHODS OF MANUFACTURING

Patent #:	9355921	Issue Dt:	05/31/2016	Application #:	14607160	Filing Dt:	01/28/2015
Publication #:	US20150140697	Pub Dt:	05/21/2015
Title:	TEST MACRO FOR USE WITH A MULTI-PATTERNING LITHOGRAPHY PROCESS

Patent #:	9299617	Issue Dt:	03/29/2016	Application #:	14607191	Filing Dt:	01/28/2015
Publication #:	US20150147868	Pub Dt:	05/28/2015
Title:	LOCALLY ISOLATED PROTECTED BULK FINFET SEMICONDUCTOR DEVICE

Patent #:	9484428	Issue Dt:	11/01/2016	Application #:	14608288	Filing Dt:	01/29/2015
Publication #:	US20160225870	Pub Dt:	08/04/2016
Title:	NON-PLANAR EXCITON TRANSISTOR (BISFET) AND METHODS FOR MAKING

Patent #:	9633947	Issue Dt:	04/25/2017	Application #:	14608337	Filing Dt:	01/29/2015
Publication #:	US20160225719	Pub Dt:	08/04/2016
Title:	FOLDED BALLISTIC CONDUCTOR INTERCONNECT LINE

Patent #:	9087921	Issue Dt:	07/21/2015	Application #:	14608365	Filing Dt:	01/29/2015
Publication #:	US20150147853	Pub Dt:	05/28/2015
Title:	CMOS WITH DUAL RAISED SOURCE AND DRAIN FOR NMOS AND PMOS

Patent #:	9263465	Issue Dt:	02/16/2016	Application #:	14608370	Filing Dt:	01/29/2015
Publication #:	US20150137147	Pub Dt:	05/21/2015
Title:	CMOS WITH DUAL RAISED SOURCE AND DRAIN FOR NMOS AND PMOS

Patent #:	9263466	Issue Dt:	02/16/2016	Application #:	14608374	Filing Dt:	01/29/2015
Publication #:	US20150140743	Pub Dt:	05/21/2015
Title:	CMOS WITH DUAL RAISED SOURCE AND DRAIN FOR NMOS AND PMOS

Patent #:	9412655	Issue Dt:	08/09/2016	Application #:	14608377	Filing Dt:	01/29/2015
Publication #:	US20160225666	Pub Dt:	08/04/2016
Title:	FORMING MERGED LINES IN A METALLIZATION LAYER BY REPLACING SACRIFICIAL LINES WITH CONDUCTIVE LINES

Patent #:	9299719	Issue Dt:	03/29/2016	Application #:	14608386	Filing Dt:	01/29/2015
Publication #:	US20150140744	Pub Dt:	05/21/2015
Title:	CMOS WITH DUAL RAISED SOURCE AND DRAIN FOR NMOS AND PMOS

Patent #:	9183878	Issue Dt:	11/10/2015	Application #:	14608508	Filing Dt:	01/29/2015
Publication #:	US20150146320	Pub Dt:	05/28/2015
Title:	READING METHOD FOR LINEAR TAPE OPEN

Patent #:	9349658	Issue Dt:	05/24/2016	Application #:	14608625	Filing Dt:	01/29/2015
Title:	METHODS OF FORMING FIN ISOLATION REGIONS ON FINFET SEMICONDUCTOR DEVICES USING AN OXIDATION-BLOCKING LAYER OF MATERIAL

Patent #:	9290806	Issue Dt:	03/22/2016	Application #:	14608675	Filing Dt:	01/29/2015
Publication #:	US20150141299	Pub Dt:	05/21/2015
Title:	FABRICATING SELF-FORMED NANOMETER PORE ARRAY AT WAFER SCALE FOR DNA SEQUENCING

Patent #:	9673083	Issue Dt:	06/06/2017	Application #:	14608729	Filing Dt:	01/29/2015
Publication #:	US20160225659	Pub Dt:	08/04/2016
Title:	METHODS OF FORMING FIN ISOLATION REGIONS ON FINFET SEMICONDUCTOR DEVICES BY IMPLANTATION OF AN OXIDATION-RETARDING MATERIAL

Patent #:	9097698	Issue Dt:	08/04/2015	Application #:	14608781	Filing Dt:	01/29/2015
Publication #:	US20150137069	Pub Dt:	05/21/2015
Title:	NANOGAP DEVICE WITH CAPPED NANOWIRE STRUCTURES

Patent #:	10026659	Issue Dt:	07/17/2018	Application #:	14608815	Filing Dt:	01/29/2015
Publication #:	US20160225676	Pub Dt:	08/04/2016
Title:	METHODS OF FORMING FIN ISOLATION REGIONS UNDER TENSILE-STRAINED FINS ON FINFET SEMICONDUCTOR DEVICES

Patent #:	9741622	Issue Dt:	08/22/2017	Application #:	14608902	Filing Dt:	01/29/2015
Publication #:	US20160225674	Pub Dt:	08/04/2016
Title:	METHODS OF FORMING NMOS AND PMOS FINFET DEVICES AND THE RESULTING PRODUCT

Patent #:	9666709	Issue Dt:	05/30/2017	Application #:	14609105	Filing Dt:	01/29/2015
Publication #:	US20160225895	Pub Dt:	08/04/2016
Title:	NON-PLANAR SEMICONDUCTOR STRUCTURE WITH PRESERVED ISOLATION REGION

Patent #:	9472574	Issue Dt:	10/18/2016	Application #:	14609115	Filing Dt:	01/29/2015
Publication #:	US20160225791	Pub Dt:	08/04/2016
Title:	ULTRATHIN BODY (UTB) FINFET SEMICONDUCTOR STRUCTURE

Patent #:	9362279	Issue Dt:	06/07/2016	Application #:	14609171	Filing Dt:	01/29/2015
Title:	CONTACT FORMATION FOR SEMICONDUCTOR DEVICE

Patent #:	9412659	Issue Dt:	08/09/2016	Application #:	14609271	Filing Dt:	01/29/2015
Publication #:	US20160225667	Pub Dt:	08/04/2016
Title:	SEMICONDUCTOR STRUCTURE HAVING SOURCE/DRAIN GOUGING IMMUNITY

Patent #:	9559166	Issue Dt:	01/31/2017	Application #:	14609504	Filing Dt:	01/30/2015
Publication #:	US20160225852	Pub Dt:	08/04/2016
Title:	FABRICATING TRANSISTORS HAVING RESURFACED SOURCE/DRAIN REGIONS WITH STRESSED PORTIONS

Patent #:	9431396	Issue Dt:	08/30/2016	Application #:	14609564	Filing Dt:	01/30/2015
Publication #:	US20160225762	Pub Dt:	08/04/2016
Title:	SINGLE DIFFUSION BREAK WITH IMPROVED ISOLATION AND PROCESS WINDOW AND REDUCED COST

Patent #:	9436078	Issue Dt:	09/06/2016	Application #:	14609588	Filing Dt:	01/30/2015
Publication #:	US20160223896	Pub Dt:	08/04/2016
Title:	METHOD FOR A LOW PROFILE ETCHABLE EUV ABSORBER LAYER WITH EMBEDDED PARTICLES IN A PHOTOLITHOGRAPHY MASK

Patent #:	9368496	Issue Dt:	06/14/2016	Application #:	14609614	Filing Dt:	01/30/2015
Title:	METHOD FOR UNIFORM RECESS DEPTH AND FILL IN SINGLE DIFFUSION BREAK FOR FIN-TYPE PROCESS AND RESULTING DEVICES

Patent #:	9425252	Issue Dt:	08/23/2016	Application #:	14609653	Filing Dt:	01/30/2015
Publication #:	US20160225848	Pub Dt:	08/04/2016
Title:	PROCESS FOR SINGLE DIFFUSION BREAK WITH SIMPLIFIED PROCESS

Patent #:	9379186	Issue Dt:	06/28/2016	Application #:	14610140	Filing Dt:	01/30/2015
Title:	FET STRUCTURE FOR MINIMUM SIZE LENGTH/WIDTH DEVICES FOR PERFORMANCE BOOST AND MISMATCH REDUCTION

Patent #:	9337099	Issue Dt:	05/10/2016	Application #:	14610260	Filing Dt:	01/30/2015
Title:	SPECIAL CONSTRUCTS FOR CONTINUOUS NON-UNIFORM ACTIVE REGION FINFET STANDARD CELLS

Patent #:	9460975	Issue Dt:	10/04/2016	Application #:	14611496	Filing Dt:	02/02/2015
Publication #:	US20160225679	Pub Dt:	08/04/2016
Title:	DFT STRUCTURE FOR TSVS IN 3D ICS WHILE MAINTAINING FUNCTIONAL PURPOSE

Patent #:	9318437	Issue Dt:	04/19/2016	Application #:	14611740	Filing Dt:	02/02/2015
Title:	MOISTURE SCAVENGING LAYER FOR THINNER BARRIER APPLICATION IN BEOL INTEGRATION

Patent #:	9418899	Issue Dt:	08/16/2016	Application #:	14611769	Filing Dt:	02/02/2015
Publication #:	US20160225675	Pub Dt:	08/04/2016
Title:	METHOD OF MULTI-WF FOR MULTI-VT AND THIN SIDEWALL DEPOSITION BY IMPLANTATION FOR GATE-LAST PLANAR CMOS AND FINFET TECHNOLOGY

Patent #:	9373680	Issue Dt:	06/21/2016	Application #:	14611908	Filing Dt:	02/02/2015
Title:	INTEGRATED CIRCUITS WITH CAPACITORS AND METHODS OF PRODUCING THE SAME

Patent #:	9552455	Issue Dt:	01/24/2017	Application #:	14612683	Filing Dt:	02/03/2015
Publication #:	US20160224717	Pub Dt:	08/04/2016
Title:	Method for an Efficient Modeling of the Impact of Device-Level Self-Heating on Electromigration Limited Current Specifications

Patent #:	9673055	Issue Dt:	06/06/2017	Application #:	14613416	Filing Dt:	02/04/2015
Publication #:	US20160225634	Pub Dt:	08/04/2016
Title:	METHOD FOR QUADRUPLE FREQUENCY FINFETS WITH SINGLE-FIN REMOVAL

Patent #:	9324869	Issue Dt:	04/26/2016	Application #:	14613425	Filing Dt:	02/04/2015
Title:	METHOD OF FORMING A SEMICONDUCTOR DEVICE AND RESULTING SEMICONDUCTOR DEVICES

Patent #:	9852956	Issue Dt:	12/26/2017	Application #:	14613570	Filing Dt:	02/04/2015
Publication #:	US20160225680	Pub Dt:	08/04/2016
Title:	EXTRACTION OF RESISTANCE ASSOCIATED WITH LATERALLY DIFFUSED DOPANT PROFILES IN CMOS DEVICES

Patent #:	9178019	Issue Dt:	11/03/2015	Application #:	14613781	Filing Dt:	02/04/2015
Publication #:	US20150171164	Pub Dt:	06/18/2015
Title:	FIN ISOLATION IN MULTI-GATE FIELD EFFECT TRANSISTORS

Patent #:	9508795	Issue Dt:	11/29/2016	Application #:	14613983	Filing Dt:	02/04/2015
Publication #:	US20160225849	Pub Dt:	08/04/2016
Title:	METHODS OF FABRICATING NANOWIRE STRUCTURES

Patent #:	9269407	Issue Dt:	02/23/2016	Application #:	14614470	Filing Dt:	02/05/2015
Title:	SYSTEM AND METHOD FOR MANAGING CIRCUIT PERFORMANCE AND POWER CONSUMPTION BY SELECTIVELY ADJUSTING SUPPLY VOLTAGE OVER TIME

Patent #:	9390981	Issue Dt:	07/12/2016	Application #:	14614489	Filing Dt:	02/05/2015
Title:	METHOD OF FORMING A COMPLEMENTARY METAL OXIDE SEMICONDUCTOR STRUCTURE WITH N-TYPE AND P-TYPE FIELD EFFECT TRANSISTORS HAVING SYMMETRIC SOURCE/DRAIN JUNCTIONS AND OPTIONAL DUAL SILICIDES

Patent #:	9331159	Issue Dt:	05/03/2016	Application #:	14615470	Filing Dt:	02/06/2015
Title:	FABRICATING TRANSISTOR(S) WITH RAISED ACTIVE REGIONS HAVING ANGLED UPPER SURFACES

Patent #:	9412848	Issue Dt:	08/09/2016	Application #:	14615529	Filing Dt:	02/06/2015
Publication #:	US20160233318	Pub Dt:	08/11/2016
Title:	METHODS OF FORMING A COMPLEX GAA FET DEVICE AT ADVANCED TECHNOLOGY NODES

Patent #:	9184162	Issue Dt:	11/10/2015	Application #:	14615762	Filing Dt:	02/06/2015
Publication #:	US20150179644	Pub Dt:	06/25/2015
Title:	FINFET INTEGRATED CIRCUITS AND METHODS FOR THEIR FABRICATION

Patent #:	9443738	Issue Dt:	09/13/2016	Application #:	14616226	Filing Dt:	02/06/2015
Publication #:	US20160233091	Pub Dt:	08/11/2016
Title:	INTEGRATED CIRCUITS WITH MIDDLE OF LINE CAPACITANCE REDUCTION IN SELF-ALIGNED CONTACT PROCESS FLOW AND FABRICATION METHODS

Patent #:	9269375	Issue Dt:	02/23/2016	Application #:	14616614	Filing Dt:	02/06/2015
Publication #:	US20150154984	Pub Dt:	06/04/2015
Title:	MULTI-FORMAT READ DRIVE

Patent #:	9818796	Issue Dt:	11/14/2017	Application #:	14616855	Filing Dt:	02/09/2015
Publication #:	US20160380026	Pub Dt:	12/29/2016
Title:	PLANAR QUBITS HAVING INCREASED COHERENCE TIMES

Patent #:	9373696	Issue Dt:	06/21/2016	Application #:	14617314	Filing Dt:	02/09/2015
Publication #:	US20150155366	Pub Dt:	06/04/2015
Title:	Techniques to Form Uniform and Stable Silicide

Patent #:	9373507	Issue Dt:	06/21/2016	Application #:	14618498	Filing Dt:	02/10/2015
Publication #:	US20150179453	Pub Dt:	06/25/2015
Title:	DEFECTIVE P-N JUNCTION FOR BACKGATED FULLY DEPLETED SILICON ON INSULATOR MOSFET

Patent #:	9305883	Issue Dt:	04/05/2016	Application #:	14620233	Filing Dt:	02/12/2015
Publication #:	US20150179576	Pub Dt:	06/25/2015
Title:	LOCALLY RAISED EPITAXY FOR IMPROVED CONTACT BY LOCAL SILICON CAPPING DURING TRENCH SILICIDE PROCESSINGS

Patent #:	9618566	Issue Dt:	04/11/2017	Application #:	14620273	Filing Dt:	02/12/2015
Publication #:	US20160238653	Pub Dt:	08/18/2016
Title:	SYSTEMS AND METHODS TO PREVENT INCORPORATION OF A USED INTEGRATED CIRCUIT CHIP INTO A PRODUCT

Patent #:	9162877	Issue Dt:	10/20/2015	Application #:	14621039	Filing Dt:	02/12/2015
Publication #:	US20150151961	Pub Dt:	06/04/2015
Title:	LATERAL ETCH STOP FOR NEMS RELEASE ETCH FOR HIGH DENSITY NEMS/CMOS MONOLITHIC INTEGRATION

Patent #:	9087876	Issue Dt:	07/21/2015	Application #:	14621785	Filing Dt:	02/13/2015
Publication #:	US20150162239	Pub Dt:	06/11/2015
Title:	TITANIUM OXYNITRIDE HARD MASK FOR LITHOGRAPHIC PATTERNING

Patent #:	10096609	Issue Dt:	10/09/2018	Application #:	14622997	Filing Dt:	02/16/2015
Publication #:	US20160240438	Pub Dt:	08/18/2016
Title:	MODIFIED TUNGSTEN SILICON

Patent #:	10192822	Issue Dt:	01/29/2019	Application #:	14623115	Filing Dt:	02/16/2015
Publication #:	US20160240478	Pub Dt:	08/18/2016
Title:	MODIFIED TUNGSTEN SILICON

Patent #:	9059267	Issue Dt:	06/16/2015	Application #:	14623720	Filing Dt:	02/17/2015
Publication #:	US20150162425	Pub Dt:	06/11/2015
Title:	III-V Device with Overlapped Extension Regions Using Replacement Gate

Patent #:	9064946	Issue Dt:	06/23/2015	Application #:	14623732	Filing Dt:	02/17/2015
Publication #:	US20150162426	Pub Dt:	06/11/2015
Title:	III-V FET Device with Overlapped Extension Regions Using Gate Last

Patent #:	9865564	Issue Dt:	01/09/2018	Application #:	14624601	Filing Dt:	02/18/2015
Publication #:	US20150162300	Pub Dt:	06/11/2015
Title:	LASER ASHING OF POLYIMIDE FOR SEMICONDUCTOR MANUFACTURING

Patent #:	9418832	Issue Dt:	08/16/2016	Application #:	14624786	Filing Dt:	02/18/2015
Publication #:	US20150162188	Pub Dt:	06/11/2015
Title:	Method of Forming A Dielectric Film

Patent #:	9625325	Issue Dt:	04/18/2017	Application #:	14624907	Filing Dt:	02/18/2015
Publication #:	US20160240479	Pub Dt:	08/18/2016
Title:	SYSTEM AND METHOD FOR IDENTIFYING OPERATING TEMPERATURES AND MODIFYING OF INTEGRATED CIRCUITS

Patent #:	10082483	Issue Dt:	09/25/2018	Application #:	14626191	Filing Dt:	02/19/2015
Publication #:	US20150160157	Pub Dt:	06/11/2015
Title:	SCANNING PROBE WITH TWIN-NANOPORE OR A-SINGLE-NANOPORE FOR SENSING BIOMOLECULES

Patent #:	9405186	Issue Dt:	08/02/2016	Application #:	14628446	Filing Dt:	02/23/2015
Publication #:	US20160246167	Pub Dt:	08/25/2016
Title:	SAMPLE PLAN CREATION FOR OPTICAL PROXIMITY CORRECTION WITH MINIMAL NUMBER OF CLIPS

Patent #:	9466685	Issue Dt:	10/11/2016	Application #:	14628947	Filing Dt:	02/23/2015
Publication #:	US20160247891	Pub Dt:	08/25/2016
Title:	SEMICONDUCTOR STRUCTURE INCLUDING AT LEAST ONE ELECTRICALLY CONDUCTIVE PILLAR, SEMICONDUCTOR STRUCTURE INCLUDING A CONTACT CONTACTING AN OUTER LAYER OF AN ELECTRICALLY CONDUCTIVE STRUCTURE AND METHOD FOR THE FORMATION THEREOF

Patent #:	10147652	Issue Dt:	12/04/2018	Application #:	14630529	Filing Dt:	02/24/2015
Publication #:	US20160247724	Pub Dt:	08/25/2016
Title:	METHOD, APPARATUS AND SYSTEM FOR ADVANCED CHANNEL CMOS INTEGRATION

Patent #:	9530662	Issue Dt:	12/27/2016	Application #:	14630676	Filing Dt:	02/25/2015
Publication #:	US20160247686	Pub Dt:	08/25/2016
Title:	METHODS FOR FABRICATING INTEGRATED CIRCUITS USING DIRECTED SELF-ASSEMBLY INCLUDING A SUBSTANTIALLY PERIODIC ARRAY OF TOPOGRAPHICAL FEATURES THAT INCLUDES ETCH RESISTANT TOPOGRAPHICAL FEATURES FOR TRANSFERABILITY CONTROL

Patent #:	9814982	Issue Dt:	11/14/2017	Application #:	14630774	Filing Dt:	02/25/2015
Publication #:	US20160243443	Pub Dt:	08/25/2016
Title:	MITIGATING COLLISIONS IN A PHYSICAL SPACE DURING GAMING

Patent #:	10091909	Issue Dt:	10/02/2018	Application #:	14632180	Filing Dt:	02/26/2015
Publication #:	US20150195955	Pub Dt:	07/09/2015
Title:	METHOD AND DEVICE FOR COOLING A HEAT GENERATING COMPONENT

Patent #:	10278306	Issue Dt:	04/30/2019	Application #:	14632194	Filing Dt:	02/26/2015
Publication #:	US20150176911	Pub Dt:	06/25/2015
Title:	METHOD AND DEVICE FOR COOLING A HEAT GENERATING COMPONENT

Patent #:	9378972	Issue Dt:	06/28/2016	Application #:	14632313	Filing Dt:	02/26/2015
Publication #:	US20150170927	Pub Dt:	06/18/2015
Title:	INTEGRATION OF DENSE AND VARIABLE PITCH FIN STRUCTURES

Patent #:	9337122	Issue Dt:	05/10/2016	Application #:	14633069	Filing Dt:	02/26/2015
Publication #:	US20150221575	Pub Dt:	08/06/2015
Title:	TRANSFERRING HEAT THROUGH AN OPTICAL LAYER OF INTEGRATED CIRCUITRY

Patent #:	NONE	Issue Dt:		Application #:	14633246	Filing Dt:	02/27/2015
Publication #:	US20160254145	Pub Dt:	09/01/2016
Title:	METHODS FOR FABRICATING SEMICONDUCTOR STRUCTURE WITH CONDENSED SILICON GERMANIUM LAYER

Patent #:	NONE	Issue Dt:		Application #:	14633341	Filing Dt:	02/27/2015
Publication #:	US20160254180	Pub Dt:	09/01/2016
Title:	SELF ALIGNED RAISED FIN TIP END STI TO IMPROVE THE FIN END EPI QUALITY

Patent #:	9425318	Issue Dt:	08/23/2016	Application #:	14633351	Filing Dt:	02/27/2015
Publication #:	US20160254382	Pub Dt:	09/01/2016
Title:	INTEGRATED CIRCUITS WITH FETS HAVING NANOWIRES AND METHODS OF MANUFACTURING THE SAME

Patent #:	9589849	Issue Dt:	03/07/2017	Application #:	14633353	Filing Dt:	02/27/2015
Publication #:	US20160254195	Pub Dt:	09/01/2016
Title:	METHODS OF MODULATING STRAIN IN PFET AND NFET FINFET SEMICONDUCTOR DEVICES

Patent #:	9727684	Issue Dt:	08/08/2017	Application #:	14633477	Filing Dt:	02/27/2015
Publication #:	US20150248520	Pub Dt:	09/03/2015
Title:	METHOD AND APPARATUS FOR PHYSICAL-AWARE HOLD VIOLATION FIXING

Patent #:	9548249	Issue Dt:	01/17/2017	Application #:	14633544	Filing Dt:	02/27/2015
Publication #:	US20160254192	Pub Dt:	09/01/2016
Title:	METHODS OF PERFORMING FIN CUT ETCH PROCESSES FOR FINFET SEMICONDUCTOR DEVICES AND THE RESULTING DEVICES

Patent #:	9520321	Issue Dt:	12/13/2016	Application #:	14633914	Filing Dt:	02/27/2015
Publication #:	US20160254185	Pub Dt:	09/01/2016
Title:	INTEGRATED CIRCUITS AND METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH SELF-ALIGNED VIAS

Patent #:	9362377	Issue Dt:	06/07/2016	Application #:	14633998	Filing Dt:	02/27/2015
Title:	LOW LINE RESISTIVITY AND REPEATABLE METAL RECESS USING CVD COBALT REFLOW

Patent #:	9396995	Issue Dt:	07/19/2016	Application #:	14634080	Filing Dt:	02/27/2015
Title:	NOVEL MOL CONTACT METALLIZATION SCHEME FOR IMPROVED YIELD AND DEVICE RELIABILITY

Patent #:	9552992	Issue Dt:	01/24/2017	Application #:	14634483	Filing Dt:	02/27/2015
Publication #:	US20160254158	Pub Dt:	09/01/2016
Title:	CO-FABRICATION OF NON-PLANAR SEMICONDUCTOR DEVICES HAVING DIFFERENT THRESHOLD VOLTAGES

Patent #:	10066303	Issue Dt:	09/04/2018	Application #:	14634535	Filing Dt:	02/27/2015
Publication #:	US20150247244	Pub Dt:	09/03/2015
Title:	THIN NIB OR COB CAPPING LAYER FOR NON-NOBLE METALLIC BONDING LANDING PADS

Patent #:	NONE	Issue Dt:		Application #:	14634978	Filing Dt:	03/02/2015
Publication #:	US20160260794	Pub Dt:	09/08/2016
Title:	COIL INDUCTOR

Patent #:	10008848	Issue Dt:	06/26/2018	Application #:	14635005	Filing Dt:	03/02/2015
Publication #:	US20160261109	Pub Dt:	09/08/2016
Title:	METHOD TO PROTECT SENSITIVE DEVICES FROM ELECTROSTATIC DISCHARGE DAMAGE

Patent #:	9851397	Issue Dt:	12/26/2017	Application #:	14635125	Filing Dt:	03/02/2015
Publication #:	US20160258998	Pub Dt:	09/08/2016
Title:	ELECTROMIGRATION TESTING OF INTERCONNECT ANALOGUES HAVING BOTTOM-CONNECTED SENSORY PINS

100

Patent #:	NONE	Issue Dt:		Application #:	14636679	Filing Dt:	03/03/2015
Publication #:	US20160260674	Pub Dt:	09/08/2016
Title:	REMOVAL OF INTEGRATED CIRCUIT CHIPS FROM A WAFER

Assignor

WILMINGTON TRUST, NATIONAL ASSOCIATION

Exec Dt:

11/17/2020

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309, UGLAND HOUSE

MAPLES CORPORATE SERVICES LIMITED

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	BENJAMIN PETERSEN
	1460 EL CAMINO REAL, 2ND FLOOR
	SHEARMAN & STERLING LLP
	MENLO PARK, CA 94025

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