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10/16/2007
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10697077
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10/30/2003
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05/05/2005
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06/06/2006
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10698122
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10/31/2003
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05/05/2005
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05/01/2007
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10698884
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10/31/2003
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05/13/2004
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09/13/2005
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10699122
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10/30/2003
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05/05/2005
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03/06/2007
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10699226
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10/31/2003
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05/05/2005
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PLASMA ENHANCED ALD OF TANTALUM NITRIDE AND BILAYER
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03/06/2007
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10699238
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10/31/2003
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07/29/2004
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POLYCARBOSILANE BURIED ETCH STOPS IN INTERCONNECT STRUCTURES
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02/24/2009
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10699283
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10/31/2003
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05/05/2005
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TECHNIQUES FOR RECONSTRUCTING SYNTHETIC NETWORKS USING PAIR-WISE CORRELATION ANALYSIS
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02/27/2007
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10699667
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11/04/2003
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FREQUENCY DOMAIN ESTIMATION OF IQ IMBALANCE IN A WIRELESS OFDM DIRECT CONVERSION RECEIVER USING LOOPBACK CONNECTION
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04/18/2006
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10699887
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11/04/2003
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05/19/2005
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SELF ALIGNED DAMASCENE GATE
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08/01/2006
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10700085
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11/03/2003
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05/05/2005
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Title:
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METHOD FOR FABRICATING SIGE-ON-INSULATOR (SGOI) AND GE-ON-INSULATOR (GOI) SUBSTRATES
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11/11/2008
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10700327
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11/03/2003
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05/19/2005
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Title:
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METHOD AND APPARATUS FOR FILLING VIAS
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10/16/2007
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10700391
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11/04/2003
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Title:
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PROCESSOR THAT PREDICTS FLOATING POINT INSTRUCTION LATENCY BASED ON PREDICTED PRECISION
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03/27/2007
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10700902
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11/04/2003
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Title:
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INTERCONNECT SPEED SENSING CIRCUITRY
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05/20/2008
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10700989
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11/04/2003
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05/05/2005
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Title:
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METHOD FOR CONTROLLING POWER CHANGE FOR A SEMICONDUCTOR MODULE
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05/31/2011
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10703355
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11/07/2003
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05/12/2005
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Title:
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METHODS FOR FABRICATING A METAL-OXIDE-SEMICONDUCTOR DEVICE STRUCTURE
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12/07/2004
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10703643
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11/07/2003
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Title:
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LITHOGRAPHY CONTRAST ENHANCEMENT TECHNIQUE BY VARYING FOCUS WITH WAVELENGTH MODULATION
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12/14/2004
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10705115
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11/10/2003
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06/03/2004
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Title:
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SEMICONDUCTOR STRUCTURE HAVING IN-SITU FORMED UNIT RESISTORS AND METHOD FOR FABRICATION
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04/18/2006
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10706061
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11/13/2003
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05/19/2005
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Title:
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A METHOD OF MANUFACTURING A STRAINED SILICON ON A SIGE ON SOI SUBSTRATE
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07/11/2006
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10706948
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11/14/2003
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05/19/2005
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Title:
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LOW-POWER MULTIPLE-CHANNEL FULLY DEPLETED QUANTUM WELL CMOSFETS
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01/12/2010
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10707053
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11/18/2003
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05/19/2005
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Title:
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MEMORY DEVICE WITH PROGRAMMABLE RECEIVERS TO IMPROVE PERFORMANCE
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01/30/2007
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10707064
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11/19/2003
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05/19/2005
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Title:
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OPTIMUM PADSET FOR WIRE BONDING RF TECHNOLOGIES WITH HIGH-Q INDUCTORS
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10/31/2006
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10707065
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11/19/2003
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05/19/2005
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Title:
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TRI-METAL AND DUAL-METAL STACKED INDUCTORS
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09/06/2005
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10707121
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11/21/2003
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Pub Dt:
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05/26/2005
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Title:
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VARIATION OF EFFECTIVE FILTER CAPACITANCE IN PHASE LOCK LOOP CIRCUIT LOOP FILTERS
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10/17/2006
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10707122
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11/21/2003
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05/26/2005
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Title:
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BACK END INTERCONNECT WITH A SHAPED INTERFACE
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01/24/2006
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10707175
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11/25/2003
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05/26/2005
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Title:
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METHOD OF FORMING ULTRA-THIN SILICIDATION-STOP EXTENSIONS IN MOSFET DEVICES
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09/12/2006
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10707283
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12/03/2003
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06/09/2005
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Title:
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APPARATUS AND METHOD FOR ELECTRONIC FUSE WITH IMPROVED ESD TOLERANCE
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07/03/2007
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10707373
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12/09/2003
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06/23/2005
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Title:
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SCAN CHAIN DIAGNOSTICS USING LOGIC PATHS
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06/24/2008
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10707479
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12/17/2003
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10/21/2004
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Title:
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SYSTEM FOR IMPROVING POWER DISTRIBUTION CURRENT MEASUREMENT ON PRINTED CIRCUIT BOARDS
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07/24/2007
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10707690
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01/05/2004
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07/07/2005
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Title:
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STRUCTURES AND METHODS FOR MAKING STRAINED MOSFETS
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10/10/2006
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10707722
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01/07/2004
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07/14/2005
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TUNABLE SEMICONDUCTOR DIODES
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06/06/2006
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10707757
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01/09/2004
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07/14/2005
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Title:
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FET GATE STRUCTURE WITH METAL GATE ELECTRODE AND SILICIDE CONTACT
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01/01/2008
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10707776
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01/12/2004
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07/14/2005
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METHOD AND SYSTEM FOR CREATING, VIEWING, EDITING, AND SHARING OUTPUT FROM A DESIGN CHECKING SYSTEM
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01/17/2006
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10707810
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01/14/2004
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07/14/2005
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MULTILAYER CERAMIC SUBSTRATE WITH SINGLE VIA ANCHORED PAD AND METHOD OF FORMING
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10/10/2006
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10707842
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01/16/2004
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07/21/2005
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METHOD AND APPARATUS TO INCREASE STRAIN EFFECT IN A TRANSISTOR CHANNEL
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04/24/2007
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10707896
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01/22/2004
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07/28/2005
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Title:
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Method of manufacturing high performance copper inductors with bond pads
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11/21/2006
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10707897
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01/22/2004
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07/28/2005
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Title:
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SELECTIVE NITRIDATION OF GATE OXIDES
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06/12/2007
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10707962
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01/28/2004
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07/28/2005
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ALTERNATING PHASE SHIFT MASK DESIGN FOR HIGH PERFORMANCE CIRCUITRY
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06/13/2006
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10707963
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01/28/2004
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07/28/2005
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Title:
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FUSE LATCH WITH COMPENSATED PROGRAMMABLE RESISTIVE TRIP POINT
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05/29/2007
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10707964
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01/28/2004
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07/28/2005
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Title:
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METHOD AND STRUCTURE TO CREATE MULTIPLE DEVICE WIDTHS IN FINFET TECHNOLOGY IN BOTH BULK AND SOI
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07/29/2008
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10707996
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01/30/2004
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08/04/2005
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DEVICE AND METHODOLOGY FOR REDUCING EFFECTIVE DIELECTRIC CONSTANT IN SEMICONDUCTOR DEVICES
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01/23/2007
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10708023
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02/03/2004
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08/04/2005
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Title:
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STRUCTURE AND METHOD FOR LOCAL RESISTOR ELEMENT IN INTEGRATED CIRCUIT TECHNOLOGY
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07/22/2008
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10708039
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02/04/2004
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08/04/2005
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IC DESIGN MODELING ALLOWING DIMENSION-DEPENDENT RULE CHECKING
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03/20/2007
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10708184
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02/13/2004
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09/01/2005
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Title:
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A COMMAND MULTIPLIER FOR BUILT-IN-SELF-TEST
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09/27/2005
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10708233
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02/18/2004
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08/18/2005
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Title:
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DYNAMIC THRESHOLD FOR VCO CALIBRATION
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Issue Dt:
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12/30/2008
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10708316
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02/24/2004
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08/25/2005
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Title:
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Autonomous Self-Monitoring and Corrective Operation of an Integrated Circuit
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10/10/2006
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10708317
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02/24/2004
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08/25/2005
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CONTENT ADDRESSABLE MEMORY STRUCTURE
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09/16/2008
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10708340
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02/25/2004
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08/25/2005
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STRUCTURE AND METHOD OF SELF-ALIGNED BIPOLAR TRANSISTOR HAVING TAPERED COLLECTOR
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Issue Dt:
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04/12/2011
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10708378
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02/27/2004
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09/01/2005
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HYBRID SOI/BULK SEMICONDUCTOR TRANSISTORS
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06/02/2009
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10708382
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02/27/2004
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09/15/2005
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Title:
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LSSD-COMPATIBLE EDGE-TRIGGERED SHIFT REGISTER LATCH
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09/12/2006
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10708451
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03/04/2004
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09/08/2005
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Title:
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PLANAR PEDESTAL MULTI GATE DEVICE
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02/06/2007
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10708486
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03/06/2004
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Pub Dt:
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09/08/2005
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SUPPRESSION OF LOCALIZED METAL PRECIPITATE FORMATION AND CORRESPONDING METALLIZATION DEPLETION IN SEMICONDUCTOR PROCESSING
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02/28/2006
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10708667
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03/18/2004
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09/22/2005
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Title:
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PHASE CHANGE MEMORY CELL ON SILICON-ON INSULATOR SUBSTRATE
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10/17/2006
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10708684
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03/18/2004
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09/22/2005
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Title:
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ALTERNATING PHASE-SHIFT MASK RULE COMPLIANT IC DESIGN
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08/30/2005
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10708743
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03/23/2004
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Pub Dt:
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11/11/2004
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Title:
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BICMOS TECHNOLOGY ON SOI SUBSTRATES
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02/14/2006
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10708907
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03/31/2004
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Pub Dt:
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10/13/2005
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Title:
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HIGH MOBILITY PLANE CMOS SOI
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10/03/2006
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10709076
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04/12/2004
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Pub Dt:
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10/13/2005
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Title:
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FINFET TRANSISTOR AND CIRCUIT
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07/03/2007
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10709115
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04/14/2004
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10/20/2005
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RESISTOR TUNING
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08/08/2006
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10709220
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04/22/2004
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Pub Dt:
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10/27/2005
| | | | |
Title:
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STRUCTURE AND METHOD OF FORMING BIPOLAR TRANSISTOR HAVING A SELF-ALIGNED RAISED EXTRINSIC BASE USING SELF-ALIGNED ETCH STOP LAYER
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03/17/2009
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10709239
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04/23/2004
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Pub Dt:
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10/27/2005
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Title:
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DISLOCATION FREE STRESSED CHANNELS IN BULK SILICON AND SOI CMOS DEVICES BY GATE STRESS ENGINEERING
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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10709292
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Filing Dt:
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04/27/2004
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Publication #:
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Pub Dt:
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07/06/2006
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Title:
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INTEGRATED CIRCUIT YIELD ENHANCEMENT USING VORONOI DIAGRAMS
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Patent #:
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Issue Dt:
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11/28/2006
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Application #:
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10709293
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Filing Dt:
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04/27/2004
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Publication #:
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Pub Dt:
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10/27/2005
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Title:
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CRITICAL AREA COMPUTATION OF COMPOSITE FAULT MECHANISMS USING VORONOI DIAGRAMS
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Patent #:
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Issue Dt:
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04/01/2008
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Application #:
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10709327
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Filing Dt:
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04/28/2004
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Publication #:
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Pub Dt:
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11/03/2005
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Title:
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METHOD OF IDENTIFYING PATHS WITH DELAYS DOMINATED BY A PARTICULAR FACTOR
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Patent #:
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Issue Dt:
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10/09/2007
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Application #:
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10709362
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Filing Dt:
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04/29/2004
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Publication #:
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Pub Dt:
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11/03/2005
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Title:
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SYSTEM AND METHOD OF ANALYZING TIMING EFFECTS OF SPATIAL DISTRIBUTION IN CIRCUITS
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Patent #:
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Issue Dt:
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03/07/2006
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Application #:
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10709450
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Filing Dt:
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05/06/2004
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Publication #:
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Pub Dt:
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11/10/2005
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Title:
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OUT OF THE BOX VERTICAL TRANSISTOR FOR EDRAM ON SOI
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Patent #:
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Issue Dt:
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10/31/2006
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Application #:
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10709534
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Filing Dt:
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05/12/2004
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Publication #:
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Pub Dt:
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11/17/2005
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Title:
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METHOD FOR CONTROLLING VOIDING AND BRIDGING IN SILICIDE FORMATION
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Patent #:
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Issue Dt:
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12/05/2006
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Application #:
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10709692
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Filing Dt:
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05/24/2004
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Publication #:
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Pub Dt:
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11/24/2005
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Title:
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THIN-FILM RESISTOR AND METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10709699
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Filing Dt:
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05/24/2004
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Title:
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TRENCH OPTICAL DEVICE
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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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10709722
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Filing Dt:
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05/25/2004
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Publication #:
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Pub Dt:
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12/15/2005
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Title:
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METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING AIR GAPS AND THE STRUCTURE SO FORMED
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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10709729
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Filing Dt:
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05/25/2004
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Publication #:
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Pub Dt:
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12/01/2005
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Title:
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INCREASE PRODUCTIVITY AT WAFER TEST USING PROBE RETEST DATA ANALYSIS
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Patent #:
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Issue Dt:
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04/03/2007
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Application #:
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10709733
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Filing Dt:
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05/25/2004
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Publication #:
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Pub Dt:
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12/01/2005
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Title:
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LIGHT SCATTERING EUVL MASK
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Patent #:
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Issue Dt:
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06/01/2010
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Application #:
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10709752
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Filing Dt:
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05/26/2004
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Publication #:
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Pub Dt:
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11/11/2004
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Title:
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MANUFACTURING METHOD OF PRINTED CIRCUIT BOARD
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Patent #:
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Issue Dt:
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05/13/2008
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Application #:
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10709754
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Filing Dt:
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05/26/2004
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Publication #:
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Pub Dt:
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12/15/2005
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Title:
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A SYSTEM AND METHOD OF PROVIDING ERROR DETECTION AND CORRECTION CAPABILITY IN AN INTEGRATED CIRCUIT USING REDUNDANT LOGIC CELLS OF AN EMBEDDED FPGA
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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10709804
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Filing Dt:
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05/28/2004
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Title:
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PROGRAMMABLE FREQUENCY DIVIDER WITH SYMMETRICAL OUTPUT
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Patent #:
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Issue Dt:
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10/16/2007
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Application #:
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10709829
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Filing Dt:
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06/01/2004
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Publication #:
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Pub Dt:
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12/15/2005
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Title:
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INEXPENSIVE METHOD OF FABRICATING A HIGHER PERFORMANCE CAPACITANCE DENSITY MIMCAP INTEGRABLE INTO A COPPER INTERCONNECT SCHEME
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Patent #:
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Issue Dt:
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05/01/2007
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Application #:
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10709865
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Filing Dt:
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06/02/2004
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Publication #:
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Pub Dt:
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12/08/2005
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Title:
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PE-ALD OF TAN DIFFUSION BARRIER REGION ON LOW-K MATERIALS
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Patent #:
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Issue Dt:
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09/16/2008
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Application #:
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10709867
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Filing Dt:
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06/02/2004
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Publication #:
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Pub Dt:
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12/08/2005
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Title:
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METHOD, SYSTEM, AND STORAGE MEDIUM FOR PROVIDING CONTINUOUS COMMUNICATION BETWEEN PROCESS EQUIPMENT AND AN AUTOMATED MATERIAL HANDLING SYSTEM
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Patent #:
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Issue Dt:
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05/15/2007
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Application #:
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10709905
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Filing Dt:
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06/04/2004
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Publication #:
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Pub Dt:
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12/08/2005
| | | | |
Title:
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BIPOLAR TRANSISTOR WITH ISOLATION AND DIRECT CONTACTS
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Patent #:
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Issue Dt:
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11/27/2007
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Application #:
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10709907
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Filing Dt:
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06/04/2004
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Publication #:
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Pub Dt:
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12/08/2005
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Title:
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FORMATION OF METAL-INSULATOR-METAL CAPACITOR SIMULTANEOUSLY WITH ALUMINUM METAL WIRING LEVEL USING A HARDMASK
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Patent #:
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Issue Dt:
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07/22/2008
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Application #:
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10709949
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Filing Dt:
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06/08/2004
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Publication #:
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Pub Dt:
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12/08/2005
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Title:
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TRANSIENT SIMULATION USING ADAPTIVE PIECEWISE CONSTANT MODEL
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Patent #:
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Issue Dt:
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08/01/2006
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Application #:
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10709998
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Filing Dt:
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06/11/2004
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Publication #:
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Pub Dt:
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12/15/2005
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Title:
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BACK GATE FINFET SRAM
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Patent #:
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Issue Dt:
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03/07/2006
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Application #:
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10710007
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Filing Dt:
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06/11/2004
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Publication #:
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Pub Dt:
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12/15/2005
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Title:
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LOW CAPACITANCE FET FOR OPERATION AT SUBTHRESHOLD VOLTAGES
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10710063
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Filing Dt:
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06/16/2004
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Publication #:
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Pub Dt:
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12/22/2005
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Title:
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TEMPERATURE STABLE METAL NITRIDE GATE ELECTRODE
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Patent #:
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Issue Dt:
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09/01/2009
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Application #:
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10710113
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Filing Dt:
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06/18/2004
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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PHYSICAL DESIGN CHARACTERIZATION SYSTEM
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Patent #:
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Issue Dt:
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02/20/2007
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Application #:
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10710147
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Filing Dt:
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06/22/2004
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Publication #:
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Pub Dt:
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12/22/2005
| | | | |
Title:
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INTERLAYER CONNECTOR FOR PREVENTING DELAMINATION OF SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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05/27/2008
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Application #:
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10710224
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Filing Dt:
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06/28/2004
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Publication #:
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Pub Dt:
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12/29/2005
| | | | |
Title:
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SYSTEM FOR COLORING A PARTIALLY COLORED DESIGN IN AN ALTERNATING PHASE SHIFT MASK
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Patent #:
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Issue Dt:
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07/29/2008
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Application #:
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10710226
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Filing Dt:
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06/28/2004
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Publication #:
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Pub Dt:
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12/29/2005
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Title:
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METHOD AND APPARATUS FOR TREATING WAFER EDGE REGION WITH TOROIDAL PLASMA
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Patent #:
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Issue Dt:
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10/30/2007
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Application #:
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10710244
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Filing Dt:
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06/29/2004
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Publication #:
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Pub Dt:
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12/29/2005
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Title:
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STRUCTURES AND METHODS FOR MANUFACTURING P-TYPE MOSFET WITHGRADED EMBEDDED SILICON-GERMANIUM SOURCE-DRAIN AND/OR EXTENSION
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Patent #:
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Issue Dt:
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09/05/2006
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Application #:
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10710256
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Filing Dt:
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06/29/2004
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Publication #:
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Pub Dt:
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12/29/2005
| | | | |
Title:
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INTEGRATED SOI FINGERED DECOUPLING CAPACITOR
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Patent #:
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Issue Dt:
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03/11/2014
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Application #:
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10710272
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Filing Dt:
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06/30/2004
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Publication #:
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Pub Dt:
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01/19/2006
| | | | |
Title:
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METHOD AND STRUCTURE FOR STRAINED FINFET DEVICES
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Patent #:
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Issue Dt:
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08/01/2006
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Application #:
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10710453
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Filing Dt:
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07/13/2004
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Publication #:
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Pub Dt:
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01/19/2006
| | | | |
Title:
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LOW LEAKAGE MONOTONIC CMOS LOGIC
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Patent #:
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Issue Dt:
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10/13/2009
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Application #:
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10710566
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Filing Dt:
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07/21/2004
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Publication #:
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Pub Dt:
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01/26/2006
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Title:
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TOP-OXIDE-EARLY PROCESS AND ARRAY TOP OXIDE PLANARIZATION
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Patent #:
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Issue Dt:
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07/22/2008
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Application #:
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10710648
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Filing Dt:
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07/27/2004
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Publication #:
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Pub Dt:
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02/02/2006
| | | | |
Title:
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METHOD FOR GENERATING A SET OF TEST PATTERNS FOR AN OPTICAL PROXIMITY CORRECTION ALGORITHM
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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10710680
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Filing Dt:
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07/28/2004
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Publication #:
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Pub Dt:
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02/02/2006
| | | | |
Title:
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MULTIPLE-GATE DEVICE WITH FLOATING BACK GATE
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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10710681
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Filing Dt:
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07/28/2004
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Publication #:
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Pub Dt:
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02/02/2006
| | | | |
Title:
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CLOCK DITHERING SYSTEM AND METHOD DURING FREQUENCY SCALING
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Patent #:
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Issue Dt:
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05/08/2007
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Application #:
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10710733
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Filing Dt:
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07/30/2004
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Publication #:
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Pub Dt:
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02/02/2006
| | | | |
Title:
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INCORPORATION OF UNCERTAINTY INFORMATION IN MODELING A CHARACTERISTIC OF A DEVICE
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Patent #:
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Issue Dt:
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02/21/2006
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Application #:
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10710736
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Filing Dt:
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07/30/2004
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Publication #:
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Pub Dt:
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02/02/2006
| | | | |
Title:
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ULTRA-THIN BODY SUPER-STEEP RETROGRADE WELL (SSRW) FET DEVICES
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Patent #:
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Issue Dt:
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05/30/2006
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Application #:
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10710745
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Filing Dt:
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07/30/2004
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Publication #:
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Pub Dt:
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02/02/2006
| | | | |
Title:
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METHOD AND APPARATUS FOR CONTROLLING COMMON-MODE OUTPUT VOLTAGE IN FULLY DIFFERENTIAL AMPLIFIERS
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Patent #:
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Issue Dt:
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07/24/2007
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Application #:
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10710826
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Filing Dt:
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08/05/2004
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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METHOD OF FORMING STRAINED SILICON MATERIALS WITH IMPROVED THERMAL CONDUCTIVITY
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Patent #:
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Issue Dt:
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06/24/2008
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Application #:
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10710827
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Filing Dt:
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08/05/2004
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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METHOD OF FORMING A POLISHING INHIBITING LAYER USING A SLURRY HAVING AN ADDITIVE
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Patent #:
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Issue Dt:
|
07/08/2008
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Application #:
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10710847
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Filing Dt:
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08/06/2004
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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FEOL/MEOL METAL RESISTOR FOR HIGH END CMOS
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|